Merge pull request #10721 from p12tic:expose-fake-cpuinfo-cache

PiperOrigin-RevId: 660077238
This commit is contained in:
gVisor bot
2024-08-06 13:33:39 -07:00
2 changed files with 16 additions and 23 deletions
+8 -1
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@@ -308,7 +308,7 @@ func (fs FeatureSet) HasFeature(feature Feature) bool {
// WriteCPUInfoTo is to generate a section of one cpu in /proc/cpuinfo. This is
// a minimal /proc/cpuinfo, it is missing some fields like "microcode" that are
// not always printed in Linux. The bogomips field is simply made up.
// not always printed in Linux. Several fields are simply made up.
func (fs FeatureSet) WriteCPUInfoTo(cpu, numCPU uint, w io.Writer) {
// Avoid many redundant calls here, since this can occasionally appear
// in the hot path. Read all basic information up front, see above.
@@ -322,6 +322,13 @@ func (fs FeatureSet) WriteCPUInfoTo(cpu, numCPU uint, w io.Writer) {
fmt.Fprintf(w, "model name\t: %s\n", "unknown") // Unknown for now.
fmt.Fprintf(w, "stepping\t: %s\n", "unknown") // Unknown for now.
fmt.Fprintf(w, "cpu MHz\t\t: %.3f\n", cpuFreqMHz)
// Pretend the CPU has 8192 KB of cache. Note that real /proc/cpuinfo exposes total L3 cache
// size on Intel and per-core L2 cache size on AMD (as of Linux 6.1.0), so the value of this
// field is not really important in practice. Any value that is chosen here will be wrong
// by an order of magnitude on a significant chunk of x86 machines.
// 8192 KB is selected because it is a reasonable size that will be effectively usable on
// lightly loaded machines - most machines have 1-4MB of L3 cache per core.
fmt.Fprintf(w, "cache size\t: 8192 KB\n")
fmt.Fprintf(w, "physical id\t: 0\n") // Pretend all CPUs are in the same socket.
fmt.Fprintf(w, "siblings\t: %d\n", numCPU)
fmt.Fprintf(w, "core id\t\t: %d\n", cpu)
+8 -22
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@@ -125,28 +125,14 @@ namespace {
// fields that are printed conditionally, but are present on common
// configurations (e.g. when CONFIG_SMP is set).
static const char* required_fields[] = {
"processor",
"vendor_id",
"cpu family",
"model\t\t:",
"model name",
"stepping",
"cpu MHz",
"physical id",
"siblings",
"core id",
"cpu cores",
"apicid\t\t:",
"initial apicid",
"fpu\t\t:",
"fpu_exception",
"cpuid level",
"wp",
"bogomips",
"clflush size",
"cache_alignment",
"address sizes",
"power management",
"processor", "vendor_id", "cpu family",
"model\t\t:", "model name", "stepping",
"cpu MHz", "cache size", "physical id",
"siblings", "core id", "cpu cores",
"apicid\t\t:", "initial apicid", "fpu\t\t:",
"fpu_exception", "cpuid level", "wp",
"bogomips", "clflush size", "cache_alignment",
"address sizes", "power management",
};
#elif defined(__aarch64__)
// This list of "required" fields is taken from reading the file