Add explicit NOFRAME annotation in assembly functions.

For all trivial and zero frame-sized functions, we now require an explicit
NOFRAME annotation as the heuristic has changed. See go.dev/cl/466316.

Most of these functions do not  *require* NOFRAME, but this change encodes
the existing behavior in order to avoid accidental bugs or regressions.

PiperOrigin-RevId: 513946210
This commit is contained in:
Adin Scannell
2023-03-04 00:53:20 -08:00
committed by gVisor bot
parent 2b531e139c
commit 5ba34bd1a5
24 changed files with 81 additions and 81 deletions
+8 -8
View File
@@ -16,28 +16,28 @@
#include "textflag.h"
TEXT ·andUint32(SB),NOSPLIT,$0-12
TEXT ·andUint32(SB),NOSPLIT|NOFRAME,$0-12
MOVQ addr+0(FP), BX
MOVL val+8(FP), AX
LOCK
ANDL AX, 0(BX)
RET
TEXT ·orUint32(SB),NOSPLIT,$0-12
TEXT ·orUint32(SB),NOSPLIT|NOFRAME,$0-12
MOVQ addr+0(FP), BX
MOVL val+8(FP), AX
LOCK
ORL AX, 0(BX)
RET
TEXT ·xorUint32(SB),NOSPLIT,$0-12
TEXT ·xorUint32(SB),NOSPLIT|NOFRAME,$0-12
MOVQ addr+0(FP), BX
MOVL val+8(FP), AX
LOCK
XORL AX, 0(BX)
RET
TEXT ·compareAndSwapUint32(SB),NOSPLIT,$0-20
TEXT ·compareAndSwapUint32(SB),NOSPLIT|NOFRAME,$0-20
MOVQ addr+0(FP), DI
MOVL old+8(FP), AX
MOVL new+12(FP), DX
@@ -46,28 +46,28 @@ TEXT ·compareAndSwapUint32(SB),NOSPLIT,$0-20
MOVL AX, ret+16(FP)
RET
TEXT ·andUint64(SB),NOSPLIT,$0-16
TEXT ·andUint64(SB),NOSPLIT|NOFRAME,$0-16
MOVQ addr+0(FP), BX
MOVQ val+8(FP), AX
LOCK
ANDQ AX, 0(BX)
RET
TEXT ·orUint64(SB),NOSPLIT,$0-16
TEXT ·orUint64(SB),NOSPLIT|NOFRAME,$0-16
MOVQ addr+0(FP), BX
MOVQ val+8(FP), AX
LOCK
ORQ AX, 0(BX)
RET
TEXT ·xorUint64(SB),NOSPLIT,$0-16
TEXT ·xorUint64(SB),NOSPLIT|NOFRAME,$0-16
MOVQ addr+0(FP), BX
MOVQ val+8(FP), AX
LOCK
XORQ AX, 0(BX)
RET
TEXT ·compareAndSwapUint64(SB),NOSPLIT,$0-32
TEXT ·compareAndSwapUint64(SB),NOSPLIT|NOFRAME,$0-32
MOVQ addr+0(FP), DI
MOVQ old+8(FP), AX
MOVQ new+16(FP), DX
+1 -1
View File
@@ -14,7 +14,7 @@
#include "textflag.h"
TEXT ·native(SB),NOSPLIT,$0-24
TEXT ·native(SB),NOSPLIT|NOFRAME,$0-24
MOVL arg_Eax+0(FP), AX
MOVL arg_Ecx+4(FP), CX
CPUID
+1 -1
View File
@@ -17,7 +17,7 @@
#define GOID_OFFSET 152 // +checkoffset runtime g.goid
// func goid() int64
TEXT ·goid(SB),NOSPLIT,$0-8
TEXT ·goid(SB),NOSPLIT|NOFRAME,$0-8
MOVQ (TLS), R14
MOVQ GOID_OFFSET(R14), R14
MOVQ R14, ret+0(FP)
+1 -1
View File
@@ -20,7 +20,7 @@
#define M_OFFSET 48 // +checkoffset runtime g.m
#define PROCID_OFFSET 72 // +checkoffset runtime m.procid
TEXT ·Current(SB),NOSPLIT,$0-8
TEXT ·Current(SB),NOSPLIT|NOFRAME,$0-8
// procid is in getg().m.procid.
MOVQ TLS, AX
MOVQ 0(AX)(TLS*1), AX
+11 -11
View File
@@ -164,7 +164,7 @@ TEXT name,$0-8; \
RET
// See kernel.go.
TEXT ·Halt(SB),NOSPLIT,$0
TEXT ·Halt(SB),NOSPLIT|NOFRAME,$0
HLT
RET
@@ -185,7 +185,7 @@ TEXT ·HaltAndWriteFSBase(SB),NOSPLIT,$8-8
// jumpToKernel changes execution to the kernel address space.
//
// This works by changing the return value to the kernel version.
TEXT ·jumpToKernel(SB),NOSPLIT,$0
TEXT ·jumpToKernel(SB),NOSPLIT|NOFRAME,$0
MOVQ 0(SP), AX
ORQ ·KernelStartAddress(SB), AX // Future return value.
MOVQ AX, 0(SP)
@@ -194,7 +194,7 @@ TEXT ·jumpToKernel(SB),NOSPLIT,$0
// jumpToUser changes execution to the user address space.
//
// This works by changing the return value to the user version.
TEXT ·jumpToUser(SB),NOSPLIT,$0
TEXT ·jumpToUser(SB),NOSPLIT|NOFRAME,$0
// N.B. we can't access KernelStartAddress from the upper half (data
// pages not available), so just naively clear all the upper bits.
// We are assuming a 47-bit virtual address space.
@@ -300,7 +300,7 @@ fpsave_done:
RET
// See entry_amd64.go.
TEXT ·sysret(SB),NOSPLIT,$0-32
TEXT ·sysret(SB),NOSPLIT|NOFRAME,$0-32
// Set application FS. We can't do this in Go because Go code needs FS.
MOVQ regs+8(FP), AX
MOVQ PTRACE_FS_BASE(AX), AX
@@ -343,7 +343,7 @@ TEXT ·sysret(SB),NOSPLIT,$0-32
// caller.
// See entry_amd64.go.
TEXT ·iret(SB),NOSPLIT,$0-32
TEXT ·iret(SB),NOSPLIT|NOFRAME,$0-32
// Set application FS. We can't do this in Go because Go code needs FS.
MOVQ regs+8(FP), AX
MOVQ PTRACE_FS_BASE(AX), AX
@@ -383,7 +383,7 @@ TEXT ·iret(SB),NOSPLIT,$0-32
// caller.
// See entry_amd64.go.
TEXT ·resume(SB),NOSPLIT,$0
TEXT ·resume(SB),NOSPLIT|NOFRAME,$0
// See iret, above.
MOVQ ENTRY_CPU_SELF(GS), AX // Load vCPU.
PUSHQ CPU_REGISTERS+PTRACE_SS(AX)
@@ -396,7 +396,7 @@ TEXT ·resume(SB),NOSPLIT,$0
IRET()
// See entry_amd64.go.
TEXT ·start(SB),NOSPLIT,$0
TEXT ·start(SB),NOSPLIT|NOFRAME,$0
// N.B. This is the vCPU entrypoint. It is not called from Go code and
// thus pushes and pops values on the stack until calling into Go
// (startGo) because we aren't usually a typical Go assembly frame.
@@ -418,7 +418,7 @@ TEXT ·start(SB),NOSPLIT,$0
ADDR_OF_FUNC(·AddrOfStart(SB), ·start(SB));
// See entry_amd64.go.
TEXT ·sysenter(SB),NOSPLIT,$0
TEXT ·sysenter(SB),NOSPLIT|NOFRAME,$0
// _RFLAGS_IOPL0 is always set in the user mode and it is never set in
// the kernel mode. See the comment of UserFlagsSet for more details.
TESTL $_RFLAGS_IOPL0, R11
@@ -532,7 +532,7 @@ ADDR_OF_FUNC(·addrOfSysenter(SB), ·sysenter(SB));
// the vector & error codes are pushed as return values.
//
// See below for the stubs that call exception.
TEXT ·exception(SB),NOSPLIT,$0
TEXT ·exception(SB),NOSPLIT|NOFRAME,$0
// Determine whether the exception occurred in kernel mode or user
// mode, based on the flags. We expect the following stack:
//
@@ -649,13 +649,13 @@ fpsave_done:
#define EXCEPTION_WITH_ERROR(value, symbol, addr) \
ADDR_OF_FUNC(addr, symbol); \
TEXT symbol,NOSPLIT,$0; \
TEXT symbol,NOSPLIT|NOFRAME,$0; \
PUSHQ $value; \
JMP ·exception(SB);
#define EXCEPTION_WITHOUT_ERROR(value, symbol, addr) \
ADDR_OF_FUNC(addr, symbol); \
TEXT symbol,NOSPLIT,$0; \
TEXT symbol,NOSPLIT|NOFRAME,$0; \
PUSHQ $0x0; \
PUSHQ $value; \
JMP ·exception(SB);
+17 -17
View File
@@ -21,7 +21,7 @@
//
// fxrstor64 (%rbx)
//
TEXT ·fxrstor(SB),NOSPLIT,$0-8
TEXT ·fxrstor(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), BX
MOVL $0xffffffff, AX
MOVL $0xffffffff, DX
@@ -34,7 +34,7 @@ TEXT ·fxrstor(SB),NOSPLIT,$0-8
//
// xrstor (%rdi)
//
TEXT ·xrstor(SB),NOSPLIT,$0-8
TEXT ·xrstor(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), DI
MOVL $0xffffffff, AX
MOVL $0xffffffff, DX
@@ -47,7 +47,7 @@ TEXT ·xrstor(SB),NOSPLIT,$0-8
//
// fxsave64 (%rbx)
//
TEXT ·fxsave(SB),NOSPLIT,$0-8
TEXT ·fxsave(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), BX
MOVL $0xffffffff, AX
MOVL $0xffffffff, DX
@@ -60,7 +60,7 @@ TEXT ·fxsave(SB),NOSPLIT,$0-8
//
// xsave (%rdi)
//
TEXT ·xsave(SB),NOSPLIT,$0-8
TEXT ·xsave(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), DI
MOVL $0xffffffff, AX
MOVL $0xffffffff, DX
@@ -73,7 +73,7 @@ TEXT ·xsave(SB),NOSPLIT,$0-8
//
// xsaveopt (%rdi)
//
TEXT ·xsaveopt(SB),NOSPLIT,$0-8
TEXT ·xsaveopt(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), DI
MOVL $0xffffffff, AX
MOVL $0xffffffff, DX
@@ -109,7 +109,7 @@ msr:
//
// wrfsbase %rax
//
TEXT ·wrfsbase(SB),NOSPLIT,$0-8
TEXT ·wrfsbase(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), AX
BYTE $0xf3; BYTE $0x48; BYTE $0x0f; BYTE $0xae; BYTE $0xd0;
RET
@@ -120,7 +120,7 @@ TEXT ·wrfsbase(SB),NOSPLIT,$0-8
//
// wrmsr (writes EDX:EAX to the MSR in ECX)
//
TEXT ·wrfsmsr(SB),NOSPLIT,$0-8
TEXT ·wrfsmsr(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), AX
MOVQ AX, DX
SHRQ $32, DX
@@ -157,7 +157,7 @@ msr:
//
// wrgsbase %rax
//
TEXT ·wrgsbase(SB),NOSPLIT,$0-8
TEXT ·wrgsbase(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), AX
BYTE $0xf3; BYTE $0x48; BYTE $0x0f; BYTE $0xae; BYTE $0xd8;
RET
@@ -165,7 +165,7 @@ TEXT ·wrgsbase(SB),NOSPLIT,$0-8
// wrgsmsr writes to the GSBASE MSR.
//
// See wrfsmsr.
TEXT ·wrgsmsr(SB),NOSPLIT,$0-8
TEXT ·wrgsmsr(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), AX
MOVQ AX, DX
SHRQ $32, DX
@@ -179,7 +179,7 @@ TEXT ·wrgsmsr(SB),NOSPLIT,$0-8
//
// mov %cr2, %rax
//
TEXT ·readCR2(SB),NOSPLIT,$0-8
TEXT ·readCR2(SB),NOSPLIT|NOFRAME,$0-8
BYTE $0x0f; BYTE $0x20; BYTE $0xd0;
MOVQ AX, ret+0(FP)
RET
@@ -189,7 +189,7 @@ TEXT ·readCR2(SB),NOSPLIT,$0-8
// The code corresponds to:
//
// fninit
TEXT ·fninit(SB),NOSPLIT,$0
TEXT ·fninit(SB),NOSPLIT|NOFRAME,$0
BYTE $0xdb; BYTE $0xe3;
RET
@@ -199,7 +199,7 @@ TEXT ·fninit(SB),NOSPLIT,$0
//
// xsetbv
//
TEXT ·xsetbv(SB),NOSPLIT,$0-16
TEXT ·xsetbv(SB),NOSPLIT|NOFRAME,$0-16
MOVQ reg+0(FP), CX
MOVL value+8(FP), AX
MOVL value+12(FP), DX
@@ -212,7 +212,7 @@ TEXT ·xsetbv(SB),NOSPLIT,$0-16
//
// xgetbv
//
TEXT ·xgetbv(SB),NOSPLIT,$0-16
TEXT ·xgetbv(SB),NOSPLIT|NOFRAME,$0-16
MOVQ reg+0(FP), CX
BYTE $0x0f; BYTE $0x01; BYTE $0xd0;
MOVL AX, ret+8(FP)
@@ -225,7 +225,7 @@ TEXT ·xgetbv(SB),NOSPLIT,$0-16
//
// wrmsr
//
TEXT ·wrmsr(SB),NOSPLIT,$0-16
TEXT ·wrmsr(SB),NOSPLIT|NOFRAME,$0-16
MOVQ reg+0(FP), CX
MOVL value+8(FP), AX
MOVL value+12(FP), DX
@@ -238,7 +238,7 @@ TEXT ·wrmsr(SB),NOSPLIT,$0-16
//
// rdmsr
//
TEXT ·rdmsr(SB),NOSPLIT,$0-16
TEXT ·rdmsr(SB),NOSPLIT|NOFRAME,$0-16
MOVQ reg+0(FP), CX
BYTE $0x0f; BYTE $0x32;
MOVL AX, ret+8(FP)
@@ -246,13 +246,13 @@ TEXT ·rdmsr(SB),NOSPLIT,$0-16
RET
// stmxcsr reads the MXCSR control and status register.
TEXT ·stmxcsr(SB),NOSPLIT,$0-8
TEXT ·stmxcsr(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), SI
STMXCSR (SI)
RET
// ldmxcsr writes to the MXCSR control and status register.
TEXT ·ldmxcsr(SB),NOSPLIT,$0-8
TEXT ·ldmxcsr(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), SI
LDMXCSR (SI)
RET
+1 -1
View File
@@ -25,7 +25,7 @@
// GetASIDBits return the system ASID bits, 8 or 16 bits.
//
// func GetASIDBits() uint8
TEXT ·GetASIDBits(SB),NOSPLIT,$0-1
TEXT ·GetASIDBits(SB),NOSPLIT|NOFRAME,$0-1
// First, check whether 16bits ASID is supported.
// ID_AA64MMFR0_EL1.ASIDBITS[7:4] == 0010.
WORD $0xd5380700 // MRS ID_AA64MMFR0_EL1, R0
+11 -11
View File
@@ -20,7 +20,7 @@
//
// It must have the same frame configuration as swapUint32 so that it can undo
// any potential call frame set up by the assembler.
TEXT handleSwapUint32Fault(SB), NOSPLIT, $0-24
TEXT handleSwapUint32Fault(SB), NOSPLIT|NOFRAME, $0-24
MOVL DI, sig+20(FP)
RET
@@ -32,7 +32,7 @@ TEXT handleSwapUint32Fault(SB), NOSPLIT, $0-24
// Preconditions: ptr must be aligned to a 4-byte boundary.
//
//func swapUint32(ptr unsafe.Pointer, new uint32) (old uint32, sig int32)
TEXT ·swapUint32(SB), NOSPLIT, $0-24
TEXT ·swapUint32(SB), NOSPLIT|NOFRAME, $0-24
// Store 0 as the returned signal number. If we run to completion,
// this is the value the caller will see; if a signal is received,
// handleSwapUint32Fault will store a different value in this address.
@@ -56,7 +56,7 @@ TEXT ·addrOfSwapUint32(SB), $0-8
//
// It must have the same frame configuration as swapUint64 so that it can undo
// any potential call frame set up by the assembler.
TEXT handleSwapUint64Fault(SB), NOSPLIT, $0-28
TEXT handleSwapUint64Fault(SB), NOSPLIT|NOFRAME, $0-28
MOVL DI, sig+24(FP)
RET
@@ -68,7 +68,7 @@ TEXT handleSwapUint64Fault(SB), NOSPLIT, $0-28
// Preconditions: ptr must be aligned to a 8-byte boundary.
//
//func swapUint64(ptr unsafe.Pointer, new uint64) (old uint64, sig int32)
TEXT ·swapUint64(SB), NOSPLIT, $0-28
TEXT ·swapUint64(SB), NOSPLIT|NOFRAME, $0-28
// Store 0 as the returned signal number. If we run to completion,
// this is the value the caller will see; if a signal is received,
// handleSwapUint64Fault will store a different value in this address.
@@ -81,7 +81,7 @@ TEXT ·swapUint64(SB), NOSPLIT, $0-28
RET
// func addrOfSwapUint64() uintptr
TEXT ·addrOfSwapUint64(SB), $0-8
TEXT ·addrOfSwapUint64(SB), NOSPLIT|NOFRAME, $0-8
MOVQ $·swapUint64(SB), AX
MOVQ AX, ret+0(FP)
RET
@@ -92,7 +92,7 @@ TEXT ·addrOfSwapUint64(SB), $0-8
//
// It must have the same frame configuration as compareAndSwapUint32 so that it
// can undo any potential call frame set up by the assembler.
TEXT handleCompareAndSwapUint32Fault(SB), NOSPLIT, $0-24
TEXT handleCompareAndSwapUint32Fault(SB), NOSPLIT|NOFRAME, $0-24
MOVL DI, sig+20(FP)
RET
@@ -104,7 +104,7 @@ TEXT handleCompareAndSwapUint32Fault(SB), NOSPLIT, $0-24
// Preconditions: ptr must be aligned to a 4-byte boundary.
//
//func compareAndSwapUint32(ptr unsafe.Pointer, old, new uint32) (prev uint32, sig int32)
TEXT ·compareAndSwapUint32(SB), NOSPLIT, $0-24
TEXT ·compareAndSwapUint32(SB), NOSPLIT|NOFRAME, $0-24
// Store 0 as the returned signal number. If we run to completion, this is
// the value the caller will see; if a signal is received,
// handleCompareAndSwapUint32Fault will store a different value in this
@@ -120,7 +120,7 @@ TEXT ·compareAndSwapUint32(SB), NOSPLIT, $0-24
RET
// func addrOfCompareAndSwapUint32() uintptr
TEXT ·addrOfCompareAndSwapUint32(SB), $0-8
TEXT ·addrOfCompareAndSwapUint32(SB), NOSPLIT|NOFRAME, $0-8
MOVQ $·compareAndSwapUint32(SB), AX
MOVQ AX, ret+0(FP)
RET
@@ -131,7 +131,7 @@ TEXT ·addrOfCompareAndSwapUint32(SB), $0-8
//
// It must have the same frame configuration as loadUint32 so that it can undo
// any potential call frame set up by the assembler.
TEXT handleLoadUint32Fault(SB), NOSPLIT, $0-16
TEXT handleLoadUint32Fault(SB), NOSPLIT|NOFRAME, $0-16
MOVL DI, sig+12(FP)
RET
@@ -142,7 +142,7 @@ TEXT handleLoadUint32Fault(SB), NOSPLIT, $0-16
// Preconditions: ptr must be aligned to a 4-byte boundary.
//
//func loadUint32(ptr unsafe.Pointer) (val uint32, sig int32)
TEXT ·loadUint32(SB), NOSPLIT, $0-16
TEXT ·loadUint32(SB), NOSPLIT|NOFRAME, $0-16
// Store 0 as the returned signal number. If we run to completion,
// this is the value the caller will see; if a signal is received,
// handleLoadUint32Fault will store a different value in this address.
@@ -154,7 +154,7 @@ TEXT ·loadUint32(SB), NOSPLIT, $0-16
RET
// func addrOfLoadUint32() uintptr
TEXT ·addrOfLoadUint32(SB), $0-8
TEXT ·addrOfLoadUint32(SB), NOSPLIT|NOFRAME, $0-8
MOVQ $·loadUint32(SB), AX
MOVQ AX, ret+0(FP)
RET
+2 -2
View File
@@ -10,7 +10,7 @@
//
// It must have the same frame configuration as memclr so that it can undo any
// potential call frame set up by the assembler.
TEXT handleMemclrFault(SB), NOSPLIT, $0-28
TEXT handleMemclrFault(SB), NOSPLIT|NOFRAME, $0-28
MOVQ AX, addr+16(FP)
MOVL DI, sig+24(FP)
RET
@@ -27,7 +27,7 @@ TEXT handleMemclrFault(SB), NOSPLIT, $0-28
// The code is derived from runtime.memclrNoHeapPointers.
//
// func memclr(ptr unsafe.Pointer, n uintptr) (fault unsafe.Pointer, sig int32)
TEXT ·memclr(SB), NOSPLIT, $0-28
TEXT ·memclr(SB), NOSPLIT|NOFRAME, $0-28
// Store 0 as the returned signal number. If we run to completion,
// this is the value the caller will see; if a signal is received,
// handleMemclrFault will store a different value in this address.
+2 -2
View File
@@ -28,7 +28,7 @@
//
// It must have the same frame configuration as memcpy so that it can undo any
// potential call frame set up by the assembler.
TEXT handleMemcpyFault(SB), NOSPLIT, $0-36
TEXT handleMemcpyFault(SB), NOSPLIT|NOFRAME, $0-36
MOVQ AX, addr+24(FP)
MOVL DI, sig+32(FP)
RET
@@ -45,7 +45,7 @@ TEXT handleMemcpyFault(SB), NOSPLIT, $0-36
// The code is derived from the forward copying part of runtime.memmove.
//
// func memcpy(dst, src unsafe.Pointer, n uintptr) (fault unsafe.Pointer, sig int32)
TEXT ·memcpy(SB), NOSPLIT, $0-36
TEXT ·memcpy(SB), NOSPLIT|NOFRAME, $0-36
// Store 0 as the returned signal number. If we run to completion,
// this is the value the caller will see; if a signal is received,
// handleMemcpyFault will store a different value in this address.
+1 -1
View File
@@ -46,7 +46,7 @@
// DI - The signal number.
// SI - Pointer to siginfo_t structure.
// DX - Pointer to ucontext structure.
TEXT ·signalHandler(SB),NOSPLIT,$0
TEXT ·signalHandler(SB),NOSPLIT|NOFRAME,$0
// Check if the signal is from the kernel.
MOVQ $0x0, CX
CMPL CX, SI_CODE(SI)
+1 -1
View File
@@ -15,7 +15,7 @@
#include "textflag.h"
// func GetCPU() uint32
TEXT ·GetCPU(SB), NOSPLIT, $0-4
TEXT ·GetCPU(SB),NOSPLIT|NOFRAME,$0-4
BYTE $0x0f; BYTE $0x01; BYTE $0xf9; // RDTSCP
// On Linux, the bottom 12 bits of IA32_TSC_AUX are CPU and the upper 20
// are node. See arch/x86/entry/vdso/vma.c:vgetcpu_cpu_init().
+4 -4
View File
@@ -41,7 +41,7 @@
#define SYS_MMAP 9
// See bluepill.go.
TEXT ·bluepill(SB),NOSPLIT,$0
TEXT ·bluepill(SB),NOSPLIT|NOFRAME,$0
begin:
MOVQ arg+0(FP), AX
LEAQ VCPU_CPU(AX), BX
@@ -72,7 +72,7 @@ right_vCPU:
// SI - Pointer to siginfo_t structure.
// DX - Pointer to ucontext structure.
//
TEXT ·sighandler(SB),NOSPLIT,$0
TEXT ·sighandler(SB),NOSPLIT|NOFRAME,$0
// Check if the signal is from the kernel.
MOVQ $0x80, CX
CMPL CX, 0x8(SI)
@@ -103,7 +103,7 @@ TEXT ·addrOfSighandler(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·sigsysHandler(SB),NOSPLIT,$0
TEXT ·sigsysHandler(SB),NOSPLIT|NOFRAME,$0
// Check if the signal is from the kernel.
MOVQ $1, CX
CMPL CX, 0x8(SI)
@@ -129,7 +129,7 @@ TEXT ·addrOfSigsysHandler(SB), $0-8
RET
// dieTrampoline: see bluepill.go, bluepill_amd64_unsafe.go for documentation.
TEXT ·dieTrampoline(SB),NOSPLIT,$0
TEXT ·dieTrampoline(SB),NOSPLIT|NOFRAME,$0
PUSHQ BX // First argument (vCPU).
PUSHQ AX // Fake the old RIP as caller.
JMP ·dieHandler(SB)
+1 -1
View File
@@ -15,7 +15,7 @@
#include "textflag.h"
// stmxcsr reads the MXCSR control and status register.
TEXT ·stmxcsr(SB),NOSPLIT,$0-8
TEXT ·stmxcsr(SB),NOSPLIT|NOFRAME,$0-8
MOVQ addr+0(FP), SI
STMXCSR (SI)
RET
@@ -19,7 +19,7 @@
#include "funcdata.h"
#include "textflag.h"
TEXT ·Getpid(SB),NOSPLIT,$0
TEXT ·Getpid(SB),NOSPLIT|NOFRAME,$0
NO_LOCAL_POINTERS
MOVQ $39, AX // getpid
SYSCALL
@@ -31,7 +31,7 @@ TEXT ·AddrOfGetpid(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·touch(SB),NOSPLIT,$0
TEXT ·touch(SB),NOSPLIT|NOFRAME,$0
start:
MOVQ 0(AX), BX // deref AX
MOVQ $39, AX // getpid
@@ -44,7 +44,7 @@ TEXT ·AddrOfTouch(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·syscallLoop(SB),NOSPLIT,$0
TEXT ·syscallLoop(SB),NOSPLIT|NOFRAME,$0
start:
SYSCALL
JMP start
@@ -55,7 +55,7 @@ TEXT ·AddrOfSyscallLoop(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·spinLoop(SB),NOSPLIT,$0
TEXT ·spinLoop(SB),NOSPLIT|NOFRAME,$0
start:
JMP start
@@ -65,7 +65,7 @@ TEXT ·AddrOfSpinLoop(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·FloatingPointWorks(SB),NOSPLIT,$0
TEXT ·FloatingPointWorks(SB),NOSPLIT|NOFRAME,$0
NO_LOCAL_POINTERS
MOVQ $1, AX
MOVQ AX, X0
@@ -94,7 +94,7 @@ TEXT ·FloatingPointWorks(SB),NOSPLIT,$0
NOTQ DI; \
NOTQ SP;
TEXT ·twiddleRegsSyscall(SB),NOSPLIT,$0
TEXT ·twiddleRegsSyscall(SB),NOSPLIT|NOFRAME,$0
TWIDDLE_REGS()
SYSCALL
RET // never reached
@@ -105,7 +105,7 @@ TEXT ·AddrOfTwiddleRegsSyscall(SB), $0-8
MOVQ AX, ret+0(FP)
RET
TEXT ·twiddleRegsFault(SB),NOSPLIT,$0
TEXT ·twiddleRegsFault(SB),NOSPLIT|NOFRAME,$0
TWIDDLE_REGS()
JMP AX // must fault
RET // never reached
@@ -119,7 +119,7 @@ TEXT ·AddrOfTwiddleRegsFault(SB), $0-8
#define READ_FS() BYTE $0x64; BYTE $0x48; BYTE $0x8b; BYTE $0x00;
#define READ_GS() BYTE $0x65; BYTE $0x48; BYTE $0x8b; BYTE $0x00;
TEXT ·twiddleSegments(SB),NOSPLIT,$0
TEXT ·twiddleSegments(SB),NOSPLIT|NOFRAME,$0
MOVQ $0x0, AX
READ_GS()
MOVQ AX, BX
+2 -2
View File
@@ -34,7 +34,7 @@
//
// This should not be used outside the context of a new ptrace child (as the
// function is otherwise a bunch of nonsense).
TEXT ·stub(SB),NOSPLIT,$0
TEXT ·stub(SB),NOSPLIT|NOFRAME,$0
begin:
// N.B. This loop only executes in the context of a single-threaded
// fork child.
@@ -119,7 +119,7 @@ TEXT ·addrOfStub(SB), $0-8
//
// This is a distinct function because stub, above, may be mapped at any
// arbitrary location, and stub has a specific binary API (see above).
TEXT ·stubCall(SB),NOSPLIT,$0-16
TEXT ·stubCall(SB),NOSPLIT|NOFRAME,$0-16
MOVQ addr+0(FP), AX
MOVQ pid+8(FP), R15
JMP AX
+1 -1
View File
@@ -15,6 +15,6 @@
#include "funcdata.h"
#include "textflag.h"
TEXT ·spinloop(SB),NOSPLIT,$0
TEXT ·spinloop(SB),NOSPLIT|NOFRAME,$0
PAUSE
RET
+2 -2
View File
@@ -54,7 +54,7 @@
//
// This should not be used outside the context of a new ptrace child (as the
// function is otherwise a bunch of nonsense).
TEXT ·initStubProcess(SB),NOSPLIT,$0
TEXT ·initStubProcess(SB),NOSPLIT|NOFRAME,$0
begin:
// N.B. This loop only executes in the context of a single-threaded
// fork child.
@@ -206,7 +206,7 @@ TEXT ·addrOfInitStubProcess(SB), $0-8
//
// This is a distinct function because stub, above, may be mapped at any
// arbitrary location, and stub has a specific binary API (see above).
TEXT ·stubCall(SB),NOSPLIT,$0-16
TEXT ·stubCall(SB),NOSPLIT|NOFRAME,$0-16
MOVQ addr+0(FP), AX
MOVQ pid+8(FP), R15
JMP AX
+1 -1
View File
@@ -17,7 +17,7 @@
// Documentation is available in parameters.go.
//
// func muldiv64(value, multiplier, divisor uint64) (uint64, bool)
TEXT ·muldiv64(SB),NOSPLIT,$0-33
TEXT ·muldiv64(SB),NOSPLIT|NOFRAME,$0-33
MOVQ value+0(FP), AX
MOVQ multiplier+8(FP), BX
MOVQ divisor+16(FP), CX
+1 -1
View File
@@ -14,7 +14,7 @@
#include "textflag.h"
TEXT ·Rdtsc(SB),NOSPLIT,$0-8
TEXT ·Rdtsc(SB),NOSPLIT|NOFRAME,$0-8
// N.B. We need LFENCE on Intel, AMD is more complicated.
// Modern AMD CPUs with modern kernels make LFENCE behave like it does
// on Intel with MSR_F10H_DECFG_LFENCE_SERIALIZE_BIT. MFENCE is

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