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1. Adjust pin definition method 2. Improve RTC RAM function definition 3. Update License year

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This commit is contained in:
onexs-xsi
2026-01-07 11:04:51 +08:00
parent 999a65d0f1
commit ea07b03857
6 changed files with 29 additions and 27 deletions
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LICENSE
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@@ -1,6 +1,6 @@
MIT License
Copyright (c) 2025 M5Stack Technology CO LTD
Copyright (c) 2026 M5Stack Technology CO LTD
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
examples/interrupt_hardware/interrupt_hardware.ino
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 M5Stack Technology CO LTD
* SPDX-FileCopyrightText: 2026 M5Stack Technology CO LTD
*
* SPDX-License-Identifier: MIT
*/
@@ -40,7 +40,7 @@ M5IOE1 ioe1;
#define INT_PIN 1
// M5IOE1 I2C address (default 0x6F)
#define I2C_ADDR 0x6F
#define I2C_ADDR M5IOE1_DEFAULT_ADDR
// Pin definitions for M5IOE1 GPIOs
#define IOE1_PIN_1 M5IOE1_PIN_1 // IO1 on M5IOE1 (pin index 0)
examples/interrupt_polling/interrupt_polling.ino
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 M5Stack Technology CO LTD
* SPDX-FileCopyrightText: 2026 M5Stack Technology CO LTD
*
* SPDX-License-Identifier: MIT
*/
@@ -35,7 +35,7 @@ M5IOE1 ioe1;
#define I2C_FREQ 400000
// M5IOE1 I2C address (default 0x6F)
#define I2C_ADDR 0x6F
#define I2C_ADDR M5IOE1_DEFAULT_ADDR
// Pin definitions
#define IOE1_PIN_1 M5IOE1_PIN_1 // IO1 on M5IOE1 (pin index 0)
src/M5IOE1.cpp
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 M5Stack Technology CO LTD
* SPDX-FileCopyrightText: 2026 M5Stack Technology CO LTD
*
* SPDX-License-Identifier: MIT
*/
@@ -1190,7 +1190,7 @@ bool M5IOE1::refreshAw8737aPulse() {
// RTC RAM 功能 / RTC RAM Functions
// ============================
bool M5IOE1::writeRtcRam(uint8_t offset, const uint8_t* data, uint8_t length) {
bool M5IOE1::writeRtcRAM(uint8_t offset, const uint8_t* data, uint8_t length) {
if (data == nullptr || offset >= M5IOE1_RTC_RAM_SIZE ||
length == 0 || (offset + length) > M5IOE1_RTC_RAM_SIZE || !_initialized) {
return false;
@@ -1200,7 +1200,7 @@ bool M5IOE1::writeRtcRam(uint8_t offset, const uint8_t* data, uint8_t length) {
return _writeBytes(regAddr, data, length);
}
bool M5IOE1::readRtcRam(uint8_t offset, uint8_t* data, uint8_t length) {
bool M5IOE1::readRtcRAM(uint8_t offset, uint8_t* data, uint8_t length) {
if (data == nullptr || offset >= M5IOE1_RTC_RAM_SIZE ||
length == 0 || (offset + length) > M5IOE1_RTC_RAM_SIZE || !_initialized) {
return false;
src/M5IOE1.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 M5Stack Technology CO LTD
* SPDX-FileCopyrightText: 2026 M5Stack Technology CO LTD
*
* SPDX-License-Identifier: MIT
*/
@@ -24,21 +24,23 @@
// ============================
// IO 引脚定义 / IO Pin Definitions
// ============================
#define M5IOE1_PIN_NC -1
#define M5IOE1_PIN_1 0
#define M5IOE1_PIN_2 1
#define M5IOE1_PIN_3 2
#define M5IOE1_PIN_4 3
#define M5IOE1_PIN_5 4
#define M5IOE1_PIN_6 5
#define M5IOE1_PIN_7 6
#define M5IOE1_PIN_8 7
#define M5IOE1_PIN_9 8
#define M5IOE1_PIN_10 9
#define M5IOE1_PIN_11 10
#define M5IOE1_PIN_12 11
#define M5IOE1_PIN_13 12
#define M5IOE1_PIN_14 13
typedef enum {
M5IOE1_PIN_NC = -1,
M5IOE1_PIN_1 = 0,
M5IOE1_PIN_2 = 1,
M5IOE1_PIN_3 = 2,
M5IOE1_PIN_4 = 3,
M5IOE1_PIN_5 = 4,
M5IOE1_PIN_6 = 5,
M5IOE1_PIN_7 = 6,
M5IOE1_PIN_8 = 7,
M5IOE1_PIN_9 = 8,
M5IOE1_PIN_10 = 9,
M5IOE1_PIN_11 = 10,
M5IOE1_PIN_12 = 11,
M5IOE1_PIN_13 = 12,
M5IOE1_PIN_14 = 13
} m5ioe1_pin_t;
// ============================
// 设备常量 / Device Constants
@@ -592,8 +594,8 @@ public:
// ========================
// RTC RAM 功能 / RTC RAM Functions
// ========================
bool writeRtcRam(uint8_t offset, const uint8_t* data, uint8_t length);
bool readRtcRam(uint8_t offset, uint8_t* data, uint8_t length);
bool writeRtcRAM(uint8_t offset, const uint8_t* data, uint8_t length);
bool readRtcRAM(uint8_t offset, uint8_t* data, uint8_t length);
// ========================
// 系统配置 / System Configuration
src/M5IOE1_i2c_compat.h
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/*
* SPDX-FileCopyrightText: 2025 M5Stack Technology CO LTD
* SPDX-FileCopyrightText: 2026 M5Stack Technology CO LTD
*
* SPDX-License-Identifier: MIT
*/