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Add Timer support (PWM, OC, IC) for stmhal and teensy
This commit is contained in:
+1
-1
@@ -413,7 +413,7 @@ STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, mp_uint_t n_args, con
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STATIC mp_obj_t pin_obj_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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return pin_obj_init_helper(args[0], n_args - 1, args + 1, kw_args);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init);
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MP_DEFINE_CONST_FUN_OBJ_KW(pin_init_obj, 1, pin_obj_init);
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/// \method value([value])
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/// Get or set the digital logic level of the pin:
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+3
-1
@@ -82,12 +82,14 @@ extern const mp_obj_type_t pin_cpu_pins_obj_type;
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extern const mp_obj_dict_t pin_cpu_pins_locals_dict;
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extern const mp_obj_dict_t pin_board_pins_locals_dict;
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MP_DECLARE_CONST_FUN_OBJ(pin_init_obj);
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void pin_init0(void);
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uint32_t pin_get_mode(const pin_obj_t *pin);
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uint32_t pin_get_pull(const pin_obj_t *pin);
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uint32_t pin_get_af(const pin_obj_t *pin);
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const pin_obj_t *pin_find(mp_obj_t user_obj);
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const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t name);
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const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit, uint8_t pin_type);
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const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit);
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const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx);
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const pin_af_obj_t *pin_find_af_by_name(const pin_obj_t *pin, const char *name);
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@@ -64,17 +64,15 @@ const pin_obj_t *pin_find_named_pin(const mp_obj_dict_t *named_pins, mp_obj_t na
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return NULL;
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}
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/* unused
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const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit, uint8_t type) {
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const pin_af_obj_t *pin_find_af(const pin_obj_t *pin, uint8_t fn, uint8_t unit) {
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const pin_af_obj_t *af = pin->af;
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for (mp_uint_t i = 0; i < pin->num_af; i++, af++) {
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if (af->fn == fn && af->unit == unit && af->type == type) {
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if (af->fn == fn && af->unit == unit) {
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return af;
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}
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}
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return NULL;
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}
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*/
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const pin_af_obj_t *pin_find_af_by_index(const pin_obj_t *pin, mp_uint_t af_idx) {
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const pin_af_obj_t *af = pin->af;
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@@ -144,6 +144,9 @@ Q(recv)
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// for Timer class
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Q(Timer)
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Q(init)
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Q(deinit)
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Q(channel)
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Q(counter)
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Q(prescaler)
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Q(period)
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@@ -151,6 +154,30 @@ Q(callback)
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Q(freq)
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Q(mode)
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Q(div)
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Q(UP)
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Q(DOWN)
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Q(CENTER)
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Q(IC)
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Q(PWM)
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Q(PWM_INVERTED)
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Q(OC_TIMING)
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Q(OC_ACTIVE)
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Q(OC_INACTIVE)
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Q(OC_TOGGLE)
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Q(OC_FORCED_ACTIVE)
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Q(OC_FORCED_INACTIVE)
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Q(HIGH)
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Q(LOW)
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Q(RISING)
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Q(FALLING)
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Q(BOTH)
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// for TimerChannel class
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Q(TimerChannel)
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Q(pulse_width)
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Q(compare)
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Q(capture)
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Q(polarity)
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// for ExtInt class
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Q(ExtInt)
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+538
-54
File diff suppressed because it is too large
Load Diff
@@ -34,6 +34,7 @@ extern TIM_HandleTypeDef TIM5_Handle;
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extern TIM_HandleTypeDef TIM6_Handle;
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extern const mp_obj_type_t pyb_timer_type;
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extern const mp_obj_type_t pyb_timer_channel_type;
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void timer_init0(void);
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void timer_tim3_init(void);
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+7
-1
@@ -42,8 +42,11 @@ CFLAGS += -Og -ggdb
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else
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CFLAGS += -Os #-DNDEBUG
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endif
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CFLAGS += -fdata-sections -ffunction-sections
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LDFLAGS += -Wl,--gc-sections
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SRC_C = \
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hal_ftm.c \
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hal_gpio.c \
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help.c \
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import.c \
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@@ -54,7 +57,9 @@ SRC_C = \
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memzip.c \
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modpyb.c \
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pin_defs_teensy.c \
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reg.c \
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teensy_hal.c \
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timer.c \
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uart.c \
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usb.c \
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@@ -141,6 +146,7 @@ GEN_PINS_SRC = $(BUILD)/pins_gen.c
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GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
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GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
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GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
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GEN_PINS_AF_PY = $(BUILD)/pins_af.py
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# Making OBJ use an order-only depenedency on the generated pins.h file
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# has the side effect of making the pins.h file before we actually compile
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@@ -153,7 +159,7 @@ $(OBJ): | $(HEADER_BUILD)/pins.h
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# both pins_$(BOARD).c and pins.h
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$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: teensy_%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
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$(ECHO) "Create $@"
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$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) > $(GEN_PINS_SRC)
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$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
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$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c
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$(call compile_c)
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@@ -0,0 +1,201 @@
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/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
|
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <mk20dx128.h>
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#include "teensy_hal.h"
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void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm) {
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/* Check the parameters */
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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assert_param(IS_FTM_PRESCALERSHIFT(hftm->Init.PrescalerShift));
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assert_param(IS_FTM_COUNTERMODE(hftm->Init.CounterMode));
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assert_param(IS_FTM_PERIOD(hftm->Init.Period));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->MODE = FTM_MODE_WPDIS;
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FTMx->SC = 0;
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FTMx->MOD = hftm->Init.Period;
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uint32_t sc = FTM_SC_PS(hftm->Init.PrescalerShift);
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if (hftm->Init.CounterMode == FTM_COUNTERMODE_CENTER) {
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sc |= FTM_SC_CPWMS;
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}
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FTMx->SC = sc;
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->CNT = 0;
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FTMx->SC &= ~FTM_SC_CLKS(3);
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FTMx->SC |= FTM_SC_CLKS(1);
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->CNT = 0;
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FTMx->SC |= FTM_SC_CLKS(1) | FTM_SC_TOIE;
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm) {
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assert_param(IS_FTM_INSTANCE(hftm->Instance));
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hftm->State = HAL_FTM_STATE_BUSY;
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__HAL_FTM_DISABLE_TOF_IT(hftm);
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hftm->State = HAL_FTM_STATE_RESET;
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}
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void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_Init(hftm);
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}
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void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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assert_param(IS_FTM_CHANNEL(channel));
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assert_param(IS_FTM_OC_MODE(sConfig->OCMode));
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assert_param(IS_FTM_OC_PULSE(sConfig->Pulse));
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assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->channel[channel].CSC = sConfig->OCMode;
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FTMx->channel[channel].CV = sConfig->Pulse;
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if (sConfig->OCPolarity & 1) {
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FTMx->POL |= (1 << channel);
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} else {
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FTMx->POL &= ~(1 << channel);
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}
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
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// Nothing else to do
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}
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void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
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}
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void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_DeInit(hftm);
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}
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void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_Init(hftm);
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}
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void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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assert_param(IS_FTM_CHANNEL(channel));
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assert_param(IS_FTM_PWM_MODE(sConfig->OCMode));
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assert_param(IS_FTM_OC_PULSE(sConfig->Pulse));
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assert_param(IS_FTM_OC_POLARITY(sConfig->OCPolarity));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->channel[channel].CSC = sConfig->OCMode;
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FTMx->channel[channel].CV = sConfig->Pulse;
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if (sConfig->OCPolarity & 1) {
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FTMx->POL |= (1 << channel);
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} else {
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FTMx->POL &= ~(1 << channel);
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}
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
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// Nothing else to do
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}
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void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
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}
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void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_DeInit(hftm);
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}
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void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_Init(hftm);
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}
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void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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assert_param(IS_FTM_CHANNEL(channel));
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assert_param(IS_FTM_IC_POLARITY(sConfig->ICPolarity));
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hftm->State = HAL_FTM_STATE_BUSY;
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FTMx->channel[channel].CSC = sConfig->ICPolarity;
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hftm->State = HAL_FTM_STATE_READY;
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}
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void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel) {
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//FTM_TypeDef *FTMx = hftm->Instance;
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//assert_param(IS_FTM_INSTANCE(FTMx));
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// Nothing else to do
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}
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void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel) {
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FTM_TypeDef *FTMx = hftm->Instance;
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assert_param(IS_FTM_INSTANCE(FTMx));
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FTMx->channel[channel].CSC |= FTM_CSC_CHIE;
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}
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void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm) {
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HAL_FTM_Base_DeInit(hftm);
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}
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@@ -0,0 +1,184 @@
|
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/*
|
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* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2013, 2014 Damien P. George
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#define FTM0 ((FTM_TypeDef *)&FTM0_SC)
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#define FTM1 ((FTM_TypeDef *)&FTM1_SC)
|
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#define FTM2 ((FTM_TypeDef *)&FTM2_SC)
|
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|
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typedef struct {
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volatile uint32_t CSC; // Channel x Status And Control
|
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volatile uint32_t CV; // Channel x Value
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} FTM_ChannelTypeDef;
|
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|
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typedef struct {
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volatile uint32_t SC; // Status And Control
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volatile uint32_t CNT; // Counter
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volatile uint32_t MOD; // Modulo
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FTM_ChannelTypeDef channel[8];
|
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volatile uint32_t CNTIN; // Counter Initial Value
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volatile uint32_t STATUS; // Capture And Compare Status
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volatile uint32_t MODE; // Features Mode Selection
|
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volatile uint32_t SYNC; // Synchronization
|
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volatile uint32_t OUTINIT; // Initial State For Channels Output
|
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volatile uint32_t OUTMASK; // Output Mask
|
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volatile uint32_t COMBINE; // Function For Linked Channels
|
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volatile uint32_t DEADTIME; // Deadtime Insertion Control
|
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volatile uint32_t EXTTRIG; // FTM External Trigger
|
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volatile uint32_t POL; // Channels Polarity
|
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volatile uint32_t FMS; // Fault Mode Status
|
||||
volatile uint32_t FILTER; // Input Capture Filter Control
|
||||
volatile uint32_t FLTCTRL; // Fault Control
|
||||
volatile uint32_t QDCTRL; // Quadrature Decoder Control And Status
|
||||
volatile uint32_t CONF; // Configuration
|
||||
volatile uint32_t FLTPOL; // FTM Fault Input Polarity
|
||||
volatile uint32_t SYNCONF; // Synchronization Configuration
|
||||
volatile uint32_t INVCTRL; // FTM Inverting Control
|
||||
volatile uint32_t SWOCTRL; // FTM Software Output Control
|
||||
volatile uint32_t PWMLOAD; // FTM PWM Load
|
||||
} FTM_TypeDef;
|
||||
|
||||
typedef struct {
|
||||
uint32_t PrescalerShift; // Sets the prescaler to 1 << PrescalerShift
|
||||
uint32_t CounterMode; // One of FTM_COUNTERMODE_xxx
|
||||
uint32_t Period; // Specifies the Period for determining timer overflow
|
||||
} FTM_Base_InitTypeDef;
|
||||
|
||||
typedef struct {
|
||||
uint32_t OCMode; // One of FTM_OCMODE_xxx
|
||||
uint32_t Pulse; // Specifies initial pulse width (0-0xffff)
|
||||
uint32_t OCPolarity; // One of FTM_OCPOLRITY_xxx
|
||||
} FTM_OC_InitTypeDef;
|
||||
|
||||
typedef struct {
|
||||
uint32_t ICPolarity; // Specifies Rising/Falling/Both
|
||||
} FTM_IC_InitTypeDef;
|
||||
|
||||
#define IS_FTM_INSTANCE(INSTANCE) (((INSTANCE) == FTM0) || \
|
||||
((INSTANCE) == FTM1) || \
|
||||
((INSTANCE) == FTM2))
|
||||
|
||||
#define IS_FTM_PRESCALERSHIFT(PRESCALERSHIFT) (((PRESCALERSHIFT) & ~7) == 0)
|
||||
|
||||
#define FTM_COUNTERMODE_UP (0)
|
||||
#define FTM_COUNTERMODE_CENTER (FTM_SC_CPWMS)
|
||||
|
||||
#define IS_FTM_COUNTERMODE(MODE) (((MODE) == FTM_COUNTERMODE_UP) ||\
|
||||
((MODE) == FTM_COUNTERMODE_CENTER))
|
||||
|
||||
#define IS_FTM_PERIOD(PERIOD) (((PERIOD) & 0xFFFF0000) == 0)
|
||||
|
||||
#define FTM_CSC_CHF 0x80
|
||||
#define FTM_CSC_CHIE 0x40
|
||||
#define FTM_CSC_MSB 0x20
|
||||
#define FTM_CSC_MSA 0x10
|
||||
#define FTM_CSC_ELSB 0x08
|
||||
#define FTM_CSC_ELSA 0x04
|
||||
#define FTM_CSC_DMA 0x01
|
||||
|
||||
#define FTM_OCMODE_TIMING (0)
|
||||
#define FTM_OCMODE_ACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB | FTM_CSC_ELSA)
|
||||
#define FTM_OCMODE_INACTIVE (FTM_CSC_MSA | FTM_CSC_ELSB)
|
||||
#define FTM_OCMODE_TOGGLE (FTM_CSC_MSA | FTM_CSC_ELSA)
|
||||
#define FTM_OCMODE_PWM1 (FTM_CSC_MSB | FTM_CSC_ELSB)
|
||||
#define FTM_OCMODE_PWM2 (FTM_CSC_MSB | FTM_CSC_ELSA)
|
||||
|
||||
#define IS_FTM_OC_MODE(mode) ((mode) == FTM_OCMODE_TIMING || \
|
||||
(mode) == FTM_OCMODE_ACTIVE || \
|
||||
(mode) == FTM_OCMODE_INACTIVE || \
|
||||
(mode) == FTM_OCMODE_TOGGLE )
|
||||
|
||||
#define IS_FTM_PWM_MODE(mode) ((mode) == FTM_OCMODE_PWM1 || \
|
||||
(mode) == FTM_OCMODE_PWM2)
|
||||
|
||||
#define IS_FTM_CHANNEL(channel) (((channel) & ~7) == 0)
|
||||
|
||||
#define IS_FTM_PULSE(pulse) (((pulse) & ~0xffff) == 0)
|
||||
|
||||
#define FTM_OCPOLARITY_HIGH (0)
|
||||
#define FTM_OCPOLARITY_LOW (1)
|
||||
|
||||
#define IS_FTM_OC_POLARITY(polarity) ((polarity) == FTM_OCPOLARITY_HIGH || \
|
||||
(polarity) == FTM_OCPOLARITY_LOW)
|
||||
|
||||
#define FTM_ICPOLARITY_RISING (FTM_CSC_ELSA)
|
||||
#define FTM_ICPOLARITY_FALLING (FTM_CSC_ELSB)
|
||||
#define FTM_ICPOLARITY_BOTH (FTM_CSC_ELSA | FTM_CSC_ELSB)
|
||||
|
||||
#define IS_FTM_IC_POLARITY(polarity) ((polarity) == FTM_ICPOLARITY_RISING || \
|
||||
(polarity) == FTM_ICPOLARITY_FALLING || \
|
||||
(polarity) == FTM_ICPOLARITY_BOTH)
|
||||
|
||||
typedef enum {
|
||||
HAL_FTM_STATE_RESET = 0x00,
|
||||
HAL_FTM_STATE_READY = 0x01,
|
||||
HAL_FTM_STATE_BUSY = 0x02,
|
||||
} HAL_FTM_State;
|
||||
|
||||
typedef struct {
|
||||
FTM_TypeDef *Instance;
|
||||
FTM_Base_InitTypeDef Init;
|
||||
HAL_FTM_State State;
|
||||
|
||||
} FTM_HandleTypeDef;
|
||||
|
||||
#define __HAL_FTM_GET_TOF_FLAG(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOF) != 0)
|
||||
#define __HAL_FTM_CLEAR_TOF_FLAG(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOF)
|
||||
|
||||
#define __HAL_FTM_GET_TOF_IT(HANDLE) (((HANDLE)->Instance->SC & FTM_SC_TOIE) != 0)
|
||||
#define __HAL_FTM_ENABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC |= FTM_SC_TOIE)
|
||||
#define __HAL_FTM_DISABLE_TOF_IT(HANDLE) ((HANDLE)->Instance->SC &= ~FTM_SC_TOIE)
|
||||
|
||||
#define __HAL_FTM_GET_CH_FLAG(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHF) != 0)
|
||||
#define __HAL_FTM_CLEAR_CH_FLAG(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHF)
|
||||
|
||||
#define __HAL_FTM_GET_CH_IT(HANDLE, CH) (((HANDLE)->Instance->channel[CH].CSC & FTM_CSC_CHIE) != 0)
|
||||
#define __HAL_FTM_ENABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC |= FTM_CSC_CHIE)
|
||||
#define __HAL_FTM_DISABLE_CH_IT(HANDLE, CH) ((HANDLE)->Instance->channel[CH].CSC &= ~FTM_CSC_CHIE)
|
||||
|
||||
void HAL_FTM_Base_Init(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_Base_Start(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_Base_Start_IT(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_Base_DeInit(FTM_HandleTypeDef *hftm);
|
||||
|
||||
void HAL_FTM_OC_Init(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_OC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel);
|
||||
void HAL_FTM_OC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_OC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_OC_DeInit(FTM_HandleTypeDef *hftm);
|
||||
|
||||
void HAL_FTM_PWM_Init(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_PWM_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_OC_InitTypeDef* sConfig, uint32_t channel);
|
||||
void HAL_FTM_PWM_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_PWM_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_PWM_DeInit(FTM_HandleTypeDef *hftm);
|
||||
|
||||
void HAL_FTM_IC_Init(FTM_HandleTypeDef *hftm);
|
||||
void HAL_FTM_IC_ConfigChannel(FTM_HandleTypeDef *hftm, FTM_IC_InitTypeDef* sConfig, uint32_t channel);
|
||||
void HAL_FTM_IC_Start(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_IC_Start_IT(FTM_HandleTypeDef *hftm, uint32_t channel);
|
||||
void HAL_FTM_IC_DeInit(FTM_HandleTypeDef *hftm);
|
||||
|
||||
|
||||
+6
-3
@@ -17,7 +17,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||||
if ((GPIO_Init->Pin & bitmask) == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(GPIOx, position);
|
||||
|
||||
/*--------------------- GPIO Mode Configuration ------------------------*/
|
||||
@@ -50,6 +49,8 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||||
/* Check the Speed parameter */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
||||
|
||||
*port_pcr |= PORT_PCR_DSE;
|
||||
|
||||
/* Configure the IO Speed */
|
||||
if (GPIO_Init->Speed > GPIO_SPEED_MEDIUM) {
|
||||
*port_pcr &= ~PORT_PCR_SRE;
|
||||
@@ -59,10 +60,12 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
||||
|
||||
/* Configure the IO Output Type */
|
||||
if (GPIO_Init->Mode & GPIO_OUTPUT_TYPE) {
|
||||
*port_pcr |= PORT_PCR_ODE;
|
||||
*port_pcr |= PORT_PCR_ODE; // OD
|
||||
} else {
|
||||
*port_pcr &= ~PORT_PCR_ODE;
|
||||
*port_pcr &= ~PORT_PCR_ODE; // PP
|
||||
}
|
||||
} else {
|
||||
*port_pcr &= ~PORT_PCR_DSE;
|
||||
}
|
||||
|
||||
/* Activate the Pull-up or Pull down resistor for the current IO */
|
||||
|
||||
+23
-5
@@ -8,7 +8,7 @@ import sys
|
||||
import csv
|
||||
|
||||
SUPPORTED_FN = {
|
||||
'FTM' : ['CH0', 'CH1', 'CH2', 'CH3',
|
||||
'FTM' : ['CH0', 'CH1', 'CH2', 'CH3', 'CH4', 'CH5', 'CH6', 'CH7',
|
||||
'QD_PHA', 'QD_PHB'],
|
||||
'I2C' : ['SDA', 'SCL'],
|
||||
'UART' : ['RX', 'TX', 'CTS', 'RTS'],
|
||||
@@ -313,6 +313,17 @@ class Pins(object):
|
||||
print(' { %-*s %s },' % (mux_name_width + 26, key, val),
|
||||
file=af_const_file)
|
||||
|
||||
def print_af_py(self, af_py_filename):
|
||||
with open(af_py_filename, 'wt') as af_py_file:
|
||||
print('PINS_AF = (', file=af_py_file);
|
||||
for named_pin in self.board_pins:
|
||||
print(" ('%s', " % named_pin.name(), end='', file=af_py_file)
|
||||
for af in named_pin.pin().alt_fn:
|
||||
if af.is_supported():
|
||||
print("(%d, '%s'), " % (af.idx, af.af_str), end='', file=af_py_file)
|
||||
print('),', file=af_py_file)
|
||||
print(')', file=af_py_file)
|
||||
|
||||
|
||||
def main():
|
||||
parser = argparse.ArgumentParser(
|
||||
@@ -324,13 +335,19 @@ def main():
|
||||
"-a", "--af",
|
||||
dest="af_filename",
|
||||
help="Specifies the alternate function file for the chip",
|
||||
default="stm32f4xx-af.csv"
|
||||
default="mk20dx256_af.csv"
|
||||
)
|
||||
parser.add_argument(
|
||||
"--af-const",
|
||||
dest="af_const_filename",
|
||||
help="Specifies header file for alternate function constants.",
|
||||
default="build/pins-af-const.h"
|
||||
default="build/pins_af_const.h"
|
||||
)
|
||||
parser.add_argument(
|
||||
"--af-py",
|
||||
dest="af_py_filename",
|
||||
help="Specifies the filename for the python alternate function mappings.",
|
||||
default="build/pins_af.py"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-b", "--board",
|
||||
@@ -341,13 +358,13 @@ def main():
|
||||
"-p", "--prefix",
|
||||
dest="prefix_filename",
|
||||
help="Specifies beginning portion of generated pins file",
|
||||
default="stm32f4xx-prefix.c"
|
||||
default="mk20dx256_prefix.c"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-q", "--qstr",
|
||||
dest="qstr_filename",
|
||||
help="Specifies name of generated qstr header file",
|
||||
default="build/pins-qstr.h"
|
||||
default="build/pins_qstr.h"
|
||||
)
|
||||
parser.add_argument(
|
||||
"-r", "--hdr",
|
||||
@@ -381,6 +398,7 @@ def main():
|
||||
pins.print_header(args.hdr_filename)
|
||||
pins.print_qstr(args.qstr_filename)
|
||||
pins.print_af_hdr(args.af_const_filename)
|
||||
pins.print_af_py(args.af_py_filename)
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
|
||||
@@ -61,5 +61,5 @@ Pin,Name,Default,ALT0,ALT1,ALT2,ALT3,ALT4,ALT5,ALT6,ALT7,EzPort
|
||||
60,PTD3,DISABLED,,PTD3,SPI0_SIN,UART2_TX,,FB_AD3,,,
|
||||
61,PTD4/LLWU_P14,DISABLED,,PTD4/LLWU_P14,SPI0_PCS1,UART0_RTS_b,FTM0_CH4,FB_AD2,EWM_IN,,
|
||||
62,PTD5,ADC0_SE6b,ADC0_SE6b,PTD5,SPI0_PCS2,UART0_CTS_b/UART0_COL_b,FTM0_CH5,FB_AD1,EWM_OUT_b,,
|
||||
63,PTD6/LLWU_P15,ADC0_SE7b,ADC0_SE7b,PTD6/LLWU_P15,SPI0_PCS3,UART0_RX,FTM0_CH6,FB_AD0,FTM0_FLT0,,
|
||||
63,PTD6/LLWU_P15,ADC0_SE7b,ADC0_SE7b,PTD6/LLWU_P15,SPI0_PCS3,UART0_RX,FTM0_CH6,FB_AD0,FTM0_FLT0f,,
|
||||
64,PTD7,DISABLED,,PTD7,CMT_IRO,UART0_TX,FTM0_CH7,,FTM0_FLT1,,
|
||||
|
||||
|
+2
-2
@@ -43,7 +43,7 @@
|
||||
#include "pyexec.h"
|
||||
#include "led.h"
|
||||
#include "pin.h"
|
||||
//#include "timer.h"
|
||||
#include "timer.h"
|
||||
#include "extint.h"
|
||||
#include "usrsw.h"
|
||||
#include "rng.h"
|
||||
@@ -252,7 +252,7 @@ STATIC const mp_map_elem_t pyb_module_globals_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_udelay), (mp_obj_t)&pyb_udelay_obj },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_sync), (mp_obj_t)&pyb_sync_obj },
|
||||
|
||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_Timer), (mp_obj_t)&pyb_timer_type },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_Timer), (mp_obj_t)&pyb_timer_type },
|
||||
|
||||
//#if MICROPY_HW_ENABLE_RNG
|
||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_rng), (mp_obj_t)&pyb_rng_get_obj },
|
||||
|
||||
@@ -20,6 +20,12 @@
|
||||
#define MICROPY_PY_SYS_STDFILES (1)
|
||||
#define MICROPY_PY_CMATH (1)
|
||||
|
||||
#define MICROPY_TIMER_REG (0)
|
||||
#define MICROPY_REG (MICROPY_TIMER_REG)
|
||||
|
||||
#define MICROPY_ENABLE_EMERGENCY_EXCEPTION_BUF (1)
|
||||
#define MICROPY_EMERGENCY_EXCEPTION_BUF_SIZE (0)
|
||||
|
||||
// extra built in names to add to the global namespace
|
||||
extern const struct _mp_obj_fun_builtin_t mp_builtin_help_obj;
|
||||
extern const struct _mp_obj_fun_builtin_t mp_builtin_input_obj;
|
||||
|
||||
@@ -14,10 +14,13 @@
|
||||
// GPIO_MODE_AF_PP, GPIO_MODE_AF_OD, or GPIO_MODE_ANALOG.
|
||||
|
||||
uint32_t pin_get_mode(const pin_obj_t *pin) {
|
||||
if (pin->gpio == NULL) {
|
||||
// Analog only pin
|
||||
return GPIO_MODE_ANALOG;
|
||||
}
|
||||
volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
|
||||
uint32_t pcr = *port_pcr;
|
||||
uint32_t af = (*port_pcr & PORT_PCR_MUX_MASK) >> 8;;
|
||||
|
||||
uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8;
|
||||
if (af == 0) {
|
||||
return GPIO_MODE_ANALOG;
|
||||
}
|
||||
@@ -41,10 +44,18 @@ uint32_t pin_get_mode(const pin_obj_t *pin) {
|
||||
// be one of GPIO_NOPULL, GPIO_PULLUP, or GPIO_PULLDOWN.
|
||||
|
||||
uint32_t pin_get_pull(const pin_obj_t *pin) {
|
||||
volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
|
||||
if (pin->gpio == NULL) {
|
||||
// Analog only pin
|
||||
return GPIO_NOPULL;
|
||||
}
|
||||
volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
|
||||
|
||||
uint32_t pcr = *port_pcr;
|
||||
if (pcr & PORT_PCR_PE) {
|
||||
uint32_t af = (pcr & PORT_PCR_MUX_MASK) >> 8;
|
||||
|
||||
// pull is only valid for digital modes (hence the af > 0 test)
|
||||
|
||||
if (af > 0 && (pcr & PORT_PCR_PE) != 0) {
|
||||
if (pcr & PORT_PCR_PS) {
|
||||
return GPIO_PULLUP;
|
||||
}
|
||||
@@ -56,6 +67,10 @@ uint32_t pin_get_pull(const pin_obj_t *pin) {
|
||||
// Returns the af (alternate function) index currently set for a pin.
|
||||
|
||||
uint32_t pin_get_af(const pin_obj_t *pin) {
|
||||
if (pin->gpio == NULL) {
|
||||
// Analog only pin
|
||||
return 0;
|
||||
}
|
||||
volatile uint32_t *port_pcr = GPIO_PIN_TO_PORT_PCR(pin->gpio, pin->pin);
|
||||
return (*port_pcr & PORT_PCR_MUX_MASK) >> 8;
|
||||
}
|
||||
|
||||
@@ -19,6 +19,10 @@ enum {
|
||||
AF_PIN_TYPE_FTM_CH1,
|
||||
AF_PIN_TYPE_FTM_CH2,
|
||||
AF_PIN_TYPE_FTM_CH3,
|
||||
AF_PIN_TYPE_FTM_CH4,
|
||||
AF_PIN_TYPE_FTM_CH5,
|
||||
AF_PIN_TYPE_FTM_CH6,
|
||||
AF_PIN_TYPE_FTM_CH7,
|
||||
AF_PIN_TYPE_FTM_QD_PHA,
|
||||
AF_PIN_TYPE_FTM_QD_PHB,
|
||||
|
||||
|
||||
@@ -87,6 +87,42 @@ Q(PULL_NONE)
|
||||
Q(PULL_UP)
|
||||
Q(PULL_DOWN)
|
||||
|
||||
// for Timer class
|
||||
Q(Timer)
|
||||
Q(init)
|
||||
Q(deinit)
|
||||
Q(channel)
|
||||
Q(counter)
|
||||
Q(prescaler)
|
||||
Q(period)
|
||||
Q(callback)
|
||||
Q(freq)
|
||||
Q(mode)
|
||||
Q(reg)
|
||||
Q(UP)
|
||||
Q(CENTER)
|
||||
Q(IC)
|
||||
Q(PWM)
|
||||
Q(PWM_INVERTED)
|
||||
Q(OC_TIMING)
|
||||
Q(OC_ACTIVE)
|
||||
Q(OC_INACTIVE)
|
||||
Q(OC_TOGGLE)
|
||||
Q(OC_FORCED_ACTIVE)
|
||||
Q(OC_FORCED_INACTIVE)
|
||||
Q(HIGH)
|
||||
Q(LOW)
|
||||
Q(RISING)
|
||||
Q(FALLING)
|
||||
Q(BOTH)
|
||||
|
||||
// for TimerChannel class
|
||||
Q(TimerChannel)
|
||||
Q(pulse_width)
|
||||
Q(compare)
|
||||
Q(capture)
|
||||
Q(polarity)
|
||||
t
|
||||
// for UART class
|
||||
Q(UART)
|
||||
Q(baudrate)
|
||||
|
||||
@@ -0,0 +1,52 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "mpconfig.h"
|
||||
#include "nlr.h"
|
||||
#include "misc.h"
|
||||
#include "qstr.h"
|
||||
#include "obj.h"
|
||||
#include "runtime.h"
|
||||
#include "reg.h"
|
||||
|
||||
#if MICROPY_REG
|
||||
|
||||
mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_regs, uint n_args, const mp_obj_t *args) {
|
||||
if (n_args == 0) {
|
||||
// dump all regs
|
||||
|
||||
for (mp_uint_t reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) {
|
||||
printf(" %-8s @0x%08x = 0x%08lx\n",
|
||||
reg->name, (mp_uint_t)base + reg->offset, *(uint32_t *)((uint8_t *)base + reg->offset));
|
||||
}
|
||||
return mp_const_none;
|
||||
}
|
||||
|
||||
mp_uint_t addr = 0;
|
||||
|
||||
if (MP_OBJ_IS_STR(args[0])) {
|
||||
const char *name = mp_obj_str_get_str(args[0]);
|
||||
mp_uint_t reg_idx;
|
||||
for (reg_idx = 0; reg_idx < num_regs; reg_idx++, reg++) {
|
||||
if (strcmp(name, reg->name) == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (reg_idx >= num_regs) {
|
||||
printf("Unknown register: '%s'\n", name);
|
||||
return mp_const_none;
|
||||
}
|
||||
addr = (mp_uint_t)base + reg->offset;
|
||||
} else {
|
||||
addr = (mp_uint_t)base + mp_obj_get_int(args[0]);
|
||||
}
|
||||
|
||||
if (n_args < 2) {
|
||||
// get
|
||||
printf("0x%08lx\n", *(uint32_t *)addr);
|
||||
} else {
|
||||
*(uint32_t *)addr = mp_obj_get_int(args[1]);
|
||||
}
|
||||
return mp_const_none;
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,8 @@
|
||||
typedef struct {
|
||||
const char *name;
|
||||
mp_uint_t offset;
|
||||
} reg_t;
|
||||
|
||||
#define REG_ENTRY(st, name) { #name, offsetof(st, name) }
|
||||
|
||||
mp_obj_t reg_cmd(void *base, reg_t *reg, mp_uint_t num_reg, uint n_args, const mp_obj_t *args);
|
||||
+4
-9
@@ -1,4 +1,5 @@
|
||||
#include <mk20dx128.h>
|
||||
#include "hal_ftm.h"
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
@@ -7,9 +8,7 @@
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#define FTM0 ((FTM_TypeDef *)&FTM0_SC)
|
||||
#define FTM1 ((FTM_TypeDef *)&FTM1_SC)
|
||||
#define FTM2 ((FTM_TypeDef *)&FTM2_SC)
|
||||
#define HAL_NVIC_EnableIRQ(irq) NVIC_ENABLE_IRQ(irq)
|
||||
|
||||
#define GPIOA ((GPIO_TypeDef *)&GPIOA_PDOR)
|
||||
#define GPIOB ((GPIO_TypeDef *)&GPIOB_PDOR)
|
||||
@@ -29,10 +28,6 @@
|
||||
#define UART1 ((UART_TypeDef *)&UART1_BDH)
|
||||
#define UART2 ((UART_TypeDef *)&UART2_BDH)
|
||||
|
||||
typedef struct {
|
||||
uint32_t dummy;
|
||||
} FTM_TypeDef;
|
||||
|
||||
typedef struct {
|
||||
uint32_t dummy;
|
||||
} I2C_TypeDef;
|
||||
@@ -93,10 +88,10 @@ typedef struct {
|
||||
} GPIO_InitTypeDef;
|
||||
|
||||
#define GPIO_PORT_TO_PORT_NUM(GPIOx) \
|
||||
((GPIOx->PDOR - GPIOA_PDOR) / (GPIOB_PDOR - GPIOA_PDOR))
|
||||
((&GPIOx->PDOR - &GPIOA_PDOR) / (&GPIOB_PDOR - &GPIOA_PDOR))
|
||||
|
||||
#define GPIO_PIN_TO_PORT_PCR(GPIOx, pin) \
|
||||
(&PORTA_PCR0 + GPIO_PORT_TO_PORT_NUM(GPIOx) * 32 + (pin))
|
||||
(&PORTA_PCR0 + (GPIO_PORT_TO_PORT_NUM(GPIOx) * 0x400) + (pin))
|
||||
|
||||
#define GPIO_AF2_I2C0 2
|
||||
#define GPIO_AF2_I2C1 2
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user