stmhal: Implement delayed RTC initialization with LSI fallback.

If RTC is already running at boot then it's left alone.  Otherwise, RTC is
started at boot but startup function returns straight away.  RTC startup
is then finished the first time it is used.  Fallback to LSI if LSE fails
to start in a certain time.

Also included:
 MICROPY_HW_CLK_LAST_FREQ
        hold pyb.freq() parameters in RTC backup reg
 MICROPY_HW_RTC_USE_US
        option to present datetime sub-seconds in microseconds
 MICROPY_HW_RTC_USE_CALOUT
        option to enable RTC calibration output

CLK_LAST_FREQ and RTC_USE_CALOUT are enabled for PYBv1.0.

stmhal/boards/PYBV10/mpconfigboard.h

@@ -22,9 +22,12 @@
 #define MICROPY_HW_CLK_PLLN (336)
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
 #define MICROPY_HW_CLK_PLLQ (7)
+#define MICROPY_HW_CLK_LAST_FREQ (1)
 
 // The pyboard has a 32kHz crystal for the RTC
 #define MICROPY_HW_RTC_USE_LSE      (1)
+#define MICROPY_HW_RTC_USE_US       (0)
+#define MICROPY_HW_RTC_USE_CALOUT   (1)
 
 // UART config
 #define MICROPY_HW_UART1_NAME "XB"

stmhal/diskio.c

@@ -279,6 +279,7 @@ DWORD get_fattime (
     void
 )
 {
+    rtc_init_finalise();
     RTC_TimeTypeDef time;
     RTC_DateTypeDef date;
     HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN);

stmhal/main.c

@@ -422,7 +422,7 @@ soft_reset:
 
 #if MICROPY_HW_ENABLE_RTC
     if (first_soft_reset) {
-        rtc_init();
+        rtc_init_start();
     }
 #endif
 

stmhal/modmachine.c

@@ -39,6 +39,7 @@
 #include "pin.h"
 #include "timer.h"
 #include "usb.h"
+#include "rtc.h"
 #include "i2c.h"
 #include "spi.h"
 
@@ -281,6 +282,9 @@ STATIC mp_obj_t machine_freq(mp_uint_t n_args, const mp_obj_t *args) {
         } else {
             RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
         }
+        uint32_t h = RCC_ClkInitStruct.AHBCLKDivider >> 4;
+        uint32_t b1 = RCC_ClkInitStruct.APB1CLKDivider >> 10;
+        uint32_t b2 = RCC_ClkInitStruct.APB2CLKDivider >> 10;
         if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
             goto fail;
         }
@@ -312,6 +316,23 @@ STATIC mp_obj_t machine_freq(mp_uint_t n_args, const mp_obj_t *args) {
         // re-init TIM3 for USB CDC rate
         timer_tim3_init();
 
+        #if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
+        #if defined(MCU_SERIES_F7)
+        #define FREQ_BKP BKP31R
+        #else
+        #define FREQ_BKP BKP19R
+        #endif
+        // qqqqqqqq pppppppp nnnnnnnn nnmmmmmm
+        // qqqqQQQQ ppppppPP nNNNNNNN NNMMMMMM
+        // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM
+        p = (p / 2) - 1;
+        RTC->FREQ_BKP = m
+            | (n << 6) | (p << 16) | (q << 18)
+            | (h << 22)
+            | (b1 << 26)
+            | (b2 << 29);
+        #endif
+
         return mp_const_none;
 
     fail:;
@@ -349,6 +370,8 @@ STATIC mp_obj_t machine_sleep(void) {
 MP_DEFINE_CONST_FUN_OBJ_0(machine_sleep_obj, machine_sleep);
 
 STATIC mp_obj_t machine_deepsleep(void) {
+    rtc_init_finalise();
+
 #if defined(MCU_SERIES_F7)
     printf("machine.deepsleep not supported yet\n");
 #else

stmhal/modutime.c

@@ -57,6 +57,7 @@ STATIC mp_obj_t time_localtime(mp_uint_t n_args, const mp_obj_t *args) {
     if (n_args == 0 || args[0] == mp_const_none) {
         // get current date and time
         // note: need to call get time then get date to correctly access the registers
+        rtc_init_finalise();
         RTC_DateTypeDef date;
         RTC_TimeTypeDef time;
         HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN);
@@ -119,6 +120,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime);
 STATIC mp_obj_t time_time(void) {
     // get date and time
     // note: need to call get time then get date to correctly access the registers
+    rtc_init_finalise();
     RTC_DateTypeDef date;
     RTC_TimeTypeDef time;
     HAL_RTC_GetTime(&RTCHandle, &time, FORMAT_BIN);

stmhal/rtc.h

@@ -27,4 +27,5 @@
 extern RTC_HandleTypeDef RTCHandle;
 extern const mp_obj_type_t pyb_rtc_type;
 
-void rtc_init(void);
+void rtc_init_start(void);
+void rtc_init_finalise(void);

stmhal/system_stm32.c

@@ -269,15 +269,66 @@ void SystemClock_Config(void)
      regarding system frequency refer to product datasheet.  */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
-  /* Enable HSE Oscillator and activate PLL with HSE as source */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = MICROPY_HW_CLK_PLLM;
-  RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN;
-  RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP;
-  RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ;
+    /* Enable HSE Oscillator and activate PLL with HSE as source */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+     clocks dividers */
+    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+
+#if defined(MICROPY_HW_CLK_LAST_FREQ) && MICROPY_HW_CLK_LAST_FREQ
+    #if defined(MCU_SERIES_F7)
+    #define FREQ_BKP BKP31R
+    #else
+    #define FREQ_BKP BKP19R
+    #endif
+    uint32_t m = RTC->FREQ_BKP;
+    uint32_t n;
+    uint32_t p;
+    uint32_t q;
+
+    // 222111HH HHQQQQPP nNNNNNNN NNMMMMMM
+    uint32_t h = (m >> 22) & 0xf;
+    uint32_t b1 = (m >> 26) & 0x7;
+    uint32_t b2 = (m >> 29) & 0x7;
+    q = (m >> 18) & 0xf;
+    p = (((m >> 16) & 0x03)+1)*2;
+    n = (m >> 6) & 0x3ff;
+    m &= 0x3f;
+    if ((q < 2) || (q > 15) || (p > 8) || (p < 2) || (n < 192) || (n >= 433) || (m < 2)) {
+        m = MICROPY_HW_CLK_PLLM;
+        n = MICROPY_HW_CLK_PLLN;
+        p = MICROPY_HW_CLK_PLLP;
+        q = MICROPY_HW_CLK_PLLQ;
+        h = RCC_SYSCLK_DIV1;
+        b1 = RCC_HCLK_DIV4;
+        b2 = RCC_HCLK_DIV2;
+    } else {
+        h <<= 4;
+        b1 <<= 10;
+        b2 <<= 10;
+    }
+    RCC_OscInitStruct.PLL.PLLM = m; //MICROPY_HW_CLK_PLLM;
+    RCC_OscInitStruct.PLL.PLLN = n; //MICROPY_HW_CLK_PLLN;
+    RCC_OscInitStruct.PLL.PLLP = p; //MICROPY_HW_CLK_PLLP;
+    RCC_OscInitStruct.PLL.PLLQ = q; //MICROPY_HW_CLK_PLLQ;
+
+    RCC_ClkInitStruct.AHBCLKDivider = h;  //RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = b1; //RCC_HCLK_DIV4;
+    RCC_ClkInitStruct.APB2CLKDivider = b2; //RCC_HCLK_DIV2;
+#else
+    RCC_OscInitStruct.PLL.PLLM = MICROPY_HW_CLK_PLLM;
+    RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN;
+    RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP;
+    RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ;
+
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+#endif
   if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
   {
     __fatal_error("HAL_RCC_OscConfig");
@@ -291,14 +342,6 @@ void SystemClock_Config(void)
   }
 #endif
 
-  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-     clocks dividers */
-  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-
 #if !defined(MICROPY_HW_FLASH_LATENCY)
 #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_5
 #endif