m5/ATOM-and-Module-Display-FPGA-Source
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Author SHA1 Message Date
Kenta IDA 12c837ef30 Merge pull request #4 from ciniml/fix_readme 
Fix README.
 2023-02-07 02:56:15 +09:00
Kenta IDA d3efd5a97f Fix README. 2023-02-07 02:55:06 +09:00
Kenta IDA 70b03d5cfa Merge pull request #3 from ciniml/feature/set_pixel_clock 
[Feature] Implement PLL configuration command to change pixel clock.
 2023-02-07 02:48:31 +09:00
Kenta IDA 6efb9f9048 Update M5GFX 2023-02-07 02:46:46 +09:00
Kenta IDA 97638b709f Implement Module Display auto detection. 2023-02-05 10:09:16 +09:00
Kenta IDA 05d9a8120a Add Module Display detection pin definition. 2023-01-22 15:14:44 +09:00
Kenta IDA 6183a5375f Merge branch 'm5display' into feature/set_pixel_clock 2023-01-22 13:29:37 +09:00
Kenta IDA b3ce48669a Update M5GFX 2023-01-22 11:18:13 +09:00
Kenta IDA afbd67ffef Implement SET_PIXEL_CLOCK command. 2023-01-21 20:07:23 +09:00
Kenta IDA f8dc9079e9 Use AR glass 640x400 timing. 2023-01-13 02:19:57 +09:00
Kenta IDA 8635f2fd43 Use CEA-861 video timing to generate 640x480 60Hz. 2023-01-12 01:22:57 +09:00
Kenta IDA b711ef4b9c Change M5GFX submodule to https 2023-01-11 11:27:27 +09:00
Kenta IDA 3585f7d6e7 Change fpga_samples submodule URL to https 2023-01-11 11:21:07 +09:00
Kenta IDA b922a2a46f Experimental 640x480 resolution mode. 2023-01-11 10:46:57 +09:00
Kenta IDA 10a1c033bc Fix block diagram not to use word wrapping. add background color. 2023-01-03 20:21:41 +09:00
Kenta IDA c2c4af0a75 Add prebuilt bitstream 2022-09-11 19:36:42 +09:00
Kenta IDA 942ada676a Implement latency checker with manual ADC sampling. 2022-09-11 19:31:43 +09:00
Kenta IDA cf046d24e3 Add Latency Checker 2022-09-11 13:18:58 +09:00
Kenta IDA 9456ade5ef LED pins for Module Display Proto. 
Disable MISO output driver when SPI CS is deasserted.
 2022-09-02 23:57:02 +09:00
Kenta IDA faafa0f75c Add M5Display support 2022-08-27 15:06:06 +09:00
Kenta IDA 6fc4f3dc81 temporary commit 2022-08-27 10:13:36 +09:00
Kenta IDA 70a7b55a54 Implement COPY_RECT Y-axis backward transfer and X-axis overlapping transfer. 2022-05-07 18:02:39 +09:00
Kenta IDA cd6b90d3f9 Revert frame buffer write access condition. 2022-03-27 11:07:46 +09:00
Kenta IDA df0e445b7e Generate bitstream header file with 16 octets per row. 2022-03-27 10:15:45 +09:00
Kenta IDA 567a934ae1 Upgrade M5GFX 2022-03-27 10:15:33 +09:00