Nishanth Menon 77b02b89ae tcl/target/ti_k3: Rename m3 target as sysctrl ...

The M3 is the system controller of the system. Lets rename it to make
clear what we are debugging - esp when multiple MCUs are present in the
system.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I4cd03b6068b8ce140fd254f9dd88151c4c7006d7
Reviewed-on: https://review.openocd.org/c/openocd/+/6618
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

2022-03-12 09:40:02 +00:00

..

board

board: Add NXP LS1088ARDB

2022-02-26 15:36:38 +00:00

chip

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

cpld

cpld: altera-epm240: Increase adapter speed

2022-02-26 15:29:52 +00:00

cpu

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

fpga

tcl: add lattice ECP5 family support

2021-08-25 03:47:50 +00:00

interface

Cadence virtual debug interface (vdebug) integration

2022-02-14 15:12:10 +00:00

target

tcl/target/ti_k3: Rename m3 target as sysctrl

2022-03-12 09:40:02 +00:00

test

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

tools

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

bitsbytes.tcl

tcl: fix some minor typo

2021-05-22 10:06:26 +01:00

mem_helper.tcl

tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:48:44 +01:00

memory.tcl

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00

mmr_helpers.tcl

tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change

2021-05-08 09:49:08 +01:00