Thomas Koeller c9e2d13cf9 DM36x: pll & clock setup ...

Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

2010-06-15 10:40:05 +02:00

..

board

cfg: update stm32 performance stick config

2010-05-21 11:45:40 +01:00

chip

Remove annoying end-of-line whitespace from tcl/* files

2009-09-21 18:48:22 +00:00

cpld

Xilinx xcr3256.cfg basic config script

2009-10-12 15:12:35 +02:00

cpu/arm

Move TCL script files -- Step 2 of 2:

2009-05-27 06:49:24 +00:00

interface

Add VPACLink interface definition

2010-04-26 07:08:52 +02:00

target

DM36x: pll & clock setup

2010-06-15 10:40:05 +02:00

test

rename jtag_nsrst_delay as adapter_nsrst_delay

2010-03-15 08:41:30 -07:00

bitsbytes.tcl

Remove annoying end-of-line whitespace from tcl/* files

2009-09-21 18:48:22 +00:00

memory.tcl

Remove annoying end-of-line whitespace from tcl/* files

2009-09-21 18:48:22 +00:00

mmr_helpers.tcl

Remove annoying end-of-line whitespace from tcl/* files

2009-09-21 18:48:22 +00:00

readable.tcl

Remove annoying end-of-line whitespace from tcl/* files

2009-09-21 18:48:22 +00:00