Commit Graph

8114 Commits

Author SHA1 Message Date
Tomas Vanek
f78a7046a9 flash/nor/atsame5: fix typo in dsu_reset_deassert help text
Change-Id: Iebed1a160376717d19c5f56b2553f7d4d1eed3a7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5095
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2019-05-04 19:44:05 +01:00
Tim Newsome
bbdb820c82 flash/fespi: Use COMMAND_PARSE_ADDRESS
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: If4d22fe1440f926271274820f96428718a127ac2
Reviewed-on: http://openocd.zylin.com/5100
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-24 21:11:18 +01:00
Leonard Crestez
c63c73c743 target/imx8m: Cleanup defaults
* Add mem_ap for direct access to axi bus (without halting cpu)
* Mark m4 core with -defer-examine because it's not used by default
* Make a53.0 default target since it's the boot core

Change-Id: Id031533c5d4af346eb08a9ac2532fa1bca602913
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5036
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:46 +01:00
Leonard Crestez
23836fc5be target/imx6ul: Initial support
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7
which is at a different address so a custom script is required.

Tested on imx6ull-14x14-evk

Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5040
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:33 +01:00
Leonard Crestez
b13055069c target/imx6sx: Initial support
Unlike the rest of imx6 a Cortex-M4 was added with a second CoreSight
DAP so a separate script is required.

Tested on imx6sx-sdb running linux

Change-Id: I1561910b233015f42508f341175822c0827655ec
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5041
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:22 +01:00
Leonard Crestez
537bbefcbd target/imx7ulp: Initial support
Unlike imx7d/solo supported by imx7.cfg the M4 core is on a different AP
and is always running by default so no -defer-examine is required.

There is also only one Cortex-A7

Tested on imx7ulp-evk

Change-Id: Ifa923d1b9a372c788e6654bc2233fd4d9073a32d
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5043
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:11:07 +01:00
Antonio Borneo
ae4b2720a4 doc/openocd.texi: fix cross referencing
Commit b04c7c2ca5 adds the cross
reference target "adapter_usb_location", but references it with
the command @xref inside a text, where command @ref should be
used. This triggers a compile warning:
	doc/openocd.texi:2517: warning: `.' or `,' must follow @xref, not c

Replace @xref with @ref and adapt both the text and the command
syntax.

Change-Id: I1520ffecb7d1d375f924492b1884d5b47f399007
Fixes: b04c7c2ca5 ("ftdi: use "adapter usb location" instead of
ftdi_location command")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5045
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:31 +01:00
Tommy Vestermark
83515b60c9 armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5
References:
- ARM DDI0406C ARMv7 Architecture Reference Manual, section B4.1.106
- ARM DDI0460D Cortex-R5 Technical Reference Manual section 4.3.6
- ARM 100048_0002_0 Cortex-A73 Technical Reference Manual section 4.5.2

Tested on: TMS570LC4357

Change-Id: Ie0d45fb697697f78cc4ad4e7a0116be9772590ba
Signed-off-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-on: http://openocd.zylin.com/5108
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:13 +01:00
Alexander Kurz
33281a87b6 tcl/board: Add config for the Amazon Kindle 2 and DX
Add a config to access the Amazon Kindle Model No. D00701 and D00801.
Both ebook readers are based on a Freescale i.MX31. A JTAG interface is
included in a 40 pin FFC connector marked "J9" on both variants.

Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3956
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:10:00 +01:00
Antonio Borneo
f9986394dc target/cortex_a: use extensively cortex_a_wait_dscr_bits()
We have the function to wait for bits in dscr. Use it whenever
possible.

When the bit to test is DSCR_INSTR_COMP, use instead the wrapper
function cortex_a_wait_instrcmpl().

Change-Id: I5c54c239a00f489712af448eb97752210b4b38b8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5113
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:37 +01:00
Antonio Borneo
d870ecf5ff target/cortex_a: check dscr before timeout
In function cortex_a_wait_dscr_bits() the last read on dscr gets
ignored in case of timeout, even if it finally provides the value
that would trigger a successful return.

Check the returned value before testing the timeout.
Also, print a message on failure reading dscr.

Change-Id: I261ac1545113db39374833a55be911a4da71d893
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5112
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:32 +01:00
Antonio Borneo
d3a9e535d5 target/cortex_a: fix waiting for target halted after step
Depending on adapter speed, the function cortex_a_poll() can take
time to execute and can complete successfully when the timeout is
already expired. Checking the timeout at function return causes a
timeout error while that could be avoided.

Check the target status at cortex_a_poll() return, before checking
for the timeout.

Change-Id: I4c1581f6e718298c566df7b1359255e16e3955d5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5111
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-24 14:09:26 +01:00
Christopher Head
a4ac56152d target/cortex_m: Implement maskisr steponly option
`maskisr steponly` disables interrupts during single-stepping but
enables them during normal execution. This can be used as a partial
workaround for 702596 erratum in Cortex-M7 r0p1. See "Cortex-M7 (AT610)
and Cortex-M7 with FPU (AT611) Software Developer Errata Notice" from
ARM for further details.

Change-Id: I797a14e4d43f6dcb3706528ee4ab452846ebf133
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4673
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2019-04-10 20:05:32 +01:00
Mete Balci
5b263d7b0c fix for sanitizer errors in left shifts
The modified lines cause "runtime error: left shift of <X> by <Y>
places cannot be represented in type 'int'", because integer
literal is cast to int by default.

Change-Id: Ie38119b5eb46ee470e0d149959e523b48ac4d66d
Signed-off-by: Mete Balci <metebalci@gmail.com>
Reviewed-on: http://openocd.zylin.com/5005
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:37:51 +01:00
Marc Schink
d5936dc688 target/riscv: Free registers to avoid memory leak
Tested with SiFive HiFive1 development board.

Change-Id: I96a9a528057fcf9fc54d3da46a672d2cd54c3d5f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4885
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:37:21 +01:00
Christopher Head
6aae614cc2 flash/stm32h7x: include IO_HSLV in user3_options
Bit 29 of OPTSR is IO_HSLV. It ought to be read in stm32x_read_options
and written in stm32x_write_options. Adjust the bitmasks to do this.

Change-Id: I785a5291c991c98b774177f960dc58f2b5e045e2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4745
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:36:54 +01:00
Antonio Borneo
6f04bc1568 helper/command: log an error for commands without usage
Every command has been fixed with proper usage field.
Change LOG_DEBUG with LOG_ERROR so a developer will get a visible
alert for missing usage field when adds a new command.

Change-Id: I077c3745fd6265aded8e54b3f9d202d4d6516966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5026
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-04-10 16:35:41 +01:00
Leonard Crestez
38d053d11b target/imx6: Update list of supported TAPIDs
Copy all SJC TAPIPs from imx6 reference manuals.

Some imx6 chips are based on Cortex-A7 or have an additional Cortex-M4
and need separate scripts.

Change-Id: I3b07d94058c2c5e6313cfc8bb43134a90682a62e
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5034
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:20:07 +01:00
Leonard Crestez
3b291a369c target/imx6: Fix indentation in DAP_TAPID handling
OpenOCD scripts are usually indented with 4 spaces but here there are 8.

Change-Id: Iaad53e3b377d246d99119bb7bb5fd75d4422f564
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5039
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:17:17 +01:00
Leonard Crestez
55d53fb64c target/imx6: Add -ignore-version
Looking through imx6 manuals all of them claim that "In follow-on
silicon revisions the ID value is subject to change by incrementing the
first nibble".

Handle this by passing -ignore-version to jtag newtap command.

Change-Id: I7fc4779f9757d527ea20a5174a8c90f919580013
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:17:03 +01:00
Leonard Crestez
2fc82eae3c target/imx7: Add ahb mem_ap
This allows bus access even when CPU is off.

Change-Id: I2d5c5581cd0169aecb92ac7b610810988a8dcef4
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5032
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:16:19 +01:00
Leonard Crestez
84e3f63a8c jtag: tcl: Add cget -idcode
This can be used to dynamically distinguish between similar chips in tcl
code.

Change-Id: Ic4dfb61693e78616355173142dc7f9b9683a9f73
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5033
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:16:06 +01:00
Christopher Head
ca7ba6b58d Fix incorrect commas in URLs
In Texinfo, a comma inside an @url separates parameters to the @url
function rather than being included as part of a parameter. Use @comma{}
instead to resolve this.

Change-Id: I8b38939462cf4452e5bc2582ee484220aaf83ae0
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5028
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:36 +01:00
Christopher Head
487710da6d Document the mem_ap target type
Change-Id: I56e971b38f20db8c4ad0cdee5cc42b42a25319ea
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5029
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:25 +01:00
Tomas Vanek
1f4596cc46 target: fix copy&paste error in cget -coreid
Command should return target->coreid, not target->working_area_size
Solution appeared as an off topic fix in http://openocd.zylin.com/4935

Change-Id: Ic9701ce2001c75060dbaa75fbd013ed475a352e5
Suggested-by: Graham Sanderson <graham.sanderson@gmail.com>
Reported-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5035
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-04-10 10:10:15 +01:00