Commit Graph

1249 Commits

Author SHA1 Message Date
Lorenz Brun
63f4e7c72a target/ti-cjtag: make switching to JTAG more reliable
The current cJTAG to JTAG switching commands for TI chips are not
particularly reliable, especially on chips with accurate timing.
On a Raspberry Pi the existing sequence has (depending on cabling and
chip) a ~50% chance of working, on a much better-behaved FT2232H
it doesn't manage to enable full JTAG at all.

This change runs a bunch of test-idle cycles before actually attempting
to switch to full JTAG. This makes the switch reliable even at high
clock speeds (>100kHz) and from precise sources like the FT2232H.

Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db
Reported-by: Phil Wiggum <p1mail2015@mail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/375/
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Reviewed-on: https://review.openocd.org/c/openocd/+/7419
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-10 17:11:46 +00:00
iosabi
370bf43fb1 flash/nor: add support for NXP QN908x
This patch adds support for the NXP QN908x family of Bluetooth
microcontrollers, such as the QN9080. This chip features a Cortex-M4F
with 512 KiB of flash on all the available versions, although the
documentation suggests that there might be 256 kB versions as well.

The initial support allows to read, erase and write the whole user flash
area. Three new sub-commands under the new "qn908x" command are added
in this patch as well: disable_wdog to disabled the watchdog,
mass_erase to perform a mass erase and allow_brick to allow programming
images that disable the SWD interface.

Disabling the watchdog is required after a "reset halt" in order to run
the CRC algorithm from RAM when verifying the chip. However, this is not
done automatically on probing or other initialization since disabling
the watchdog might interfere with debugging real applications.

The "mass_erase" command allows to erase the whole flash without
probing it, since in some scenarios the chip can be locked such that no
flash or ram can be accessed from the SWD interface, allowing only to
run a mass_erase to be able to flash the program.

The flashing process allows to compute a checksum, similar to the
lpc2000 driver "calc_checksum" but done over a different region of the
memory. This checksum is required to be present for the QN908x
bootloader ROM to boot, and otherwise is useless. As with the lpc2000
design, verification when using "calc_checksum" is expected to fail if
the checksum was not valid in the image being verified.

This was manually tested on a QN9080, including the scan-view,
AddressSanitizer/UBSan and test coverage configurations.

Change-Id: Ibd6d8f3608654294795085fcaaffb448b77cc58b
Co-developed-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: iosabi <iosabi@protonmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5584
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-06-10 16:58:35 +00:00
Jacek Wuwer
24b656bff5 jtag/vdebug: adding xtensa config
This change adds the extensa sample target and board configurations.
it removes the obsoleted vd_xtensa_jtag.cfg from targets.

Change-Id: I9d4d25abde46c0b15e5211a973012447872cb405
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7723
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-06-02 21:04:37 +00:00
Wolfram Sang
b02cbafcc9 tcl/board/calao-usb-a9g20-c01: add proper initialization
Initialize clocks to max speed and setup SDRAM. NAND support is still
incomplete. Originally found at:

elinux.org/index.php?title=Calao_Atmel_AT91_development_board&oldid=73933

Updated the code from 2011 and improved it a bit.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Change-Id: I83474e07c8de8cc3b5d058029551935549693ef9
Reviewed-on: https://review.openocd.org/c/openocd/+/7578
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-02 20:59:57 +00:00
Dominik Wernberger
00cbf7bd31 Add/Correct STM8L15xx2/3/4/6/8 devices
Change-Id: I83fe1e50821ec15e1853aca96ebb32fe1ff5328f
Signed-off-by: Dominik Wernberger <dominik.wernberger@gmx.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7690
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-02 20:59:36 +00:00
Daniel Anselmi
78688fea98 flash/jtagspi: sending command and setting parameters without probing.
Change-Id: I6b9d90265ca5112b9ab2aae97bb4c6cf3ebc4112
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7432
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-05-27 06:44:31 +00:00
Tarek BOCHKATI
4defa3b1e3 flash/stm32l4x: support STM32C0x devices
this new STM32 series family introduces 2 devices:
STM32C011xx (0x443) and STM32C031xx (0x453)

both devices have 32 Kbytes single flash bank.

Change-Id: I4e890789e44e3b174c0e9c0e1068383ecdbb865f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6874
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-05-24 05:28:09 +00:00
Phil Kirkpatrick
30b0e9af8d tcl/target: Add support for TMS570LC43xx
Added support for TMS570LC43xx series parts.  This uses the pre-existing
ti_tms570.cfg parent config.  In ti_tms570.cfg, dbgbase was changed.
Note 1: Based on the following TI E2E post, the previous dbgbase was wrong
and the new value isn't due to a difference in parts.
Link: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1106954/tms570ls3137-debugging-with-openocd
Note 2: Both the previous dbgbase and the one suggested in the TI E2E post
have the 2 LSB set. In the current version of OpenOCD, this will cause
cortex_a_read_cpu_memory_fast and cortex_a_write_cpu_memory_fast to fail
due to an alignment checks in
mem_ap_<read/write>_buf_noincr()->mem_ap_<read/write>().
In all other uses of dbgbase for arm cortex parts, the 2 LSB are masked
and ignored.

Change-Id: Ic936722e5a4cfc7161b0df1fe3325ee12fd901c6
Signed-off-by: Phil Kirkpatrick <p.kirkpatrick@reflexaerospace.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7682
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-05-18 10:23:18 +00:00
Daniel Anselmi
682f927f8e pld: add support for cologne chip gatemate fpgas
Change-Id: I0bf5a52ee6a7f0287524619114eba0cfccf6ac81
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7565
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-30 14:55:14 +00:00
Daniel Anselmi
4b56c73ef3 pld: add support for gowin devices
Change-Id: Idd1a09514bbbbe0a7b54d69010f6c2f91215fd1d
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7368
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-30 14:54:59 +00:00
Daniel Anselmi
db0609aeb4 pld: add support for altera/intel devices
Change-Id: I7977d39c9037ae71139f78c8d381f5f925dc3489
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7355
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-30 14:54:38 +00:00
Daniel Anselmi
7c6d446440 pld: add support for efinix devices
Change-Id: Ie520e761c255ba1335d5aab9c6825f160a6151d9
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7288
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-04-30 14:54:18 +00:00
Daniel Anselmi
e33eae340d pld: add support for lattice certus devices
Change-Id: Ic50a724e5793000fca11f35ba848c2d317c3cbab
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7398
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-30 14:54:04 +00:00
Daniel Anselmi
cf596a61db pld: add support for lattice ecp5 devices
Change-Id: Ib2f0933da3abe7429abca86d6aaa50ad85ce72c7
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7397
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-04-30 14:53:44 +00:00
Daniel Anselmi
d35faaa35c pld: add support for lattice ecp2 and ecp3 devices
Change-Id: I29c227c37be464f7ecc97a30d9cf3da1442e2b7f
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7396
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-04-30 14:53:25 +00:00
Julien Massot
3dfc0339fc tcl/target: renesas gen3 Set target to armv8r for Cortex-R52
Cortex-R52 is an ARMv8-R processor supporting only
AArch32 Profile.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Change-Id: I663ae4bf1d3026d7c9e4c5950a79e7ddf1bd6564
Reviewed-on: https://review.openocd.org/c/openocd/+/6805
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-30 14:50:26 +00:00
Daniel Anselmi
ffd9638bdb tcl: cpld/xilinx-xc7: remove virtex-7 devices with ir-length > 6
They have an ir length of 22, 24 or 38 bit and different command codes.

Change-Id: I488e8613f1c4d017e1590111f60b2725ec62964b
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7387
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-04-14 15:11:33 +00:00
Daniel Anselmi
e87fa5e3ab tcl: zynq_7000: add missing id codes
Add missing ID codes and ignore the version in the ID.

Change-Id: Idd2d3a5eddb6995f3af1c45afd2adf76ce3442bf
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7386
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-04-14 15:08:34 +00:00
Wolfram Sang
b939224ab6 tcl/board: add Calao USB-A9G20
Add a basic config.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Change-Id: Ie68e5fbb26b1c2f3028e561af0255fa71ec61828
Reviewed-on: https://review.openocd.org/c/openocd/+/7524
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-03-28 09:35:54 +00:00
Wolfram Sang
f0e8f7b790 tcl/board/calao-usb-a9260: fix and refactor broken support
The old configuration files did not work because of a missing
'at91sam9260minimal.cfg' file. Also, the config files were placed
wrongly. Update them, put them to the proper location, merge the two
supported boards into one, remove now superfluous include, remove
defunct web page, etc.. Tested with a Calao USB-A9G20 and a hacked
'device_desc' to match. Native support for it will come next.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Change-Id: Iec578c8777c5a6134e132dbac17c2988c7634742
Reviewed-on: https://review.openocd.org/c/openocd/+/7522
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-03-28 09:35:21 +00:00
Antonio Borneo
b4e28446b8 tcl: remove exec permission to tcl config files
With the new checkpatch we will not get this type of issues
anymore.
In mean time, let's fix what we have missed during the review
process.

Change-Id: Iecebf9d43f51a29ee09505d360792793afd24b40
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 53556fcded ("tcl/interface: add Ashling Opella-LD FTDI config files")
Reviewed-on: https://review.openocd.org/c/openocd/+/7530
Tested-by: jenkins
2023-03-18 22:00:36 +00:00
Marc Schink
1528845331 tcl/tools/test_cpu_speed: Fix register name
Use correct register name after it has beed changed
in commit 11ee500bff ("target/armv7m: Rename xPSR to xpsr")

Change-Id: I3648848f4b47af2d20d60c3e0ecef78f75f6d605
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7473
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-18 21:59:47 +00:00
Wolfram Sang
e1b0d5759a tcl/board/at91sam9g20-ek: remove outdated FIXME
It was fixed by e94180571 ("at91sam9: factorise cpu support") in 2011.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Change-Id: I95ea149b45a9902424bf9068b4a2830c17ddc6be
Reviewed-on: https://review.openocd.org/c/openocd/+/7525
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-03-18 17:30:26 +00:00
Tomas Deingruber
fc30feb51a tlc/interface: does fix source of raspberrypi-gpio-connector.cfg
in raspberrypi-native.cfg

Fixes: bec6c0eb09 (tcl/interface: universal config for all Raspberry Pi models)
Signed-off-by: Tomas Deingruber <Deingruber.Tomas@gmail.com>
Change-Id: I632c8acd84974937849b5fdf2943239def17bd6d
Reviewed-on: https://review.openocd.org/c/openocd/+/7512
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-03-03 22:26:15 +00:00
Tomas Vanek
0b6f53e94c tcl/target: add rescue mode to RP2040 config
Integrate a rescue mode inspired by [1].

The current OpenOCD must be restarted before normal work with the RP2040
because the rescue debug port must not be activated (or the target
is reset every 'dap init'). To continue without restarting OpenOCD
we would need to switch off the configured rescue dap.

Change-Id: Ia05b960f06747063550c166e461939d92e232830
Link: [1] https://github.com/raspberrypi/openocd/blob/rp2040/tcl/target/rp2040-rescue.cfg
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7327
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-01-28 15:57:24 +00:00