Commit Graph

770 Commits

Author SHA1 Message Date
Andreas Färber
43ff5acd45 flash: New Spansion FM4 flash driver
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.

Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)

gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.

Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-29 19:40:20 +00:00
Alexander Kurz
4d68bd1ebf tcl/target/stm32f4: fix: reduce adapter speed before reset
The reset-init hook for this target speeds up the CPU clock and JTAG adapter
speed. When the target is reset running with high adapter speed, a series of
warnings "DAP transaction stalled (WAIT) - slowing down" will be generated
since the adapter speed is not reduced to fit the slower CPU speed.
Fix: reduction of the adapter speed before a reset is performed.

Change-Id: Iabfc8e3f70311e0e71c8eed09b8a37fcbed9c58d
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3365
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-29 19:16:07 +00:00
Freddie Chopin
50d4f76e13 Add board config for ST NUCLEO L476RG board
The file was contributed by Sébastien Lorquet.

Change-Id: I118f5b16181488b9e3327891e6130b908419f1c4
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/3214
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-02-14 19:58:42 +00:00
Andrew Kohlsmith
cf88f4e283 add Digilent HS2 support
Change-Id: If506c33f22d95f4c47f30c4348d461197c976fdd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3160
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-13 23:23:34 +00:00
Ivan De Cesaris
a4ce9a2c71 quark: add Intel Quark mcu D2000 support
Add support for the Intel Quark mcu D2000 using the new quark_d2xx
target.

Changes to the lakemont part are needed for the D2000 core and
backwards compatible with the X1000 one.

Change-Id: I6e1ef5a5d116344942f08e413965abd3945235fa
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3199
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-13 22:55:41 +00:00
Tim 'mithro' Ansell
db56a3b870 tcl: Support for the miniSpartan6+ board.
* https://www.scarabhardware.com/minispartan6/
 * https://github.com/scarabhardware/miniSpartan6-plus/raw/master/miniSpartan6%2B_Rev_B.pdf

The miniSpartan6+ board is wired identically to the Pipistrello device but
sadly doesn't have a custom device description.

Change-Id: I07fd57b1ec87d72edf68860684928a3781e2f08a
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/3117
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-02-03 22:11:33 +00:00
Manuel Limones
822e6f43e4 tlc/board: Add ATMEL SAM E70 Xplained config
atmel_same70_xplained config using on board embedded debuger

Change-Id: I650ec538b42653662bc273e9f3581a6eda95cd39
Signed-off-by: Manuel Limones <limonesu.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/3208
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-02-03 22:10:32 +00:00
Bogdan Kolbov
afbad69d97 flash/nor/niietcm4: minor fixes
niietcm4_write() buffer padding:
add correct buffer padding for 16 bytes.

Args check in FLASH_BANK_COMMAND_HANDLER():
first version of the driver had 7 args, current - 6. This patch will fix
error when flash is rejected (current k1921vk01t.cfg has flash bank init
with 6 args).

Timeouts in flash flag checking procedure:
increase timeouts in niietcm4_opstatus_check() and niietcm4_uopstatus_check()
cause there were problems in some hardware configurations.

JTAG ID:
wrong id in k1921vk01t.cfg replaced with right one.

Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Change-Id: I84296ba3eb4eeda4d4a68b18c94666f1269a500f
Reviewed-on: http://openocd.zylin.com/3171
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-01-29 05:41:53 +00:00
Matthias Welwarsky
c520fdf902 am437x: always use highest possible JTAG clock.
With DAP WAIT support, it's no longer necessary to start with slow
JTAG clock.

Change-Id: I2cb62c44752b27e6854637e8073e9f9501f5a660
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3190
Tested-by: jenkins
Reviewed-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-01-22 13:03:39 +00:00
Antony Pavlov
082417fc71 tcl/fpga: add config file for Altera EP3C10 FPGA (Cyclone III family)
Change-Id: I4de5156b3c43f548305f8b9a3943a727fa6f0dbe
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2889
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-12-29 21:22:22 +00:00
Matthias Welwarsky
0627bc3b43 AM335x: allow simultaneous debugging of A8 and M3 cores
This patch fixes the tap order so that it matches the actual jtag
chain when all taps are enabled. It also introduces a variable
DEFAULT_TAPS that can be set outside of this script, e.g. on the
command line, to specify which taps are to be enabled on init.
Lastly, a new debug target "am335x.m3" is added so that the Wakeup-M3
can be selected for debugging.

Change-Id: Iccf177fda8d5e3737b1b2bb8fd1eaa7d3262ed9f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-12-29 21:16:54 +00:00
Andreas Färber
95486fb159 tcl/board: Add Renesas DK-S7G2 config
Tested with "J-Link OB RX621-ARM-SWD V1 compiled Nov  4 2014 10:47:22".

Change-Id: Ib64c0be407f99df57f058a4498556fd5ab7e9112
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3170
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-12-29 20:38:12 +00:00
Andreas Färber
a12f1cf34c tcl/target: Add Renesas S7G2 config
Tested with Renesas DK-S7G2M v3.0 board.

Change-Id: Ia6acaf70271ed4eb7bc4e921552cbd2ff83f6acb
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3169
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-12-29 20:38:05 +00:00
Andreas Färber
fea90dd83f tcl/board: Add Infineon XMC4700 Relax Kit Series config
Tested with Relax Kit for 5V Shields:
  J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50
and with Relax Lite Kit:
  J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50

Derived from xmc4800-relax.cfg.

Change-Id: I4e10fb6ed1f85168634d3b5259d3041ffc6b74d8
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3130
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-12-29 20:37:39 +00:00
Andreas Färber
8229d525b6 tcl/board: Add Infineon XMC4800 Relax EtherCAT Kit config
Tested with "J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50".

Derived from xmc4500-relax.cfg.

Change-Id: Ia1edf5cb95088ccd34e3b90570d727bbb401cbf5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3129
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-12-18 18:25:45 +00:00
Bogdan Kolbov
ae2142d5a2 niietcm4: support for NIIET's Cortex-M4 microcontrollers
This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.

Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-26 12:17:25 +00:00
Andreas Färber
2594c23d78 tcl/target: Add Nordic nRF52 config
Base config without flash support for now.

Change-Id: I96a5b6ad35e00dc706177ea9dbdffc384ae7f62b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3110
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-20 18:28:40 +00:00
Jonathan Larmour
7f93aabd61 tcl/board: Remove pflash.0 bank from twr-k60n512.cfg
The pflash.0 bank should not be present as it overlaps with
the flash bank created by target/kx.cfg, triggering an error.
This is also in line with the existing twr-k60f120m.cfg.

Change-Id: I5f620e01319d967f12e029fb6865ccdd031713b3
Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3108
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2015-11-20 18:27:54 +00:00
Tomas Vanek
751e2454bf at91samd: handle reset run/halt in DSU
Atmel introduced a "Device Service Unit" (DSU) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Function is similar to SMAP in ATSAM4L, see http://openocd.zylin.com/2604

Atmel's EDBG adapter handles DSU reset correctly without this change.

An ordinary SWD adapter leaves TCK in its default state, low.
So without this change any use of sysresetreq or srst
locks the chip in reset state until power is cycled.

A new function dsu_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and DSU reset is released then.

Additionally SWD clock comment is fixed in at91samdXX.cfg and clock is
lowered a bit to ensure a margin for RC oscillator frequency deviation.
adapter_nsrst_delay 100 is commented out because is no more necessary after
http://openocd.zylin.com/2601

Change-Id: I42e99b1b245f766616c0a0d939f60612c29bd16c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2778
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-11-20 18:26:05 +00:00
Paul Fertser
64802b7939 tcl/interface/ftdi: add 100ask's OpenJTAG config
Schematics provided by Matthias Bock.

Change-Id: I3d00453fece3b4df58a53bee21fff646a8b71a34
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2718
Tested-by: jenkins
2015-11-16 16:17:18 +00:00
Felipe Balbi
e4848fe043 board: ti_am437x_idk: default to 1000kHz
16000kHz is only safe after PLLs have been locked
properly. Until that's done (with reset init), we
can only safely run at 1000kHz.

Change-Id: I4e0a17e88aa9919cd6c34d44da68e23115c0d3a3
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/3015
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-13 06:59:12 +00:00
Ragnar Sundblad
dd70e57b82 topic: Interface config file for FTDI UM232H module
Added interface config file for the FTDI FT232H based UM232H module.
This should work with UM232H-B too, an even cheaper module, but
that has not been tested.

Change-Id: Ifc312d6741da0b7862fe07d854023190d7afe251
Signed-off-by: Ragnar Sundblad <raggesu@gmail.com>
Reviewed-on: http://openocd.zylin.com/3031
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-13 06:57:58 +00:00
Uwe Bonnes
f3be0f6071 stm32l4: Add cpu and stm32l4discovery board configuration.
Change-Id: I20d3fcee04516eb3b9bb22933e7e366eed0c0b2e
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2942
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-12 20:21:06 +00:00
Uwe Bonnes
6b32fe4124 tcl: Add default hooks for STM32F0x
Keep clocks running in low power modes. Stop watchdogs from interfering
with the debug session. Set up PLL and increase clock at reset init.

Change-Id: I232d769d893d54e4ea9411c46c56b19587b69919
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2707
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-12 20:20:33 +00:00
Uwe Bonnes
d8ac9d5ac5 tcl: Add default hooks for STM32F4x
Set up PLL and increase clock at reset init.

Change-Id: I611bc6fb7c0c5afd8ed3f4ad8e64f3c7b981d31c
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2609
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-12 15:24:19 +00:00