Tigard[1] is an FT2232H-based development tool designed for ease of use
with many different protocols and targets. It includes a JTAG header
wired to channel B, with labeled pins for the four required signals as
well as nTRST and nSRST, which are connected through an output buffer to
BDBUS4 and BDBUS5 respectively.
Add an interface config for Tigard. I wrote it by referencing the Tigard
schematic and tested it by debugging a couple of RISC-V development
boards.
[1] https://github.com/tigard-tools/tigard
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Change-Id: I34df9f72538ba1e40ad53b568c9cdca96ae4b082
Reviewed-on: https://review.openocd.org/c/openocd/+/6952
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
While cross-compiling OpenOCD the generated script is not named
"libtool" anymore, but e.g. "arm-linux-gnueabi-libtool".
Ignore all the possible variants "*-libtool".
Change-Id: I7a0dade992dbc13f977610bd4a78f8a4783b0146
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6960
Tested-by: jenkins
Incorrect validation prevented GPIO0 from controlling the direction of
the SWDIO buffer or operating TRST/SRST.
Have all GPIO number validation checks performed by is_gpio_valid().
Change-Id: Ib8fb704ab588a618ac41c111f6168d658891d92c
Signed-off-by: Steve Marple <stevemarple@googlemail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
It is a common requirement to automatically execute some command
after "init".
This can be achieved, either in scripts or through OpenOCD command
line, by explicitly calling "init" followed by the commands.
But this approach fails if the request for post-init commands is
spread across configuration files; only one of the files can split
pre-init and post-init status by calling "init".
The common workaround is to "rename" the command "init" and
replace it with a TCL proc that calls the original "init" and the
post-init commands. E.g. in Zephyr script [1].
To simplify and formalize the post-init execution, use a TCL list
that contains the list of commands to be executed. Every script
can contribute adding new commands, e.g. using "lappend".
In the same way, formalize the pre-shutdown execution with a TCL
list of user commands to be executed before OpenOCD exit.
Document them and add trivial examples.
Drop from documentation the suggestion to rename "shutdown".
Change-Id: I9464fb40ccede3e7760d425873adca363b49a64f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Link: [1] https://github.com/zephyrproject-rtos/zephyr/blob/zephyr-v2.7.1/boards/arm/nucleo_h743zi/support/openocd.cfg#L15
Reviewed-on: https://review.openocd.org/c/openocd/+/6851
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
The function target_type::deassert_reset() is called for every
target after reset is deasserted. If the target fails to get
halted, we log a warning and issue a halt request for the target
itself.
Current code calls the generic target_halt() that:
- extends the halt to all the targets in the SMP node;
- waits for targets to halt.
This breaks the logic of running target_type::deassert_reset()
per target. Plus, waiting for targets to halt delays the call of
target_type::deassert_reset() for the next targets.
Replace the call to target_halt() with the aarch64 specific
function to halt the single target. Pass the parameter HALT_LAZY
to prevent the wait for target halted.
Similar solution is already implemented for cortex_a.
Change-Id: I446dc03cb91524c6d388db485bc2388177af77b6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6947
Tested-by: jenkins
Arm documentation does not explicitly report the order of the two
32bit words that compose the 64bit value. But both ADIv5 and ADIv6
specify that only little-endian is supported (ADIv5.2 obsoletes
the big-endian support). This change reads the 64bit value in
little-endian.
Detect the 64bit content and use it.
Change-Id: I723ec099c7e8c70c1f9a568e32ea867fcbf1f1db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6465
Tested-by: jenkins
With the generic function for ROM table walk-through, reimplement
dap_lookup_cs_component().
Catch the code CORESIGHT_COMPONENT_FOUND and halt the search.
While there, drop two macros in arm_coresight.h, now unused.
Change-Id: I589ef7ae8a651d0c422ce7d0b4ed913713a8217e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6824
Tested-by: jenkins
Simplify the code in cortex_a and aarch64 by moving the call to
dap_get_debugbase() inside dap_lookup_cs_component().
This has the further effects:
- dap_get_debugbase() is not referenced outside arm_adi_v5.c and
becomes static;
- dap_lookup_cs_component() looses one parameter;
- the coreid parameter 'idx' is passed as value;
- the caller in aarch64 don't have and don't print the irrelevant
value of AP register APID;
- fixes the debug message in the caller in aarch64 to print the
coreid value instead of always zero.
Change-Id: Ic7f0f643fdf067c059c8f2455a02ff18a3fed054
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6823
Tested-by: jenkins
Now all the actions (build command output) of command "dap info"
are decoupled from the ROM walk-through.
Pass the actions as a generic parameter to ROM walk-through code.
Put as private data every information that is only required by the
actions and not by the ROM walk-through.
Change-Id: I3b6ad112ea21296458c94aebbf91bf65bf6657a7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6822
Tested-by: jenkins
This change only targets the output of rtp_cs_component().
To easily propagate the coordinates of the CoreSight component,
add them in the struct that holds the register values.
While there, define a macro for the max depth of ROM tables.
Change-Id: I75e5ef4f9419da3192123aebcd61471c2af9374f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6820
Tested-by: jenkins
In OpenOCD arm_adi_v5 we have already two implementations of code
for parsing the ADIv5 ROM table:
- in the commands "dap info" and "$dap_name info";
- in the function dap_lookup_cs_component().
Adding support for ADIv6 requires extending both implementations.
Moreover, current code does not handle few aspects of the ROM
parsing, e.g. the "Power Domain IDs".
To add such extensions both implementations should be touched.
I plan to add a command to parses (again) the ROM table and dump a
simple prototype of a configuration script for the target, useful
while analysing a new target.
Keeping aligned all these implementation would be too complex.
With focus to "dap info" command, decouple the part of code to
walk-through the ROM table from the code that creates the command
output.
The idea is to keep a single implementation for the walk-through
code, while parametrizing the output code to handle the generation
of a configuration script or the result of the function
dap_lookup_cs_component().
This change only targets the output of MEM-AP header
Further changes will target other parts of the code.
While there, add a message if MEM-AP is not accessible.
Change-Id: I112f637edfdb8688afb4e631297f6536da9604f1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6819
Tested-by: jenkins
ARM IHI0031F "Arm Debug Interface Architecture Specification"
chapter C2.6.1 "BASE, Debug Base Address register" reports:
A debugger must handle the following situations as
non-fatal errors:
- ...
- An entry in the ROM Table points to a faulting location.
- ...
Typically, a debugger issues a warning if it encounters
one of these situations. However, Arm recommends that it
continues operating. An example of an implementation that
might cause errors of this type is a system with static
base address or ROM Table entries that enable entire
subsystems to be disabled, for example by a tie-off input,
packaging choice, fuse, or similar.
Don't halt ROM table parsing if one entry causes an error; log the
error condition and continue to next entry.
Not sure if we have to send an ABORT before continuing.
Change-Id: I94fdb5b175bfb07dde378149421582b7e7cd5b09
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6818
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
As Class 0x1 ROM table, also Class 0x9 ROM tables encodes a flag
for system memory access.
Detect the flag in rtp_cs_component() and dump the same message
for both type of ROM tables.
Extend rtp_read_cs_regs() to read ARM_CS_C9_DEVID.
Change-Id: Ic85d1ea068ed706ceedfd65076ff4c96d04e9792
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6817
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
During ROM table parsing, each ROM table entry points to a
CoreSight component that can, in turn, be another ROM table.
Split the specific code for ROM table handling from the generic
CoreSight code.
Log an error if a ROM table entry cannot be read.
Change-Id: I5ad106a99b9c21ddb48b5b162ae87101e4f49878
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6816
Tested-by: jenkins
Rework dap_read_part_id() while preparing for reorganizing the
'ROM Table Parsing' (RTP):
- rename it with 'rtp' prefix;
- extends it to read other CoreSight registers, thus improving the
overall speed by queuing more reads;
- reduce the list of arguments by using a struct;
- reorder the reads by increasing offset, potentially gaining
speed using MEM_AP_REG_BDx and/or auto-increment;
- log a debug message in case of read error.
Change-Id: I6544ac7740b808a6c0fbacf97ac00b97f5bd3832
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6815
Tested-by: jenkins
ADI v5.1 and v6.0 permit the definition of CoreSight components (class 9
ROM entries).
dap_rom_display() is refactored a bit such that we always end up with
attempting to parse the ROM contents using the appropriate upper limit
for class 1 and 9 ROM types.
Change-Id: I4ba497b3807f1f11f06186eb6e61959ea3540c59
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6359
Tested-by: jenkins
Use the list of values from ARM IHI0029E to decode and print the
Device Architecture register.
Add attribute 'unused' to the function, not used yet.
Change-Id: I7b1dd204bd1db671578c588372b667e23611876c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6463
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
In case of AP not responding, e.g. not clocked, the first WAIT
reply is logged as:
DAP transaction stalled (WAIT) - slowing down
then OpenOCD retries the transaction few times, until it timeouts.
At each retry it prints the message:
DAP transaction stalled during replay (WAIT) - resending
Depending on JTAG speed and transport latency, the amount of log
messages can be quite annoying and not relevant.
The last printed line is at timeout:
Timeout during WAIT recovery
Reduce the verbosity.
Change-Id: I5a7a337527c98b2450de59066b13713511c2894f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6814
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
