Commit Graph

8226 Commits

Author SHA1 Message Date
Antonio Borneo
6ea43726a8 cortex_m: set C_DEBUGEN in soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
Without a better replacement of the command, it's worth fixing it.

Accordingly to ARM DDI 0403E.d, chapter C1.4.1 "Entering Debug
state on leaving reset state", to halt the core at reset both bits
DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET must be set.
Current code only sets the latter bit, relying on having C_DEBUGEN
already set through other commands, e.g. "halt". This prevents the
command "soft_reset_halt" to work if issued as very first command.

Set the bit C_DEBUGEN in command "soft_reset_halt".

Change-Id: I66bfd6a0da1fca5049dea037b4d258cf6f842966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4987
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:51:01 +01:00
Antonio Borneo
a521d93b7a helper/options: simplify the code using command_run_linef()
Thanks to command_run_linef() there is no need to pre-build the
command using alloc_printf().

Change-Id: Iccfebd6063d1ac162f090fe2309b1f51bebf0214
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5226
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:38 +01:00
Christopher Head
77a8914b7f helper/command: make command_run_line reentrant
The `command_run_line` function contains a comment saying it should be
reentrant. However, it isn’t: it NULLs out `current_target_override` and
doesn’t restore it before returning, and it changes the `context`
associated data of the `interp` object and then deletes that associated
data before returning rather than restoring it to its previous value.

Change-Id: I84fd46ef7173f08cf7c57b9a5b76e4986a60816f
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:50:22 +01:00
Kevin Gillespie
23b6aa9bf8 doc: makeinfo extra whitespace
Extra whitespace in file creating build errors with makeinfo.

Change-Id: Ib764850c1c8ff596d3c753eadd8e27f8c5982d20
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/5229
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:49:56 +01:00
Marc Schink
42cee465c2 tcl/board: Add SAML11 Xplained Pro Evaluation Kit
Change-Id: I118929cdecd9ba1f39d6e2791c114ac7e347b3f5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5206
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 10:18:19 +01:00
Marc Schink
56de276d91 tcl/target: Add initial Microchip SAML1x support
There is not flash bank support at the moment.

Change-Id: I833c009d9d21cdeb70b57d67eb557d50ed0fb4de
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5205
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 10:17:57 +01:00
Marc Schink
0d47d85ff5 target/cortex_m: Add support for AHB5-AP
The AHB5-AP is implemented in Cortex-M23/33 based devices.

Change-Id: I505954a2e2c6462ce0aa96eba1d55b016c5028b9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5232
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2019-06-19 10:17:38 +01:00
Marc Schink
1f1558e74b target/arm_adiv5: Add type for AHB5-AP
This access port type comes with the AMBA 5 protocol specification,
see 'C1.3 AP' in ARM IHI 0031D.

Change-Id: I3c4f0a69230daaf4f5f979de6213fe3c025a089a
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5231
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2019-06-19 09:51:54 +01:00
Omair Javaid
ae449bb5f9 Configs for ARM corelink SSE-200 target and Musca A board
This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also
adds configuration file for SSE-200 based Musca A board. Flash programming
support for Musca A QSPI flash is still not functional. This configuration
will be updated once that support lands into OpenOCD.

Please refer to ARM documentation for more information about SSE-200 and
Musca A.

Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/5006
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-19 09:36:02 +01:00
Omair Javaid
bc94ca241a Support for debugging on ARMv8-M CPUs
This patch adds ARMv8-M CPUs detection logic in ARMv7m target specific code.

Also adds a slightly different watchpoint manipulation logic for ARMv8-M.

This is based on ARMv8-M architecture reference manual.

Tested on ARM Musca A board.

Change-Id: I0652560954ef02c378a7067fab586edf39d3e9cc
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4997
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-19 09:35:05 +01:00
Antonio Borneo
4dbcb1e79d target/cortex_a: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I1b917a4c1205115c4e0315373d81a9305e931258
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4944
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:56 +01:00
Antonio Borneo
18f4ef0f5e target/aarch64: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4943
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:40 +01:00
Antonio Borneo
9879f9bf04 jtag: fix error on TCL command "return" in jtag event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of jtag's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition.

It can be tested running openocd on a jtag target and adding a
jtag event "setup" with a single line "return", e.g.
	openocd -f board/ti_cc3200_launchxl.cfg \
	-c 'jtag configure cc32xx.cpu -event setup return'
to get the message:
	../src/jtag/core.c:1599: Error:
	in procedure 'jtag_init' called at file "../src/jtag/core.c",
	line 1599

Modify jtag_tap_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I6d6febc15ef169638afffbffc1810e0b84fcf5c8
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5199
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:51 +01:00
Antonio Borneo
1af83682e0 target: fix error on TCL command "return" in target event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of target's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition, thus dumping the
call-trace. The execution is not stopped because the error is not
further propagated, but the error message is annoying and
misleading.

It can be tested running
	openocd -f ./test.cfg
using the following script "test.cfg". You can replace the board
file in line 1, to use a board available in your lab:
  1	source [find board/st_nucleo_f4.cfg]
  2	[target current] configure -event reset-start {}
  3	[target current] configure -event reset-end {return}
  4	init
  5	proc a {} {[target current] invoke-event reset-start}
  6	proc b {} {[target current] invoke-event reset-end}
  7	proc c {} {a;b;echo "arrived at the end"}
  8	c
  9	shutdown
The execution produces:
	./test.cfg:7: Error:
	in procedure 'c' called at file "./test.cfg", line 8
	in procedure 'b' called at file "./test.cfg", line 7

	arrived at the end
that shows the call-trace but does not halt the execution.

The developer can avoid using the "return" command in the event
body by defining a TCL procedure that implements the handler and
that contains the "return" command, reducing the handler body to
a simple call to the procedure above. But this approach is either
not documented nor always intuitive while writing the handler,
causing waste of time to look for the false error.

Modify target_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I2b860bab7233c6ed13ee4098e348d7533e1c4626
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4974
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:37 +01:00
Tarek BOCHKATI
e6990bdd00 flash/stm32h7x: fix register names to comply with RM0399 Rev2 and RM0433 Rev6
Change-Id: I085d86a2a47f4aeef93a99238e3b80ee294d46df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5192
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:16 +01:00
Tilman Sauerbeck
8ed19a2e29 jtag: drivers: buspirate: chunk SWD switch sequence transfer.
Commit c2e18bfaea changed the size of the JTAG-to-SWD sequence
from 15 bytes to 17 bytes. This broke SWD switch sequence transfer
for buspirate, since buspirate packets can only hold a payload of up
to 16 bytes and we tried to fit the whole sequence in a single packet.

Splitting up the sequence transfer in appropriately sized packets
makes buspirate SWD work again (successfully tested with buspirate
firmwares v6.1 and v7.0).

Change-Id: Ib5b412b9e77287d705d2762e31c16d30318b50e3
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Reviewed-on: http://openocd.zylin.com/5200
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:38 +01:00
Christopher Head
b6fa208759 jtag/drivers/jtag_usb_common: fix typo
Change-Id: If1f56fd5d610b993a4ecbc900fac9f90638037c9
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5202
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:39:09 +01:00
Tomas Vanek
20396e56b7 target: make target re-configuration possible again
Before commit 877cec20dc
("command: check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.

The command '$_TARGET configure -xxx' was therefore applicable on running
OpenOCD to change the target configuration. It is handy e.g. for changing
an event handler or changes of the work area.

Change 'configure' command .mode to COMMAND_ANY to make it possible again.

The only parameter which cannot be re-configured after init is -gdb-port.
Test the command mode and refuse setting of gdb port after init.

Change-Id: I88493ac10a46647dc52a88fbc9f8ce6b5ba3bcd0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5214
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:51 +01:00
Michael Schwingen
7a27423e31 fix XScale register access
since b5964191f0, all XScale-specific registers were missing, breaking
config scripts.

Change-Id: Ia56f3ca17500ba54bd08f417e9a5aaaa8a1be8c4
Signed-off-by: Michael Schwingen <spam-openocd@discworld.dascon.de>
Reviewed-on: http://openocd.zylin.com/5136
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12 15:15:40 +01:00
Antonio Borneo
48478967db mem_ap: fix format of logged addresses
The macro TARGET_ADDR_FMT, defined in helper/types.h, already
includes the prefix "0x" in front of the hexadecimal number,
being defined as:
	#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
An additional "0x" is present in mem_ap; it prints debug messages
with a double "0x" before the address:
	Debug: 2921 34180 mem_ap.c:153 mem_ap_write_memory():
	Writing memory at physical address 0x0x5000000c; size 4;
	count 1

Remove the incorrect hexadecimal prefix.

Change-Id: I38f19ed2a2f542bd5df53e947a2604f1cbe80e08
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5222
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:29 +01:00
Daniel Goehring
88728abee1 ARMv8: Update rtos_reg storage from 8 to 16 bytes
To support 128 bit registers, the rtos_reg structure value
array needs to be updated from 8 to 16 bytes.

Tested by reading ARMv8 NEON FP regs on an Ampere eMAG 8180 with GDB.

Change-Id: I7f3fe1a5b2def599d021787fbe9cdd51f92859a4
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5209
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:15 +01:00
Florian Fainelli
f935f39cda armv7a_mmu: Add support for decoding Super Sections
The ARMv7-A architecture supports super sections which allows mapping
physical addresses up to 40-bit into a 32-bit virtual address using the
short descriptor format (see ARM DDI 0406C.c section B4.1.112 for
details).

Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5212
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:50 +01:00
Florian Fainelli
eeabbd58c0 armv7a_mmu: Do not restrict virtual addresses to uint32_t
In preparation for adding super section decoding, do not restrict
armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A
processors with VMSA extensions (including LPAE) can issue wider
physical addresses. Update casting to uint32_t where necessary.

Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:44 +01:00
Florian Fainelli
604dded6f1 armv7a_mmu: Remove armv7a_mmu_translate_va()
This function is not used anywhere in the tree, remove it, such that we
only have a single function moving forward that might need to deal with
short vs. long format specifics.

Change-Id: I80e81cd7eba1e028d1afaeaedb675b46c0ca6fa1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:37 +01:00
Florian Fainelli
ba11adb833 armv7a_mmu: Check earlier for PAR read
Check earlier that the read of the PAR register was successful instead
of starting the decoding and then checking for an error reading that
register.

Change-Id: Id96c2b2f76d2d1c745fcfa55ad4c1e6db92106f9
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:27 +01:00