FreeRTOS use an array to store ready task. The array size is
configMAX_PRIORITIES. In the current implementation, the code try to access 1 more priority if the helper from freeRTOS contrib is used.
This has effect of detecting bad thread. This patch correct this and have been tested on
a code with more than 12 task.
Change-Id: Id229f0b2c4bf1aab87a2a69be174cc9b6dda00cb
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/3400
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add new structure for for working with FPU thread in thread view.
This modification support both stacking.
When FPU is activated, LR must be validated to check if the FPU
register are push on the stack. This is mandatory to find the correct
stack pointer position.
the modified code was inspired and adapted from
88d2003bb8
Change-Id: I6641926aa14e7216cacb399cbc8bb0db324cc9fc
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/3397
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Harry Zhurov <harry.zhurov@gmail.com>
Reviewed-by: Anton Gusev
Reviewed-by: Михаил Цивинский <mtsivinsky@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested with MKE04Z8VTG4, MKE02Z64VLC4 and MKE02Z64VLD2.
Change-Id: I606e32a2746a3b96d3e50f3656ba78d40c41c1ea
Signed-off-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-on: http://openocd.zylin.com/3380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This feature is required for boards that use a programmatical way
to reset the cpu, like the TI Pandaboard with OMAP4. The board only
has a 14 pin JTAG header that doesn't feature SRST and is reset by
direct write to the PRM_RSTCTL register.
iMX6 can be reset through triggering the on-chip watchdog, but for these
methods to work reliably, access through the AHB-AP without interaction
with the CPU core is necessary.
Change-Id: I9a07a536adda83cc2f93e504384c8c7f0306220b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3359
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch adds a 'ftdi_location' command to select an adapter by usb
bus number and port path.
This is helpful if you have a rack full of adapters in a testing or
manufacturing setup where the only constant is the physical usb bus
location of the adapter you want to address. Vid:Pid are not unique,
serial number _may_ be unique (and maybe not with embedded adapters) but
will change when a new target is plugged.
Specifying a location allows to understand instantly which board failed
bringup or testing.
Change-Id: I403c7c6c8e34fe42041b3f967db80f3160a4f1a3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3351
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add support for S6E2DH MainFlash. VFlash is not implemented.
Briefly tested with SK-FM4-176L-S6E2DH V110 board.
Change-Id: If7c523d8c75307bc1494bbf4cca3eed0272e8e01
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These appear to be just additional flash size configurations.
Entirely based on manual, untested.
Change-Id: I4460dc1a588335df8fc0a385d24513a4e35b6951
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
On the ARM PB1176JZF-S the system comes up in secure monitor
mode after reset. However the modebits in CPSR form the value
28 (0x1c) and CPSR is 0x800001dc deeming it UNRECOGNIZED.
Define this mode to be synonymous to mode 22 (MON) and things
start to work like a charm.
Change-Id: I001f7773ee1076202c0c633e466d2d833f7a1413
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-on: http://openocd.zylin.com/3196
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds necessary code to obtain data from the Info region which is
not memory-mapped so can't be read the usual way.
With this "flash read_bank" and "flash verify_bank" commands should
start to work as expected for the Info memory block.
Change-Id: I57e4b80fff577500cfa85954b625fe9c9ff92aa5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3227
Tested-by: jenkins
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Instead of documenting the file path as a comment and inline-commenting
the THUMB bytecode, include the hex array via preprocessor.
This assures the path is actually up-to-date and facilitates updating
the code.
Change-Id: Ieb0a7cd0bc14882ac96750f524616d9768a0c6f5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3134
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Instead of pointing to the assembler sources in a comment and
inline-commenting the THUMB bytecode, place the hex array alongside the
assembler sources and include it via preprocessor.
Originally inspired by a typo in the file path during driver development,
but it also facilitates making changes to the assembler sources.
A Makefile is provided to help automate updating the bytecode. It is not
integrated with the automake system to avoid forcing an ARM cross-compiler
onto every user, i.e. after modifying the sources they need to be rebuilt
in that directory before building the usual way. ARM_CROSS_COMPILE= can
be passed on the make command line to deal with native ARM toolchains
or with varying prefixes of cross-toolchains.
Change-Id: I00ceb980a68c8554a180dd13719ac77b677a8bcd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3133
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.
Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)
gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.
Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Flash driver for at91sam4 cpu's has been enhanced to recognise and support the SAM4N family.
Change-Id: I50c471a6053b52edffd8efdd8abfe516cc5c55ee
Signed-off-by: Colin Helliwell <colin.helliwell@ln-systems.com>
Reviewed-on: http://openocd.zylin.com/3242
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The reset-init hook for this target speeds up the CPU clock and JTAG adapter
speed. When the target is reset running with high adapter speed, a series of
warnings "DAP transaction stalled (WAIT) - slowing down" will be generated
since the adapter speed is not reduced to fit the slower CPU speed.
Fix: reduction of the adapter speed before a reset is performed.
Change-Id: Iabfc8e3f70311e0e71c8eed09b8a37fcbed9c58d
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3365
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
