Commit Graph

3556 Commits

Author SHA1 Message Date
Zachary T Welch
34654359a9 remove #if logic for openocd_sleep_*lude
Adds server_stubs.c to hold these routines, using automake logic to
ensure it gets included under the right conditions.
2009-12-02 13:26:26 -08:00
Zachary T Welch
62fbb0f545 target: factor init to 'target init'
Adds 'target init' command handler, called as part of 'init'.
2009-12-02 13:26:23 -08:00
Zachary T Welch
e03f3c57a5 target: factor target_init() into pieces
Moves body of target initialization loop into a helper function,
cleaning up its visual flow in the process.
2009-12-02 13:26:23 -08:00
Zachary T Welch
ac1887c703 jtag: factor init into 'jtag init'
Adds 'jtag init' command handler, which can be called as part of a
fine-grained 'init' process.
2009-12-02 13:26:22 -08:00
Zachary T Welch
37201c019f flash: factor init to 'flash init'
Split flash initialiation into 'flash init', called from 'init'.
2009-12-02 13:26:22 -08:00
Zachary T Welch
1de0b9d351 mflash: factor init to 'mflash init'
Splits mflash initialiation to 'mflash init', called from 'init'.
2009-12-02 13:26:22 -08:00
Zachary T Welch
747f8af672 nand: factor init to 'nand init'
Split NAND initialization into 'nand init', which gets called from
the main 'init' command.
2009-12-02 13:26:22 -08:00
Zachary T Welch
682910fdc2 pld: factor init to 'pld init'
Split PLD initialization into 'pld init', which gets called from 'init'.
2009-12-02 13:26:22 -08:00
David Brownell
55eeea7fce ARMv7a/Cortex-A8: report watchpoint trigger insn
Save and display the address of the instruction which triggered the
watchpoint.  Because of pipelining, that's well behind the PC value
when debug entry completes.  (Example in a subroutine that had been
returned from...)

Remove unused A8 stuff, mostly watchpoint hooks from the header.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-02 11:31:32 -08:00
David Brownell
03c103d56a ARM: label SP and LR correctly
Except for USR/SYS mode, the labels for the shadowed SP and LR
registers were reversed.  LR is r14; SP is r13.  Fix.

This would not affect GDB users; GDB references are positional.
Only folk working directly with OpenOCD register values would
have noticed this bug.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-02 11:31:32 -08:00
Øyvind Harboe
d84fead487 zy1000: keep up with startup refactoring work.
keep up with server_init() introduction.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-02 12:45:12 +01:00
David Brownell
f4b52e1ceb Cortex-A8: basic watchpoint support
Actually this should handle both breakpoints and watchpoints ... but
the DPM framework only handles watchpoints for now.  Works on Beagle.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 21:47:45 -08:00
David Brownell
66ca84b581 ARM: core DPM support for watchpoints
This is a NOP unless the underlying core exposes two new methods, and
neither of the two cores using this (ARM11xx, Cortex-A8) do so yet.

This patch only updates those cores so they pass a flag saying whether
or not to update breakpoint and watchpoint status before resuming; and
removing some now-needless anti-segfault code from ARM11.  Cortex-A8
didn't have that code ... yes, it segfaulted when setting watchpoints.

NOTE:  this uses a slightly different strategy for setting/clearing
breakpoints than the ARM7/ARM9/etc code uses.  It leaves them alone
unless it's *got* to change something, to speed halt/resume cycles
(including single stepping).

ALSO NOTE:  this under-delivers for Cortex-A8, where regions with size
up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can
also handle (size 1/2/4 bytes).  Should get fixed later.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 21:47:45 -08:00
David Brownell
1c7d3d200c ARMv7a: move constants out of Cortex-A8 header
These are architecturally defined, not core-specific.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 20:39:58 -08:00
David Brownell
a65e75ea34 Tcl and doc: update to match new 'arm mcr ...' etc
Make them match the C code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 01:10:19 -08:00
Øyvind Harboe
48edd58c39 target: at91eb40a.cfg is a board, not a target.
Also updated to use target name when creating flash
and set jtag_khz to 16000.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-01 10:06:40 +01:00
Øyvind Harboe
445da543d8 zy1000: keep up with latest changes to command handling
Keep up with Jim Tcl interpreter creation cleanup.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-01 09:53:23 +01:00
Øyvind Harboe
5576a6240a command: the Jim interpreter can now be provided rather than created
In embedded hosts, the Jim interpreter can come from the
existing context rather than be created by OpenOCD.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-01 09:53:23 +01:00
David Brownell
63dc352876 ARM11: remove previous mcr()/mrc() methods
We don't need this code, now that the DPM code handles it.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:49:16 -08:00
David Brownell
5949a3b3a5 Cortex-A8: remove previous mcr()/mrc() methods
We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too.  And disable a mostly-needless diagnostic.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:49:11 -08:00
David Brownell
563d937c3c ARM: implement mrc()/mcr() as DPM ops
Instead of having separate ARM11 and Cortex-A8 implementations of
this code, have one shared implementation which just builds on the
existing "run instruction via R0" support.

This enables followup patches to remove that now-unused code from
those two drivers.  (Patches to move the "mrc" and "mcr" code into
"struct arm" are due too ... MIPS and other cores do not support
those ARM-specific concepts.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:49:04 -08:00
David Brownell
177bbd8891 target: "mcr" and "mrc" are ARM-specific
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.

Correct the usage message for both commands:  it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).

For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:48:53 -08:00
David Brownell
209a0197f0 ARMv7-A: stop using CP15 ops
The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.

This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:48:40 -08:00
David Brownell
fb984a477d Cortex-A8: stop using CP15 ops
There were two chunks of Cortex-A8 code which called the
ARMv7-A CP15 operations; get rid of them, helping prepare
to remove those methods completely:

 - post_debug_entry() can use the mrc() method to read
   its two registers.

 - write_memory() can use dpm->instr_write_data_r0() to
   flush the ICache and DCache ... doing it this way is
   actually faster since it reduces per-write overhead.

Note that the mrc() method parameters are re-ordered with
respect to the ARM instruction documentation, so that part
can be confusing.

Cleaned up the layout and comments in those areas a bit.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-01 00:48:40 -08:00
Øyvind Harboe
51e9b25c9a main: invoke jtag_interface_quit() explicitly
There is no particular reason to invoke jtag_interface_quit()
on the atexit() handler, it just makes the code more obtuse
and stops other legitimate usage of atexit().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-01 07:51:26 +01:00