If the target supports SYSRESETREQ make sure we use that as the default
if srst is not fitted/configured.
Change-Id: I24c907493134506320e69c1218702930629c1cdc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/792
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Always scan out all bits, but make sure only the allowed number of bytes
end up in the caller-provided buffer. Discard the rest by adding another
scan field when size < 4.
Rewrite the endianness callback to avoid reading outside allocated memory.
Make it directly usable as a callback without the need for a wrapper. Move
the shared callback to a more suitable home in arm7_9_common.
This fixes the regressions introduced in commits
991ed5a2b6cb90d32e38
and
c3074f377c
Change-Id: Ia8bde8c5a9844e89a1d6c0bc8534cd26f02f8d11
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/789
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The function wait_for_pracc_rw() fails if Pracc bit is 0.
The variable ejtag_ctrl is loaded with the content of the
control register in the first scan.
In the second scan Pracc bit is scanned out as 0, letting
the proccesor go. The result is unpredictable.
All the strange data corruption when scanning at certain
frequencies, or the strange delays needed when entering
or leaving fasdata area are retated to this bug.
Now the code works at any scan frequency, tested up to 15000Khz
and indepently of processor speed, tested at 31.25Khz and 4/8Mhz.
Change-Id: Iedfd81d06d6af4bc738a521f720e42323025b268
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/769
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Retest the condition when needed, instead of abusing the common_magic
field as a flag. There are only two options here. Either it's an armv7m or
it's another arm. is_arm(...) will return true even for armv7m, so it's
imperative to check in the right order.
Change-Id: Ic227f19f7babf1b0b0fe075f9a3abc4eabc7d5f1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
By Initialising the param_table we remove the clang warning's.
We are also make sure we are not passing any rogue values to lpc2000_iap_call.
Change-Id: Idb3b0077d1dae5f03dedab1d46d01140fe9ffb10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/777
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reorder to allocate all memory after COMMAND_PARSE_NUMBER call.
This removes a clang warning about un-released memory
Change-Id: I8dbeb664a6467077157015bd879bc0aefc5e8614
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/776
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If the flash class was defined as FC_FLEX_RAM then this would always drop
through to the default handler.
This bug was found by clang, so untested.
Change-Id: I2d9fe6415dd216728a145519400f7b9ef1bd3c3a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/773
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
This file is already included as olimex-arm-usb-ocd.cfg.
Change-Id: I0e66977c58e74ac93a0dc3a0c88a5e5af4992f8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/780
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The embedded projects shop released a new highspeed version of
the openocd-usb adapter. These configuration files adds support
for it.
Change-Id: I9b23d7889f998712b9041af101e3f0b9aba85b28
Signed-off-by: Andrew Karpow <notandyk@gmail.com>
Reviewed-on: http://openocd.zylin.com/771
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Check that the target is valid before calling any target functions.
Change-Id: I538fccc79d5ec89976e14beab02cb20490b299bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/766
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Gitweb changed their instructions, info about ssh keys is now on
separate page for all platforms (selector at top of the page).
Change-Id: I3eab5dfae06cfb73f4a76718f92518454021e557
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/768
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
make distcheck is used to make packages with OpenOCD release, this
command uses information from Makefile.am files to know which files
should be included in the package and which can be left only in
repository. This patch makes a few headers from recent JTAG drivers
and one txt file with info about target tcl config files included in
released packages.
Change-Id: I91202290633a30f53624a8c7d9a0ebf72c40772b
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/767
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Not just print it.
This enables scripts to analyze valuable config options of
arm946e-s cores, do internal BIST memory tests and more.
Be careful to flush caches before disabling it.
Do not forget that BIST test overwrites memory.
- cp15 rewritten from COMMAND_HANDLER to jim_handler.
Change-Id: I734da0be6db0a3127c2daa94ed75efef94da8ceb
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/694
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Cache type register C0.C is read-only, and display
hard core configuration information.
This information is unlikely be changed in runtime.
- removed C0.C access when result is not used in
arm946e_invalidate_dcache()
- access C0.C only once per target, store result
in cp15_cache_info field of target structure
- fix cache index count calculation
Change-Id: I12bc4c967fdf07f54d755f2f2f42406c0ababc1a
Signed-off-by: Alexander Osipenko <sipych@gmail.com>
Reviewed-on: http://openocd.zylin.com/693
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
