Driver for DesignWare SPI controller, found on many SoCs (see compatible
list in Linux device tree bindings
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml). This
implementation only supports MIPS as it was the only one available for the
tests, however, adding support for other architectures should require only
few adjustments. Driver relies on flash/nor/spi.h to find Flash chip info.
Driver internal functions support 24bit addressing mode, but due to
limitations of flash/nor/spi.h, it is not used. The reported writing speed
is about 60kb/s.
Lint, sanitizer and valgrind reported warnings were not related to the
driver.
Change-Id: Id3df5626ab88055f034f74f274823051dedefeb1
Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8400
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The macro named LIST_HEAD() clashed with a macro of same name in
the GNU libc file sys/queue.h.
This causes a warning in MacOS build due to some other system file
including sys/queue.h.
Rename LIST_HEAD() as OOCD_LIST_HEAD().
Checkpatch-ignore: MACRO_ARG_REUSE
Change-Id: Ic653edec77425a58251d64f56c9f5f6c645ba0cd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Andrew Shelley <ashelley@btinternet.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8683
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andy <andrewjohnshelley@gmail.com>
This updates the flash driver to support more than one bank.
This is required to support the cc1352p7 which has two banks.
This only have been tested on a cc1352p7.
The loader has been built using a gcc-arm-none-eabi-4_8-2014q3
toolchain.
Change-Id: Ia813421ececd96d6e2fd4dae910ad60fcc3d3c88
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8192
Tested-by: jenkins
Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added FT4232HA varianet of FTDI's FT4232H which has a different bcd.
Also added default PID/VID for the FT4243HA to contrib/60-openocd.rules.
And added default PID/VIDs for FTDI's HP ICs to contrib/60-openocd.rules
as this wasn't done previously.
BugLink: https://sourceforge.net/p/openocd/tickets/410/
Change-Id: Ia84b566aa004332d3f7815a3d22ac37eee4f522a
Signed-off-by: Jonathan Forrest <jonyscathe@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This document is outdated and has broken text formatting. It also
provides no useful information to users nor developers, at worst it
causes confusion. For that reason, drop this file.
Change-Id: Id5ee1f6e74d1a641c60d897f114bb97f5fd48e5b
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8292
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This file is intended to be included in any user's project that
plans to use OpenOCD awareness for uCOS-III.
It is supposed to be distributed under a license compatible with
the uCOS-III code, that is Apache-2.0 license.
Distribute it under Apache License 2.0.
Change-Id: I51ecd469c8ccdd23a069d21e89b7d90886691395
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7996
Tested-by: jenkins
Before this change, when we send an I2C Bulk data at the same
time while Jtag bitbanging functions execute, the microcontroller
puts JTAG bitbanging on wait and executes all I2C bitbanging
function, which causes problems like loss of Ack in DAP responses
and other errors.
With this commit, When I2C interruption occurs, it sets a variable
to true and continues JTAG bitbanging, when it finish it executes
the I2C bitbang.
Change-Id: Ia80bac21f8a259f4a1176b5346bf74ed0aa6e38b
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8074
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add GPIO extender initial configuration that is needed to configure
some important GPIOs and ensure that the dev board is ready to work.
Add i2c_write function that make a write transfer to any slave device.
Give a new Product ID to ANGIE to make it different than the non
programmed ANGIE.
Change-Id: I0a8dacb7fe218145b7d3ed1cb75f106ed6256714
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8072
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
We want to keep the tri-state buffers located between the FPGA
and the board, in 'Z' state until we launch an i2c connection.
We launch an i2c start condition, make the SCL
direction 'OUT' to start the i2c protocol and at the end
of the i2c connection at the stop condition, we re-make
the tri-state buffers at 'Z' state.
Change-Id: Ic597a70d0427832547f6b539864c24ce20a18c64
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7989
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change the GPIF state machine, configuring only one of the 4 waveforms
to generate the clock signal (CCLK) used to program the FPGA, and send
one byte every cycle using an 8-bit bus.
Change-Id: I43cf5480b9d5c40cc2f6a62a52ecfe078b76458e
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7976
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This adds new command characters to make SWD work with the new split
jtag and swd operations of bitbang.
The command characters are as follows:
O - SWDIO drive 1
o - SWDIO drive 0
c - SWDIO read request
d - SWD write 0 0
e - SWD write 0 1
f - SWD write 1 0
g - SWD write 1 1
Documentation has been updated accordingly. The new commands will be
used by an adapted version of the jtag-openocd applet of the "Glasgow
Debug Tool" (https://github.com/glasgowEmbedded/Glasgow). It has been
tested against an stm32f103 and an at91samd21 target.
contrib/remote/bitbang/remote_bitbang_sysfsgpio.c has also been adapted
to support SWD via the new command set. Some limited testing has been
done using a Raspberry Pi 2 with an stm32f103 and an at91samd21 target
attached.
Change-Id: I8e998a2cb36905142cb16e534483094cd99e8fa7
Signed-off-by: Manuel Wick <manuel@matronix.de>
Signed-off-by: David Ryskalczyk <david.rysk@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6044
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This file is intended to be included in any user's project that
plans to use OpenOCD awareness for FreeRTOS.
It is supposed to be distributed under a permissive license to not
impact the original license of the user's project.
Distribute it under Creative Commons Zero v1.0 Universal license.
Change-Id: I7ac90e8b742517bcafc08c00662625671c8159c4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7995
Reviewed-by: Karl Palsson <karlp@tweak.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
add new i2c bit-banging feature, we can now connect in JTAG with the SoC
target and in i2c with the main board components at the same time.
Change-Id: I8e4516fe1ad5238e0373444f1c3c9bc0814d0f52
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7796
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
add a line that checks the returned value of set signals function
add two VIDs of other original boards (have onboard angie architecture)
so angie driver can connect to them and change their VID after
renumeration.
Change-Id: Ide4f1f6f38168a410191bf3ff75bcd59dcf7ef50
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7795
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is the driver code for NanoXplore's ANGIE USB-JTAG Adapter.
The driver is based on the openULINK project.
This driver communicate with ANGIE's firmware in order to establish
JTAG protocol to debug the target chip.
Since the ANGIE Adapter has a Spartan-6 FPGA in addition to the
FX2 microcontroller, the driver adds two functions, one to download
the firmware (embedded C) to the FX2, and the second to program
the FPGA with its bitstream.
Add ANGIE's configuration file to tcl/interface/
Add the device VID/PID to 60-openocd.rules file.
Add ANGIE to OpenOCD's documentation
Change-Id: Id17111c74073da01450d43d466e11b0cc086691f
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7702
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
This is ANGIE's firmware and bitstream code.
The 'Embeded C' code is based on the openULINK project.
The hdl bitstream source code is for the spartan-6 FPGA included in
ANGIE.
Since ANGIE has a different microcontroller (EZ-USB FX2) than openULINK
(EZ-USB AN2131), the registers file (reg_ezusb.h) has been changed
completely, so are the descriptors, interruptions and the endpoints
configuration.
Change-Id: I70590c7c58bac6f1939c5ffba57e87d86850664d
Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7701
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
