mirror of
https://github.com/linux-msm/openocd.git
synced 2026-02-25 13:15:07 -08:00
Transform 'u16' to 'uint16_t'
- Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
@@ -57,7 +57,7 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
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static u32 at91sam7_get_flash_status(target_t *target, int bank_number);
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static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
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static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout);
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static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen);
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static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
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static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
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flash_driver_t at91sam7_flash =
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@@ -274,7 +274,7 @@ static u32 at91sam7_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeo
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}
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/* Send one command to the AT91SAM flash controller */
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static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, u16 pagen)
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static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen)
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{
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u32 fcr;
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at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
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@@ -309,14 +309,14 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
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at91sam7_flash_bank_t *at91sam7_info;
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target_t *target = t_bank->target;
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u16 bnk, sec;
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u16 arch;
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uint16_t bnk, sec;
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uint16_t arch;
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u32 cidr;
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uint8_t banks_num = 0;
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u16 num_nvmbits = 0;
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u16 sectors_num = 0;
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u16 pages_per_sector = 0;
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u16 page_size = 0;
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uint16_t num_nvmbits = 0;
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uint16_t sectors_num = 0;
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uint16_t pages_per_sector = 0;
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uint16_t page_size = 0;
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u32 ext_freq;
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u32 bank_size;
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u32 base_address = 0;
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@@ -621,12 +621,12 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
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static int at91sam7_erase_check(struct flash_bank_s *bank)
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{
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target_t *target = bank->target;
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u16 retval;
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uint16_t retval;
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u32 blank;
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u16 fast_check;
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uint16_t fast_check;
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uint8_t *buffer;
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u16 nSector;
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u16 nByte;
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uint16_t nSector;
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uint16_t nByte;
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if (bank->target->state != TARGET_HALTED)
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{
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@@ -759,9 +759,9 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *
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int banks_num;
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int num_sectors;
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u16 pages_per_sector;
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u16 page_size;
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u16 num_nvmbits;
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uint16_t pages_per_sector;
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uint16_t page_size;
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uint16_t num_nvmbits;
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char *target_name;
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@@ -29,30 +29,30 @@ typedef struct at91sam7_flash_bank_s
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{
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/* chip id register */
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u32 cidr;
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u16 cidr_ext;
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u16 cidr_nvptyp;
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u16 cidr_arch;
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u16 cidr_sramsiz;
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u16 cidr_nvpsiz;
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u16 cidr_nvpsiz2;
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u16 cidr_eproc;
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u16 cidr_version;
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uint16_t cidr_ext;
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uint16_t cidr_nvptyp;
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uint16_t cidr_arch;
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uint16_t cidr_sramsiz;
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uint16_t cidr_nvpsiz;
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uint16_t cidr_nvpsiz2;
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uint16_t cidr_eproc;
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uint16_t cidr_version;
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char *target_name;
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/* flash auto-detection */
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uint8_t flash_autodetection;
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/* flash geometry */
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u16 pages_per_sector;
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u16 pagesize;
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u16 pages_in_lockregion;
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uint16_t pages_per_sector;
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uint16_t pagesize;
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uint16_t pages_in_lockregion;
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/* nv memory bits */
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u16 num_lockbits_on;
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u16 lockbits;
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u16 num_nvmbits;
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u16 num_nvmbits_on;
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u16 nvmbits;
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uint16_t num_lockbits_on;
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uint16_t lockbits;
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uint16_t num_nvmbits;
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uint16_t num_nvmbits_on;
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uint16_t nvmbits;
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uint8_t securitybit;
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/* 0: not init
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@@ -76,8 +76,8 @@ extern int mcu_write_ir(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int ir
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extern int mcu_write_dr(jtag_tap_t *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u8(jtag_tap_t *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u16(jtag_tap_t *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
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extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
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extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
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extern int mcu_execute_queue(void);
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@@ -25,7 +25,7 @@
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typedef struct avrf_type_s
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{
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char name[15];
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u16 chip_id;
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uint16_t chip_id;
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int flash_page_size;
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int flash_page_num;
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int eeprom_page_size;
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@@ -203,7 +203,7 @@ static uint8_t cfi_get_u8(flash_bank_t *bank, int sector, u32 offset)
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}
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}
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static u16 cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
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static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, u32 offset)
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{
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target_t *target = bank->target;
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cfi_flash_bank_t *cfi_info = bank->driver_priv;
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@@ -979,8 +979,8 @@ static void cfi_add_byte(struct flash_bank_s *bank, uint8_t *word, uint8_t byte)
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/* NOTE:
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* The data to flash must not be changed in endian! We write a bytestrem in
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* target byte order already. Only the control and status byte lane of the flash
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* WSM is interpreted by the CPU in different ways, when read a u16 or u32
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* word (data seems to be in the upper or lower byte lane for u16 accesses).
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* WSM is interpreted by the CPU in different ways, when read a uint16_t or u32
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* word (data seems to be in the upper or lower byte lane for uint16_t accesses).
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*/
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#if 0
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@@ -34,16 +34,16 @@ typedef struct cfi_flash_bank_s
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int not_cfi;
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int probed;
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u16 manufacturer;
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u16 device_id;
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uint16_t manufacturer;
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uint16_t device_id;
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char qry[3];
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/* identification string */
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u16 pri_id;
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u16 pri_addr;
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u16 alt_id;
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u16 alt_addr;
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uint16_t pri_id;
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uint16_t pri_addr;
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uint16_t alt_id;
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uint16_t alt_addr;
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/* device-system interface */
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uint8_t vcc_min;
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@@ -63,8 +63,8 @@ typedef struct cfi_flash_bank_s
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/* flash geometry */
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u32 dev_size;
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u16 interface_desc;
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u16 max_buf_write_size;
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uint16_t interface_desc;
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uint16_t max_buf_write_size;
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uint8_t num_erase_regions;
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u32 *erase_region_info;
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@@ -83,11 +83,11 @@ typedef struct cfi_intel_pri_ext_s
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uint8_t minor_version;
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u32 feature_support;
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uint8_t suspend_cmd_support;
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u16 blk_status_reg_mask;
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uint16_t blk_status_reg_mask;
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uint8_t vcc_optimal;
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uint8_t vpp_optimal;
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uint8_t num_protection_fields;
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u16 prot_reg_addr;
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uint16_t prot_reg_addr;
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uint8_t fact_prot_reg_size;
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uint8_t user_prot_reg_size;
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uint8_t extra[0];
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@@ -144,8 +144,8 @@ typedef struct cfi_unlock_addresses_s
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typedef struct cfi_fixup_s
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{
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u16 mfr;
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u16 id;
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uint16_t mfr;
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uint16_t id;
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void (*fixup)(flash_bank_t *flash, void *param);
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void *param;
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} cfi_fixup_t;
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@@ -157,7 +157,7 @@ static int davinci_address(struct nand_device_s *nand, uint8_t address)
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return ERROR_OK;
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}
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static int davinci_write_data(struct nand_device_s *nand, u16 data)
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static int davinci_write_data(struct nand_device_s *nand, uint16_t data)
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{
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struct davinci_nand *info = nand->controller_priv;
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target_t *target = info->target;
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@@ -30,7 +30,7 @@ static int lpc3180_init(struct nand_device_s *device);
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static int lpc3180_reset(struct nand_device_s *device);
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static int lpc3180_command(struct nand_device_s *device, uint8_t command);
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static int lpc3180_address(struct nand_device_s *device, uint8_t address);
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static int lpc3180_write_data(struct nand_device_s *device, u16 data);
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static int lpc3180_write_data(struct nand_device_s *device, uint16_t data);
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static int lpc3180_read_data(struct nand_device_s *device, void *data);
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static int lpc3180_write_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
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static int lpc3180_read_page(struct nand_device_s *device, u32 page, uint8_t *data, u32 data_size, uint8_t *oob, u32 oob_size);
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@@ -410,7 +410,7 @@ static int lpc3180_address(struct nand_device_s *device, uint8_t address)
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return ERROR_OK;
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}
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static int lpc3180_write_data(struct nand_device_s *device, u16 data)
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static int lpc3180_write_data(struct nand_device_s *device, uint16_t data)
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{
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lpc3180_nand_controller_t *lpc3180_info = device->controller_priv;
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target_t *target = lpc3180_info->target;
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@@ -466,7 +466,7 @@ static int lpc3180_read_data(struct nand_device_s *device, void *data)
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}
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else if (device->bus_width == 16)
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{
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u16 *data16 = data;
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uint16_t *data16 = data;
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target_read_u16(target, 0x200b0000, data16);
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}
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else
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@@ -489,7 +489,7 @@ static int lpc3180_read_data(struct nand_device_s *device, void *data)
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}
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else if (device->bus_width == 16)
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{
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u16 *data16 = data;
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uint16_t *data16 = data;
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*data16 = data32 & 0xffff;
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}
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else
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@@ -956,8 +956,8 @@ static double mg_calc_pll(double XIN, mg_pll_t *p_pll_val)
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static int mg_verify_interface(void)
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{
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u16 buff[MG_MFLASH_SECTOR_SIZE >> 1];
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u16 i, j;
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uint16_t buff[MG_MFLASH_SECTOR_SIZE >> 1];
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uint16_t i, j;
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u32 address = mflash_bank->base + MG_BUFFER_OFFSET;
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target_t *target = mflash_bank->target;
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int ret;
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@@ -1174,7 +1174,7 @@ static int mg_set_pll(mg_pll_t *pll)
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memset(buff, 0xff, 512);
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/* PLL Lock cycle and Feedback 9bit Divider */
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memcpy(buff, &pll->lock_cyc, sizeof(u32));
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memcpy(buff + 4, &pll->feedback_div, sizeof(u16));
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memcpy(buff + 4, &pll->feedback_div, sizeof(uint16_t));
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buff[6] = pll->input_div; /* PLL Input 5bit Divider */
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buff[7] = pll->output_div; /* PLL Output Divider */
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@@ -1306,7 +1306,7 @@ static int mg_bank_cmd(struct command_context_s *cmd_ctx, char *cmd, char **args
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mflash_bank->base = strtoul(args[1], NULL, 0);
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mflash_bank->rst_pin.num = strtoul(args[2], &str, 0);
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if (*str)
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mflash_bank->rst_pin.port[0] = (u16)tolower(str[0]);
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mflash_bank->rst_pin.port[0] = (uint16_t)tolower(str[0]);
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mflash_bank->target = target;
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@@ -384,7 +384,7 @@ int nand_read_status(struct nand_device_s *device, uint8_t *status)
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/* read status */
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if (device->device->options & NAND_BUSWIDTH_16)
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{
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u16 data;
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uint16_t data;
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device->controller->read_data(device, &data);
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*status = data & 0xff;
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}
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@@ -403,7 +403,7 @@ static int nand_poll_ready(struct nand_device_s *device, int timeout)
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device->controller->command(device, NAND_CMD_STATUS);
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do {
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if (device->device->options & NAND_BUSWIDTH_16) {
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u16 data;
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uint16_t data;
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device->controller->read_data(device, &data);
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status = data & 0xff;
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} else {
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@@ -464,7 +464,7 @@ int nand_probe(struct nand_device_s *device)
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}
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else
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{
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u16 data_buf;
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uint16_t data_buf;
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device->controller->read_data(device, &data_buf);
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manufacturer_id = data_buf & 0xff;
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device->controller->read_data(device, &data_buf);
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@@ -524,7 +524,7 @@ int nand_probe(struct nand_device_s *device)
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}
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else
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{
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u16 data_buf;
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uint16_t data_buf;
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device->controller->read_data(device, &data_buf);
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id_buff[3] = data_buf;
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@@ -996,7 +996,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u
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{
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if (device->device->options & NAND_BUSWIDTH_16)
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{
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u16 data_buf = le_to_h_u16(data);
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uint16_t data_buf = le_to_h_u16(data);
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device->controller->write_data(device, data_buf);
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data += 2;
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i += 2;
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@@ -1021,7 +1021,7 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, uint8_t *data, u
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{
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if (device->device->options & NAND_BUSWIDTH_16)
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{
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u16 oob_buf = le_to_h_u16(data);
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uint16_t oob_buf = le_to_h_u16(data);
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device->controller->write_data(device, oob_buf);
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oob += 2;
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i += 2;
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@@ -38,7 +38,7 @@ typedef struct nand_flash_controller_s
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int (*reset)(struct nand_device_s *device);
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int (*command)(struct nand_device_s *device, uint8_t command);
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int (*address)(struct nand_device_s *device, uint8_t address);
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int (*write_data)(struct nand_device_s *device, u16 data);
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int (*write_data)(struct nand_device_s *device, uint16_t data);
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int (*read_data)(struct nand_device_s *device, void *data);
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int (*write_block_data)(struct nand_device_s *device, uint8_t *data, int size);
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int (*read_block_data)(struct nand_device_s *device, uint8_t *data, int size);
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@@ -137,7 +137,7 @@ int nand_calculate_ecc_kw(struct nand_device_s *device, const uint8_t *data, uin
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d = data[i];
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if (r7) {
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u16 *t = gf_exp + gf_log[r7];
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uint16_t *t = gf_exp + gf_log[r7];
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r7 = r6 ^ t[0x21c];
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r6 = r5 ^ t[0x181];
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@@ -24,12 +24,12 @@
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typedef struct non_cfi_s
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{
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u16 mfr;
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u16 id;
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u16 pri_id;
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uint16_t mfr;
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uint16_t id;
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uint16_t pri_id;
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u32 dev_size;
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u16 interface_desc;
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u16 max_buf_write_size;
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uint16_t interface_desc;
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uint16_t max_buf_write_size;
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uint8_t num_erase_regions;
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u32 erase_region_info[6];
|
||||
uint8_t status_poll_mask;
|
||||
|
||||
@@ -79,7 +79,7 @@ static int orion_nand_read(struct nand_device_s *device, void *data)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int orion_nand_write(struct nand_device_s *device, u16 data)
|
||||
static int orion_nand_write(struct nand_device_s *device, uint16_t data)
|
||||
{
|
||||
orion_nand_controller_t *hw = device->controller_priv;
|
||||
target_t *target = hw->target;
|
||||
|
||||
@@ -260,7 +260,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
|
||||
pic32mx_flash_bank_t *pic32mx_info = NULL;
|
||||
target_t *target = bank->target;
|
||||
#if 0
|
||||
u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
|
||||
uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
|
||||
int i, reg, bit;
|
||||
int status;
|
||||
u32 protection;
|
||||
@@ -285,10 +285,10 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
|
||||
* high density - each bit refers to a 2bank protection */
|
||||
target_read_u32(target, PIC32MX_FLASH_WRPR, &protection);
|
||||
|
||||
prot_reg[0] = (u16)protection;
|
||||
prot_reg[1] = (u16)(protection >> 8);
|
||||
prot_reg[2] = (u16)(protection >> 16);
|
||||
prot_reg[3] = (u16)(protection >> 24);
|
||||
prot_reg[0] = (uint16_t)protection;
|
||||
prot_reg[1] = (uint16_t)(protection >> 8);
|
||||
prot_reg[2] = (uint16_t)(protection >> 16);
|
||||
prot_reg[3] = (uint16_t)(protection >> 24);
|
||||
|
||||
if (pic32mx_info->ppage_size == 2)
|
||||
{
|
||||
@@ -596,7 +596,7 @@ static int pic32mx_probe(struct flash_bank_s *bank)
|
||||
mips32_common_t *mips32 = target->arch_info;
|
||||
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
|
||||
int i;
|
||||
u16 num_pages = 0;
|
||||
uint16_t num_pages = 0;
|
||||
u32 device_id;
|
||||
int page_size;
|
||||
|
||||
|
||||
@@ -34,7 +34,7 @@
|
||||
static int s3c2410_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
|
||||
static int s3c2410_init(struct nand_device_s *device);
|
||||
static int s3c2410_read_data(struct nand_device_s *device, void *data);
|
||||
static int s3c2410_write_data(struct nand_device_s *device, u16 data);
|
||||
static int s3c2410_write_data(struct nand_device_s *device, uint16_t data);
|
||||
static int s3c2410_nand_ready(struct nand_device_s *device, int timeout);
|
||||
|
||||
nand_flash_controller_t s3c2410_nand_controller =
|
||||
@@ -86,7 +86,7 @@ static int s3c2410_init(struct nand_device_s *device)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int s3c2410_write_data(struct nand_device_s *device, u16 data)
|
||||
static int s3c2410_write_data(struct nand_device_s *device, uint16_t data)
|
||||
{
|
||||
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
|
||||
target_t *target = s3c24xx_info->target;
|
||||
|
||||
@@ -104,7 +104,7 @@ int s3c24xx_address(struct nand_device_s *device, uint8_t address)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int s3c24xx_write_data(struct nand_device_s *device, u16 data)
|
||||
int s3c24xx_write_data(struct nand_device_s *device, uint16_t data)
|
||||
{
|
||||
s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
|
||||
target_t *target = s3c24xx_info->target;
|
||||
|
||||
@@ -48,7 +48,7 @@ extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx);
|
||||
extern int s3c24xx_reset(struct nand_device_s *device);
|
||||
extern int s3c24xx_command(struct nand_device_s *device, uint8_t command);
|
||||
extern int s3c24xx_address(struct nand_device_s *device, uint8_t address);
|
||||
extern int s3c24xx_write_data(struct nand_device_s *device, u16 data);
|
||||
extern int s3c24xx_write_data(struct nand_device_s *device, uint16_t data);
|
||||
extern int s3c24xx_read_data(struct nand_device_s *device, void *data);
|
||||
extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
|
||||
|
||||
|
||||
@@ -412,7 +412,7 @@ static u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int time
|
||||
}
|
||||
|
||||
/* Send one command to the flash controller */
|
||||
static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,u16 pagen)
|
||||
static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_t pagen)
|
||||
{
|
||||
u32 fmc;
|
||||
target_t *target = bank->target;
|
||||
|
||||
@@ -40,7 +40,7 @@ typedef struct stellaris_flash_bank_s
|
||||
u32 pages_in_lockregion;
|
||||
|
||||
/* nv memory bits */
|
||||
u16 num_lockbits;
|
||||
uint16_t num_lockbits;
|
||||
u32 lockbits;
|
||||
|
||||
/* main clock status */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user