mirror of
https://github.com/linux-msm/openocd.git
synced 2026-02-25 13:15:07 -08:00
target: aarch64: add support for 32 bit MON mode
Extend the existing code to support Monitor mode in AArch32. Change-Id: Ia43df98d1497baac48aea67b92d81344c24f0635 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8169 Tested-by: jenkins
This commit is contained in:
@@ -93,6 +93,7 @@ static int aarch64_restore_system_control_reg(struct target *target)
|
||||
case ARM_MODE_HYP:
|
||||
case ARM_MODE_UND:
|
||||
case ARM_MODE_SYS:
|
||||
case ARM_MODE_MON:
|
||||
instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0);
|
||||
break;
|
||||
|
||||
@@ -172,6 +173,7 @@ static int aarch64_mmu_modify(struct target *target, int enable)
|
||||
case ARM_MODE_HYP:
|
||||
case ARM_MODE_UND:
|
||||
case ARM_MODE_SYS:
|
||||
case ARM_MODE_MON:
|
||||
instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0);
|
||||
break;
|
||||
|
||||
@@ -1043,6 +1045,7 @@ static int aarch64_post_debug_entry(struct target *target)
|
||||
case ARM_MODE_HYP:
|
||||
case ARM_MODE_UND:
|
||||
case ARM_MODE_SYS:
|
||||
case ARM_MODE_MON:
|
||||
instr = ARMV4_5_MRC(15, 0, 0, 1, 0, 0);
|
||||
break;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user