avr32: work-in-progress

committed so as to ease cooperation and to let it be improved
over time.

So far it supports:
- halt/resume
- registers inspection
- memory inspection/modification

I'm still getting up to speed with OpenOCD internals and AVR32 so code is a little
bit messy and I'd appreciate any feedback.

src/target/Makefile.am

@@ -32,6 +32,7 @@ libtarget_la_SOURCES = \
 	$(ARMV6_SRC) \
 	$(ARMV7_SRC) \
 	$(ARM_MISC_SRC) \
+	$(AVR32_SRC) \
 	$(MIPS32_SRC) \
 	avrt.c \
 	dsp563xx.c \
@@ -92,6 +93,12 @@ ARM_DEBUG_SRC = \
 	$(OOCD_TRACE_FILES) \
 	etm_dummy.c
 
+AVR32_SRC = \
+	avr32_ap7k.c \
+	avr32_jtag.c \
+	avr32_mem.c \
+	avr32_regs.c
+
 MIPS32_SRC = \
 	mips32.c \
 	mips_m4k.c \

src/target/avr32_ap7k.h

@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+
+#ifndef AVR32_AP7K
+#define AVR32_AP7K
+
+#include <helper/types.h>
+
+struct target;
+
+#define AP7k_COMMON_MAGIC	0x4150374b
+struct avr32_ap7k_common
+{
+	int common_magic;
+	struct avr32_jtag jtag;
+	struct reg_cache *core_cache;
+	uint32_t core_regs[AVR32NUMCOREREGS];
+};
+
+static inline struct avr32_ap7k_common *
+target_to_ap7k(struct target *target)
+{
+	return (struct avr32_ap7k_common*)target->arch_info;
+}
+
+struct avr32_core_reg
+{
+	uint32_t num;
+	struct target *target;
+	struct avr32_ap7k_common *avr32_common;
+};
+
+#endif	/*AVR32_AP7K*/

src/target/avr32_jtag.c

@@ -0,0 +1,392 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "target.h"
+#include "helper/types.h"
+#include "jtag/jtag.h"
+#include "avr32_jtag.h"
+
+static int avr32_jtag_set_instr(struct avr32_jtag *jtag_info, int new_instr)
+{
+	struct jtag_tap *tap;
+	int busy = 0;
+
+	tap = jtag_info->tap;
+	if (tap == NULL)
+		return ERROR_FAIL;
+
+	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
+	{
+		do {
+			struct scan_field field;
+			uint8_t t[4];
+			uint8_t ret[4];
+
+			field.num_bits = tap->ir_length;
+			field.out_value = t;
+			buf_set_u32(t, 0, field.num_bits, new_instr);
+			field.in_value = ret;
+
+			jtag_add_ir_scan(tap, &field, TAP_IDLE);
+			if (jtag_execute_queue() != ERROR_OK)
+			{
+				LOG_ERROR("%s: setting address failed", __func__);
+				return ERROR_FAIL;
+			}
+			busy = buf_get_u32(ret, 2, 1);
+		} while (busy); /* check for busy bit */
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_nexus_set_address(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int mode)
+{
+	struct scan_field fields[2];
+	uint8_t addr_buf[4];
+	uint8_t busy_buf[4];
+	int busy;
+
+	memset(fields, 0, sizeof(fields));
+
+	do {
+		memset(addr_buf, 0, sizeof(addr_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+
+		buf_set_u32(addr_buf, 0, 1, mode);
+		buf_set_u32(addr_buf, 1, 7, addr);
+
+		fields[0].num_bits = 26;
+		fields[0].in_value = NULL;
+		fields[0].out_value = NULL;
+
+		fields[1].num_bits = 8;
+		fields[1].in_value = busy_buf;
+		fields[1].out_value = addr_buf;
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: setting address failed", __func__);
+			return ERROR_FAIL;
+		}
+		busy = buf_get_u32(busy_buf, 6, 1);
+	} while(busy);
+
+	return ERROR_OK;
+}
+
+
+int avr32_jtag_nexus_read_data(struct avr32_jtag *jtag_info, 
+	uint32_t *pdata)
+{
+
+	struct scan_field fields[2];
+	uint8_t data_buf[4];
+	uint8_t busy_buf[4];
+	int busy;
+
+	do {
+		memset(data_buf, 0, sizeof(data_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+
+		fields[0].num_bits = 32;
+		fields[0].out_value = NULL;
+		fields[0].in_value = data_buf;
+
+
+		fields[1].num_bits = 2;
+		fields[1].in_value = busy_buf;
+		fields[1].out_value = NULL;
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: reading data  failed", __func__);
+			return ERROR_FAIL;
+		}
+
+		busy = buf_get_u32(busy_buf, 0, 1);
+	} while (busy);
+
+	*pdata = buf_get_u32(data_buf, 0, 32);
+
+	return ERROR_OK;
+}
+
+
+int avr32_jtag_nexus_write_data(struct avr32_jtag *jtag_info, 
+		uint32_t data)
+{
+
+	struct scan_field fields[2];
+	uint8_t data_buf[4];
+	uint8_t busy_buf[4];
+	uint8_t dummy_buf[4];
+	int busy;
+
+	do {
+		memset(data_buf, 0, sizeof(data_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+		memset(dummy_buf, 0, sizeof(dummy_buf));
+
+		fields[0].num_bits = 2;
+		fields[0].in_value = busy_buf;
+		fields[0].out_value = dummy_buf;
+
+
+		buf_set_u32(data_buf, 0, 32, data);
+		fields[1].num_bits = 32;
+		fields[1].in_value = NULL;
+		fields[1].out_value = data_buf;
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: reading data  failed", __func__);
+			return ERROR_FAIL;
+		}
+
+		busy = buf_get_u32(busy_buf, 0, 0);
+	} while (busy);
+
+
+	return ERROR_OK;
+}
+
+
+
+
+int avr32_jtag_nexus_read(struct avr32_jtag *jtag_info,
+		uint32_t addr, uint32_t *value)
+{
+	avr32_jtag_set_instr(jtag_info, AVR32_INST_NEXUS_ACCESS);
+	avr32_jtag_nexus_set_address(jtag_info, addr, MODE_READ);
+	avr32_jtag_nexus_read_data(jtag_info, value);
+
+	return ERROR_OK;
+
+}
+int avr32_jtag_nexus_write(struct avr32_jtag *jtag_info,
+		uint32_t addr, uint32_t value)
+{
+	avr32_jtag_set_instr(jtag_info, AVR32_INST_NEXUS_ACCESS);
+	avr32_jtag_nexus_set_address(jtag_info, addr, MODE_WRITE);
+	avr32_jtag_nexus_write_data(jtag_info, value);
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_mwa_set_address(struct avr32_jtag *jtag_info, int slave,
+		uint32_t addr, int mode)
+{
+	struct scan_field fields[2];
+	uint8_t addr_buf[4];
+	uint8_t slave_buf[4];
+	uint8_t busy_buf[4];
+	int busy;
+
+	memset(fields, 0, sizeof(fields));
+
+	do {
+		memset(addr_buf, 0, sizeof(addr_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+		memset(slave_buf, 0, sizeof(slave_buf));
+
+		buf_set_u32(slave_buf, 0, 4, slave);
+		buf_set_u32(addr_buf, 0, 1, mode);
+		buf_set_u32(addr_buf, 1, 30, addr >> 2);
+
+		fields[0].num_bits = 31;
+		fields[0].in_value = NULL;
+		fields[0].out_value = addr_buf;
+
+		fields[1].num_bits = 4;
+		fields[1].in_value = busy_buf;
+		fields[1].out_value = slave_buf;
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: setting address failed", __func__);
+			return ERROR_FAIL;
+		}
+		busy = buf_get_u32(busy_buf, 1, 1);
+	} while(busy);
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_mwa_read_data(struct avr32_jtag *jtag_info, 
+	uint32_t *pdata)
+{
+
+	struct scan_field fields[2];
+	uint8_t data_buf[4];
+	uint8_t busy_buf[4];
+	int busy;
+
+	do {
+		memset(data_buf, 0, sizeof(data_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+
+		fields[0].num_bits = 32;
+		fields[0].out_value = NULL;
+		fields[0].in_value = data_buf;
+
+
+		fields[1].num_bits = 3;
+		fields[1].in_value = busy_buf;
+		fields[1].out_value = NULL;
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: reading data  failed", __func__);
+			return ERROR_FAIL;
+		}
+
+		busy = buf_get_u32(busy_buf, 0, 1);
+	} while (busy);
+
+	*pdata = buf_get_u32(data_buf, 0, 32);
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_mwa_write_data(struct avr32_jtag *jtag_info, 
+	uint32_t data)
+{
+
+	struct scan_field fields[2];
+	uint8_t data_buf[4];
+	uint8_t busy_buf[4];
+	uint8_t zero_buf[4];
+	int busy;
+
+	do {
+		memset(data_buf, 0, sizeof(data_buf));
+		memset(busy_buf, 0, sizeof(busy_buf));
+		memset(zero_buf, 0, sizeof(zero_buf));
+
+		buf_set_u32(data_buf, 0, 32, data);
+		fields[0].num_bits = 3;
+		fields[0].in_value = busy_buf;
+		fields[0].out_value = zero_buf;
+
+		fields[1].num_bits = 32;
+		fields[1].out_value = data_buf;
+		fields[1].in_value = NULL;
+
+
+		jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+
+		if (jtag_execute_queue() != ERROR_OK)
+		{
+			LOG_ERROR("%s: reading data  failed", __func__);
+			return ERROR_FAIL;
+		}
+
+		busy = buf_get_u32(busy_buf, 0, 1);
+	} while (busy);
+
+	return ERROR_OK;
+}
+
+
+
+int avr32_jtag_mwa_read(struct avr32_jtag *jtag_info, int slave,
+		uint32_t addr, uint32_t *value)
+{
+	avr32_jtag_set_instr(jtag_info, AVR32_INST_MW_ACCESS);
+	avr32_jtag_mwa_set_address(jtag_info, slave, addr, MODE_READ);
+	avr32_jtag_mwa_read_data(jtag_info, value);
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_mwa_write(struct avr32_jtag *jtag_info, int slave,
+		uint32_t addr, uint32_t value)
+{
+	avr32_jtag_set_instr(jtag_info, AVR32_INST_MW_ACCESS);
+	avr32_jtag_mwa_set_address(jtag_info, slave, addr, MODE_WRITE);
+	avr32_jtag_mwa_write_data(jtag_info, value);
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_exec(struct avr32_jtag *jtag_info, uint32_t inst)
+{
+	int retval;
+	uint32_t ds;
+
+	retval = avr32_jtag_nexus_write(jtag_info, AVR32_OCDREG_DINST, inst);
+	if (retval != ERROR_OK)
+		return retval;
+
+	do {
+		retval = avr32_jtag_nexus_read(jtag_info, AVR32_OCDREG_DS, &ds);
+		if (retval != ERROR_OK)
+			return retval;
+	} while ((ds & OCDREG_DS_DBA) && !(ds & OCDREG_DS_INC));
+
+	return ERROR_OK;
+}
+
+int avr32_ocd_setbits(struct avr32_jtag *jtag, int reg, uint32_t bits)
+{
+	uint32_t value;
+	int res;
+
+	res = avr32_jtag_nexus_read(jtag, reg, &value);
+	if (res)
+		return res;
+
+	value |= bits;
+	res = avr32_jtag_nexus_write(jtag, reg, value);
+	if (res)
+		return res;
+
+	return ERROR_OK;
+}
+
+int avr32_ocd_clearbits(struct avr32_jtag *jtag, int reg, uint32_t bits)
+{
+	uint32_t value;
+	int res;
+
+	res = avr32_jtag_nexus_read(jtag, reg, &value);
+	if (res)
+		return res;
+
+	value &= ~bits;
+	res = avr32_jtag_nexus_write(jtag, reg, value);
+	if (res)
+		return res;
+
+	return ERROR_OK;
+}
+

src/target/avr32_jtag.h

@@ -0,0 +1,107 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifndef AVR32_JTAG
+#define AVR32_JTAG
+
+#define	AVR32NUMCOREREGS	17
+
+/* tap instructions */
+#define AVR32_INST_IDCODE		0x01
+#define AVR32_INST_NEXUS_ACCESS	0x10
+#define AVR32_INST_MW_ACCESS	0x11
+#define AVR32_INST_MB_ACCESS	0x12
+
+#define	SLAVE_OCD				0x01
+#define	SLAVE_HSB_CACHED		0x04
+#define	SLAVE_HSB_UNCACHED		0x05
+
+/*
+ * Registers
+ */
+
+#define AVR32_OCDREG_DID		0x00
+#define AVR32_OCDREG_DC			0x02
+#define		OCDREG_DC_SS			(1 <<  8)
+#define		OCDREG_DC_DBR			(1 << 12)
+#define		OCDREG_DC_DBE			(1 << 13)
+#define		OCDREG_DC_SQA			(1 << 22)
+#define		OCDREG_DC_RES			(1 << 30)
+#define		OCDREG_DC_ABORT			(1 << 31)
+#define AVR32_OCDREG_DS			0x04
+#define		OCDREG_DS_SSS			(1 <<  0)
+#define		OCDREG_DS_SWB			(1 <<  1)
+#define		OCDREG_DS_HWB			(1 <<  2)
+#define		OCDREG_DS_STP			(1 <<  4)
+#define		OCDREG_DS_DBS			(1 <<  5)
+#define		OCDREG_DS_BP_SHIFT		8
+#define		OCDREG_DS_BP_MASK		0xff
+#define		OCDREG_DS_INC			(1 << 24)
+#define		OCDREG_DS_BOZ			(1 << 25)
+#define		OCDREG_DS_DBA			(1 << 26)
+#define		OCDREG_DS_EXB			(1 << 27)
+#define		OCDREG_DS_NTBF			(1 << 28)
+
+#define AVR32_OCDREG_DINST		0x41
+#define AVR32_OCDREG_DPC		0x42
+#define AVR32_OCDREG_DCCPU		0x44
+#define AVR32_OCDREG_DCEMU		0x45
+#define AVR32_OCDREG_DCSR		0x46
+#define		OCDREG_DCSR_CPUD		(1 <<  0)
+#define		OCDREG_DCSR_EMUD		(1 <<  1)
+
+/*
+ * Direction bit
+ */
+#define	MODE_WRITE				0x00
+#define	MODE_READ				0x01
+
+/*
+ * Some instructions
+ */
+
+#define	RETD					0xd703d623
+#define	MTDR(dreg, reg)			(0xe7b00044 | ((reg) << 16) | dreg)
+#define	MFDR(reg, dreg)			(0xe5b00044 | ((reg) << 16) | dreg)
+#define	MTSR(sysreg, reg)		(0xe3b00002 | ((reg) << 16) | sysreg)
+#define	MFSR(reg, sysreg)		(0xe1b00002 | ((reg) << 16) | sysreg)
+
+struct avr32_jtag
+{
+	struct jtag_tap *tap;
+	uint32_t dpc; /* Debug PC value */
+};
+
+int avr32_jtag_nexus_read(struct avr32_jtag *jtag_info,
+		uint32_t addr, uint32_t *value);
+int avr32_jtag_nexus_write(struct avr32_jtag *jtag_info,
+		uint32_t addr, uint32_t value);
+
+int avr32_jtag_mwa_read(struct avr32_jtag *jtag_info, int slave,
+		uint32_t addr, uint32_t *value);
+int avr32_jtag_mwa_write(struct avr32_jtag *jtag_info, int slave,
+		uint32_t addr, uint32_t value);
+
+
+int avr32_ocd_setbits(struct avr32_jtag *jtag, int reg, uint32_t bits);
+int avr32_ocd_clearbits(struct avr32_jtag *jtag, int reg, uint32_t bits);
+
+int avr32_jtag_exec(struct avr32_jtag *jtag_info, uint32_t inst);
+
+#endif /* AVR32_JTAG */
+

src/target/avr32_mem.c

@@ -0,0 +1,333 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "target.h"
+#include "jtag/jtag.h"
+#include "avr32_jtag.h"
+#include "avr32_mem.h"
+
+int avr32_jtag_read_memory32(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint32_t *buffer)
+{
+	int i, retval;
+	uint32_t data;
+
+	for (i = 0; i < count; i++) 
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*4, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		/* XXX: Assume AVR32 is BE */
+		buffer[i] = be_to_h_u32((uint8_t*)&data);
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_read_memory16(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint16_t *buffer)
+{
+	int i, retval;
+	uint32_t data;
+
+	i = 0;
+
+	/* any unaligned half-words? */
+	if (addr & 3)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		/* XXX: Assume AVR32 is BE */
+		data = be_to_h_u32((uint8_t*)&data);
+		buffer[i] = (data >> 16) & 0xffff;
+		i++;
+	}
+
+	/* read all complete words */
+	for (; i < (count & ~1); i+=2)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		/* XXX: Assume AVR32 is BE */
+		data = be_to_h_u32((uint8_t*)&data);
+		buffer[i] = data & 0xffff;
+		buffer[i+1] = (data >> 16) & 0xffff;
+	}
+
+	/* last halfword */
+	if (i < count)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		/* XXX: Assume AVR32 is BE */
+		data = be_to_h_u32((uint8_t*)&data);
+		buffer[i] = data & 0xffff;
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint8_t *buffer)
+{
+	int i, j, retval;
+	uint8_t data[4];
+	i = 0;
+
+	/* Do we have non-aligned bytes? */
+	if (addr & 3)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i, (uint32_t*)data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		for (j = addr & 3; (j < 4) && (i < count); j++, i++) 
+				buffer[i] = data[3-j];
+	}
+
+
+	/* read all complete words */
+	for (; i < (count & ~3); i+=4)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i, (uint32_t*)data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		for (j = 0; j < 4; j++)
+				buffer[i+j] = data[3-j];
+	}
+
+	/* remaining bytes */
+	if (i < count)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i, (uint32_t*)data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		for (j = 0; i + j < count; j++) 
+				buffer[i+j] = data[3-j];
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_write_memory32(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint32_t *buffer)
+{
+	int i, retval;
+	uint32_t data;
+
+	for (i = 0; i < count; i++) 
+	{
+		/* XXX: Assume AVR32 is BE */
+		h_u32_to_be((uint8_t*)&data, buffer[i]);
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*4, data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint16_t *buffer)
+{
+	int i, retval;
+	uint32_t data;
+	uint32_t data_out;
+
+	i = 0;
+
+	/*
+	 * Do we have any non-aligned half-words?
+	 */
+	if (addr & 3) {
+		/* 
+		 * mwa_read will read whole world, no nead to fiddle
+		 * with address. It will be truncated in set_addr
+		 */
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		data = be_to_h_u32((uint8_t*)&data);
+		data = (buffer[i] << 16) | (data & 0xffff);
+		h_u32_to_be((uint8_t*)&data_out, data);
+
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		i++;
+	}
+
+
+	/* write all complete words */
+	for (; i < (count & ~1); i+=2)
+	{
+		/* XXX: Assume AVR32 is BE */
+		data = (buffer[i+1] << 16) | buffer[i];
+		h_u32_to_be((uint8_t*)&data_out, data);
+
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/* last halfword */
+	if (i < count)
+	{
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		data = be_to_h_u32((uint8_t*)&data);
+		data &= ~0xffff;
+		data |= buffer[i];
+		h_u32_to_be((uint8_t*)&data_out, data);
+
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i*2, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	return ERROR_OK;
+}
+
+int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint8_t *buffer)
+{
+	int i, j, retval;
+	uint32_t data;
+	uint32_t data_out;
+
+	i = 0;
+
+	/*
+	 * Do we have any non-aligned bytes?
+	 */
+	if (addr & 3) {
+		/* 
+		 * mwa_read will read whole world, no nead to fiddle
+		 * with address. It will be truncated in set_addr
+		 */
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		data = be_to_h_u32((uint8_t*)&data);
+		for (j = addr & 3; (j < 4) && (i < count); j++, i++) 
+		{
+			data &= ~(0xff << j*8);
+			data |= (buffer[i] << j*8);
+		}
+
+		h_u32_to_be((uint8_t*)&data_out, data);
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+
+	/* write all complete words */
+	for (; i < (count & ~3); i+=4)
+	{
+		data = 0;
+
+		for (j = 0; j < 4; j++)
+			data |= (buffer[j+i] << j*8);
+
+		h_u32_to_be((uint8_t*)&data_out, data);
+
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	/*
+	 * Write trailing bytes
+	 */
+	if (i < count) {
+		retval = avr32_jtag_mwa_read(jtag_info, SLAVE_HSB_UNCACHED,
+				addr + i, &data);
+
+		if (retval != ERROR_OK)
+			return retval;
+
+		data = be_to_h_u32((uint8_t*)&data);
+		for (j = 0; i < count; j++, i++)
+		{
+			data &= ~(0xff << j*8);
+			data |= (buffer[j+i] << j*8);
+		}
+
+		h_u32_to_be((uint8_t*)&data_out, data);
+
+		retval = avr32_jtag_mwa_write(jtag_info, SLAVE_HSB_UNCACHED,
+				addr+i, data_out);
+
+		if (retval != ERROR_OK)
+			return retval;
+	}
+
+	return ERROR_OK;
+}

src/target/avr32_mem.h

@@ -0,0 +1,37 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifndef AVR32_MEM
+#define AVR32_MEM
+
+int avr32_jtag_read_memory32(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint32_t *buffer);
+int avr32_jtag_read_memory16(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint16_t *buffer);
+int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint8_t *buffer);
+
+int avr32_jtag_write_memory32(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint32_t *buffer);
+int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint16_t *buffer);
+int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info, 
+		uint32_t addr, int count, uint8_t *buffer);
+
+#endif /* AVR32_MEM */
+

src/target/avr32_regs.c

@@ -0,0 +1,112 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "target.h"
+#include "jtag/jtag.h"
+#include "avr32_jtag.h"
+#include "avr32_regs.h"
+
+static int avr32_jtag_read_reg(struct avr32_jtag *jtag_info, int reg, 
+		uint32_t *val)
+{
+	int retval;
+	uint32_t dcsr;
+
+	retval = avr32_jtag_exec(jtag_info, MTDR(AVR32_OCDREG_DCCPU, reg));
+	if (retval != ERROR_OK)
+		return retval;
+
+	do {
+		retval = avr32_jtag_nexus_read(jtag_info, 
+			AVR32_OCDREG_DCSR, &dcsr);
+
+		if (retval != ERROR_OK)
+			return retval;
+	} while (!(dcsr & OCDREG_DCSR_CPUD));
+
+	retval = avr32_jtag_nexus_read(jtag_info, 
+			AVR32_OCDREG_DCCPU, val);
+
+	return retval;
+}
+
+static int avr32_jtag_write_reg(struct avr32_jtag *jtag_info, int reg, 
+		uint32_t val)
+{
+	int retval;
+	uint32_t dcsr;
+
+	/* Restore Status reg */
+	retval = avr32_jtag_nexus_write(jtag_info, 
+				AVR32_OCDREG_DCEMU, val);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = avr32_jtag_exec(jtag_info, MFDR(reg, AVR32_OCDREG_DCEMU));
+	if (retval != ERROR_OK)
+		return retval;
+	do {
+		retval = avr32_jtag_nexus_read(jtag_info, 
+			AVR32_OCDREG_DCSR, &dcsr);
+	} while (!(dcsr & OCDREG_DCSR_EMUD) && (retval == ERROR_OK));
+
+	return retval;
+}
+
+
+
+int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
+{
+	int i, retval;
+
+	/* read core registers */
+	for (i = 0; i < AVR32NUMCOREREGS - 1; i++) 
+		avr32_jtag_read_reg(jtag_info, i, regs + i);
+
+	/* read status register */
+	retval = avr32_jtag_exec(jtag_info, MFSR(0, 0));
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = avr32_jtag_read_reg(jtag_info, 0, regs + AVR32_REG_SR);
+
+	return retval;
+}
+
+int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
+{
+	int i, retval;
+
+	retval = avr32_jtag_write_reg(jtag_info, 0, regs[AVR32_REG_SR]);
+	/* Restore Status reg */
+	retval = avr32_jtag_exec(jtag_info, MTSR(0, 0));
+	if (retval != ERROR_OK)
+		return retval;
+
+	/*
+	 * And now the rest of registers
+	 */
+	for (i = 0; i < AVR32NUMCOREREGS - 1; i++) 
+		avr32_jtag_write_reg(jtag_info, i, regs[i]);
+
+	return ERROR_OK;
+}

src/target/avr32_regs.h

@@ -0,0 +1,46 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com>       *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ ***************************************************************************/
+#ifndef AVR32_REGS
+#define AVR32_REGS
+
+enum avr32_reg_nums {
+	AVR32_REG_R0 = 0,
+	AVR32_REG_R1,
+	AVR32_REG_R2,
+	AVR32_REG_R3,
+	AVR32_REG_R4,
+	AVR32_REG_R5,
+	AVR32_REG_R6,
+	AVR32_REG_R7,
+	AVR32_REG_R8,
+	AVR32_REG_R9,
+	AVR32_REG_R10,
+	AVR32_REG_R11,
+	AVR32_REG_R12,
+	AVR32_REG_SP,
+	AVR32_REG_LR,
+	AVR32_REG_PC,
+	AVR32_REG_SR,
+};
+
+int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs);
+int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs);
+
+#endif /* AVR32_REGS */
+

src/target/target.c

@@ -70,6 +70,7 @@ extern struct target_type mips_m4k_target;
 extern struct target_type avr_target;
 extern struct target_type dsp563xx_target;
 extern struct target_type testee_target;
+extern struct target_type avr32_ap7k_target;
 
 static struct target_type *target_types[] =
 {
@@ -90,6 +91,7 @@ static struct target_type *target_types[] =
 	&avr_target,
 	&dsp563xx_target,
 	&testee_target,
+	&avr32_ap7k_target,
 	NULL,
 };