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at91cap7a-stk-sdram.cfg: faster reset

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crank up JTAG speed as soon as clocks are set up.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This commit is contained in:
Øyvind Harboe
2010-08-12 15:01:23 +02:00
parent 07e0bd4685
commit a72faf6405
1 changed files with 5 additions and 5 deletions
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10
tcl/board/at91cap7a-stk-sdram.cfg
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@@ -28,7 +28,7 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
$_TARGETNAME configure -event reset-start {
# start off real slow when we're running off internal RC oscillator
jtag_khz 10
jtag_khz 32
}
proc peek32 {address} {
@@ -76,6 +76,10 @@ $_TARGETNAME configure -event reset-init {
wait_state {expr {([peek32 0xFFFFFC68] & 0x8) == 0}}
echo "Master clock ok."
# Now that we're up and running, crank up speed!
global post_reset_khz ; jtag_khz $post_reset_khz
echo "Configuring the SDRAM controller..."
# Configure EBI Chip select for SDRAM
@@ -149,10 +153,6 @@ $_TARGETNAME configure -event reset-init {
mww 0xffffef00 0x3
echo "SDRAM configuration ok."
# Now that we're up and running, crank up speed!
global post_reset_khz
jtag_khz $post_reset_khz
}
$_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0