- disabled excessive debug output in jtag.h

- output all of EmbeddedICE version register in error message
- update OpenOCD's idea of the current core mode, and immediately change core mode, on CPSR changes
- added support for CFI cmdset 0002 (patch by Andrew Dyer, thanks a lot)
- enhanced CFI cmdset 0002 support to Atmel AT49 flashes (thanks to Joerg Krein for providing test hardware)


git-svn-id: svn://svn.berlios.de/openocd/trunk@138 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/flash/cfi.h

@@ -28,6 +28,11 @@ typedef struct cfi_flash_bank_s
 	struct target_s *target;
 	working_area_t *write_algorithm;
 	working_area_t *erase_check_algorithm;
+	
+	int x16_as_x8;
+	
+	u16 manufacturer;
+	u16 device_id;
 		
 	char qry[3];
 	
@@ -83,4 +88,55 @@ typedef struct cfi_intel_pri_ext_s
 	u8 extra[0];
 } cfi_intel_pri_ext_t;
 
+/* Spansion primary extended query table as defined for and used by
+ * the linux kernel cfi driver (as of 2.6.15)
+ */
+typedef struct cfi_spansion_pri_ext_s
+{
+	u8  pri[3];
+	u8  major_version;
+	u8  minor_version;
+	u8  SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
+	u8  EraseSuspend;
+	u8  BlkProt;
+	u8  TmpBlkUnprotect;
+	u8  BlkProtUnprot;
+	u8  SimultaneousOps;
+	u8  BurstMode;
+	u8  PageMode;
+	u8  VppMin;
+	u8  VppMax;
+	u8  TopBottom;
+	int _reversed_geometry;
+} cfi_spansion_pri_ext_t;
+
+/* Atmel primary extended query table as defined for and used by
+ * the linux kernel cfi driver (as of 2.6.20+)
+ */
+typedef struct cfi_atmel_pri_ext_s
+{
+	u8 pri[3];
+	u8 major_version;
+	u8 minor_version;
+	u8 features;
+	u8 bottom_boot;
+	u8 burst_mode;
+	u8 page_mode;
+} cfi_atmel_pri_ext_t;
+
+typedef struct cfi_fixup_s
+{
+	u16 mfr;
+	u16 id;
+	void (*fixup)(flash_bank_t *flash, void *param);
+	void *param;
+} cfi_fixup_t;
+
+#define CFI_MFR_AMD		0x0001
+#define CFI_MFR_ATMEL	0x001F
+#define CFI_MFR_ST		0x0020	/* STMicroelectronics */
+
+#define CFI_MFR_ANY		0xffff
+#define CFI_ID_ANY		0xffff
+
 #endif /* CFI_H */

src/jtag/jtag.h

@@ -25,7 +25,7 @@
 
 #include "command.h"
 
-#if 1
+#if 0
 #define _DEBUG_JTAG_IO_
 #endif
 

src/openocd.c

@@ -18,7 +18,7 @@
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
-#define OPENOCD_VERSION "Open On-Chip Debugger (2007-03-30 12:00 CEST)"
+#define OPENOCD_VERSION "Open On-Chip Debugger (2007-04-11 16:20 CEST)"
 
 #ifdef HAVE_CONFIG_H
 #include "config.h"

src/target/armv4_5.c

@@ -257,6 +257,13 @@ int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
 				armv4_5_target->core_state = ARMV4_5_STATE_ARM;	
 			}
 		}
+		
+		if (armv4_5_target->core_mode != (value & 0x1f))
+		{
+			DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
+			armv4_5_target->core_mode = value & 0x1f;
+			armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
+		}
 	}
 	
 	buf_set_u32(reg->value, 0, 32, value);

src/target/embeddedice.c

@@ -178,7 +178,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7
 			arm7_9->has_monitor_mode = 1;
 			break;
 		default:
-			ERROR("unknown EmbeddedICE version (comms ctrl: 0x%4.4x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
+			ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
 	}
 	
 	return reg_cache;