update 'flash bank' usage in scripts

Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the
first argument to 'flash bank'.
This commit is contained in:
Zachary T Welch
2009-11-18 02:15:52 -08:00
parent fd654c8a3e
commit 2dfa5e9c84
58 changed files with 138 additions and 69 deletions

View File

@@ -10,4 +10,5 @@ reset_config trst_and_srst separate
# flash bank <driver> <base> <size> <chip_width> <bus_width>
# 29LV650 64Mbit Flash
flash bank cfi 0x00000000 0x800000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 0

View File

@@ -9,4 +9,5 @@ jtag_nsrst_delay 800
reset_config trst_and_srst separate
# works for P30 flash
flash bank cfi 0x00000000 0x2000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME

View File

@@ -4,7 +4,8 @@
source [find target/at91rm9200.cfg]
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
flash bank cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
# ETM9 trace port connector present on this board, 16 data pins.
if { [info exists ETM_DRIVER] } {

View File

@@ -122,4 +122,5 @@ $_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x1000 -work-a
#M29DW323DB - not working
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x50000000 0x0400000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x50000000 0x0400000 2 2 0

View File

@@ -33,4 +33,5 @@ $_TARGETNAME configure -event reset-init {
#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width> [driver_options ...]
flash bank cfi 0x00000000 0x1000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x1000000 2 2 0

View File

@@ -28,7 +28,8 @@ $_TARGETNAME configure -event reset-start {
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
flash bank cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x5C000000 0x400000 2 2 $_TARGETNAME jedec_probe
$_TARGETNAME configure -event reset-init {

View File

@@ -68,5 +68,7 @@ $_TARGETNAME configure -event reset-init {
$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0

View File

@@ -12,8 +12,10 @@ jtag_ntrst_delay 250
# CS0, CS1 -- two banks of CFI flash, 32 MBytes each
# each bank is 32-bits wide, two 16-bit chips in parallel
flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
flash bank cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 4 $_TARGETNAME
# CS2 low -- FPGA registers
# CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch

View File

@@ -8,5 +8,7 @@ reset_config trst_and_srst separate
# Board configs can vary a *LOT* ... parts, jumpers, etc.
# This GP board boots from cs0 using NOR (2x32M), and also
# has 64M NAND on cs6.
flash bank cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
flash bank cfi 0x06000000 0x02000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x04000000 0x02000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x06000000 0x02000000 2 2 $_TARGETNAME

View File

@@ -19,8 +19,10 @@ etm_dummy config $_TARGETNAME
# standard boards populate two 16 MB chips, but manufacturing
# options or an expansion board could change this config.
flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
proc osk5912_init {} {
omap5912_reset

View File

@@ -13,7 +13,8 @@ source [find target/pxa255.cfg]
$_TARGETNAME configure -work-area-phys 0x4000000 -work-area-size 0x4000 -work-area-backup 0
# flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
flash bank cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x00000000 0x80000 2 2 $_TARGETNAME jedec_probe
proc pxa255_sst_init {} {
xscale cp15 15 0x00002001 #Enable CP0 and CP13 access

View File

@@ -54,8 +54,10 @@ $_TARGETNAME configure -event reset-init {
}
#flash bank str9x <base> <size> 0 0 <target#> <variant>
flash bank str9x 0x00000000 0x00080000 0 0 0
flash bank str9x 0x00080000 0x00008000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 0
# For more information about the configuration files, take a look at:
# openocd.texi

View File

@@ -54,7 +54,8 @@ proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
# boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus
# it's really 16MB but the upper 8mb is controller via gpio
# openocd does not support 'complex reads/writes' to NOR
flash bank cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
# writing data to memory does not work without this
memwrite burst disable

View File

@@ -115,4 +115,5 @@ arm7_9 dcc_downloads enable # Enable faster DCC downloads
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x20000000 0x2000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x2000000 2 2 0

View File

@@ -121,5 +121,6 @@ arm7_9 dcc_downloads enable # Enable faster DCC downloads
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x20000000 0x1000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x20000000 0x1000000 2 2 0

View File

@@ -91,6 +91,7 @@ $_TARGETNAME configure -event reset-init {
#####################
#flash bank cfi <base> <size> <chip width> <bus width> <target#>
flash bank cfi 0x10000000 0x01000000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 0

View File

@@ -8,7 +8,8 @@ $_TARGETNAME configure -event reset-init { x300t_init }
# 1MB CFI capable flash
# flash bank <driver> <base> <size> <chip_width> <bus_width>
flash bank cfi 0xac000000 0x100000 2 2 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 0
proc x300t_init { } {
# Setup SDRAM config and flash mapping

View File

@@ -38,7 +38,8 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
flash bank ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91eb40a.elf
$_TARGETNAME configure -event reset-init {
# Set up chip selects & timings
mww 0xFFE00000 0x0100273D

View File

@@ -35,7 +35,8 @@ $_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
## flash configuration
# only target number is needed
flash bank aduc702x 0 0 0 0 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME aduc702x 0 0 0 0 0
## If you use the watchdog, the following code makes sure that the board
## doesn't reboot when halted via JTAG. Yes, on the older generation

View File

@@ -42,7 +42,8 @@ arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
#flash driver
flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
# required for usable performance. Used for lots of
# other things than flash programming.

Some files were not shown because too many files have changed in this diff Show More