types: write memory now uses const

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

src/jtag/minidummy/minidummy.c

@@ -154,7 +154,7 @@ int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state
 	return ERROR_OK;
 }
 
-void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, int little, int count)
 {
 	int i;
 	for (i = 0; i < count; i++)

src/jtag/zy1000/zy1000.c

@@ -853,7 +853,7 @@ static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
 			TAP_IDLE);
 */
 
-void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, int little, int count)
 {
 #if 0
 	int i;
@@ -895,7 +895,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
 
 
 
-int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
+int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, const uint32_t * data, size_t count)
 {
 	/* bypass bits before and after */
 	int pre_bits;
@@ -905,7 +905,7 @@ int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opc
 
 	if ((pre_bits > 32) || (post_bits > 32))
 	{
-		int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
+		int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, const uint32_t *, size_t);
 		return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
 	} else
 	{

src/svf/svf.c

@@ -219,7 +219,7 @@ static size_t svf_command_buffer_size = 0;
 static int svf_line_number = 1;
 static int svf_getline (char **lineptr, size_t *n, FILE *stream);
 
-#define SVF_MAX_BUFFER_SIZE_TO_COMMIT	(4 * 1024)
+#define SVF_MAX_BUFFER_SIZE_TO_COMMIT	(1024 * 1024)
 static uint8_t *svf_tdi_buffer = NULL, *svf_tdo_buffer = NULL, *svf_mask_buffer = NULL;
 static int svf_buffer_index = 0, svf_buffer_size = 0;
 static int svf_quiet = 0;

src/target/arm11.c

@@ -925,7 +925,7 @@ static int arm11_read_memory(struct target *target, uint32_t address, uint32_t s
 */
 static int arm11_write_memory_inner(struct target *target,
 		uint32_t address, uint32_t size,
-		uint32_t count, uint8_t *buffer,
+		uint32_t count, const uint8_t *buffer,
 		bool no_increment)
 {
 	int retval;
@@ -1072,7 +1072,7 @@ static int arm11_write_memory_inner(struct target *target,
 
 static int arm11_write_memory(struct target *target,
 		uint32_t address, uint32_t size,
-		uint32_t count, uint8_t *buffer)
+		uint32_t count, const uint8_t *buffer)
 {
 	/* pointer increment matters only for multi-unit writes ...
 	 * not e.g. to a "reset the chip" controller.
@@ -1083,7 +1083,7 @@ static int arm11_write_memory(struct target *target,
 
 /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
 static int arm11_bulk_write_memory(struct target *target,
-		uint32_t address, uint32_t count, uint8_t *buffer)
+		uint32_t address, uint32_t count, const uint8_t *buffer)
 {
 	if (target->state != TARGET_HALTED)
 	{

src/target/arm720t.c

@@ -330,7 +330,7 @@ static int arm720t_read_phys_memory(struct target *target,
 }
 
 static int arm720t_write_phys_memory(struct target *target,
-		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+		uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	struct arm720t_common *arm720t = target_to_arm720(target);
 

src/target/arm7_9_common.c

@@ -2431,7 +2431,7 @@ int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, u
 	return ERROR_OK;
 }
 
-int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm *armv4_5 = &arm7_9->armv4_5_common;
@@ -2655,7 +2655,7 @@ int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size,
 }
 
 static int dcc_count;
-static uint8_t *dcc_buffer;
+static const uint8_t *dcc_buffer;
 
 static int arm7_9_dcc_completion(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
@@ -2667,7 +2667,7 @@ static int arm7_9_dcc_completion(struct target *target, uint32_t exit_point, int
 
 	int little = target->endianness == TARGET_LITTLE_ENDIAN;
 	int count = dcc_count;
-	uint8_t *buffer = dcc_buffer;
+	const uint8_t *buffer = dcc_buffer;
 	if (count > 2)
 	{
 		/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
@@ -2720,7 +2720,7 @@ static const uint32_t dcc_code[] =
 	0xeafffff9	/*    b   w                   */
 };
 
-int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
+int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, const uint8_t *buffer)
 {
 	int retval;
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);

src/target/arm7_9_common.h

@@ -134,8 +134,8 @@ int arm7_9_halt(struct target *target);
 int arm7_9_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
 int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints);
 int arm7_9_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer);
+int arm7_9_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
+int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, const uint8_t *buffer);
 
 int arm7_9_run_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_prams, struct reg_param *reg_param, uint32_t entry_point, void *arch_info);
 

src/target/arm920t.c

@@ -602,7 +602,7 @@ static int arm920t_read_phys_memory(struct target *target,
 
 static int arm920t_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
-		uint32_t count, uint8_t *buffer)
+		uint32_t count, const uint8_t *buffer)
 {
 	struct arm920t_common *arm920t = target_to_arm920(target);
 
@@ -613,7 +613,7 @@ static int arm920t_write_phys_memory(struct target *target,
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
 int arm920t_write_memory(struct target *target, uint32_t address,
-		uint32_t size, uint32_t count, uint8_t *buffer)
+		uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	int retval;
 	const uint32_t cache_mask = ~0x1f; /* cache line size : 32 byte */

src/target/arm920t.h

@@ -63,7 +63,7 @@ int arm920t_soft_reset_halt(struct target *target);
 int arm920t_read_memory(struct target *target,
 	uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 int arm920t_write_memory(struct target *target,
-	uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 int arm920t_post_debug_entry(struct target *target);
 void arm920t_pre_restore_context(struct target *target);
 int arm920t_get_ttb(struct target *target, uint32_t *result);

src/target/arm926ejs.c

@@ -626,7 +626,7 @@ int arm926ejs_soft_reset_halt(struct target *target)
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
 int arm926ejs_write_memory(struct target *target, uint32_t address,
-		uint32_t size, uint32_t count, uint8_t *buffer)
+		uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	int retval;
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
@@ -693,7 +693,7 @@ int arm926ejs_write_memory(struct target *target, uint32_t address,
 
 static int arm926ejs_write_phys_memory(struct target *target,
 		uint32_t address, uint32_t size,
-		uint32_t count, uint8_t *buffer)
+		uint32_t count, const uint8_t *buffer)
 {
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 

src/target/arm926ejs.h

@@ -50,7 +50,7 @@ int arm926ejs_init_arch_info(struct target *target,
 		struct arm926ejs_common *arm926ejs, struct jtag_tap *tap);
 int arm926ejs_arch_state(struct target *target);
 int arm926ejs_write_memory(struct target *target,
-		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+		uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 int arm926ejs_soft_reset_halt(struct target *target);
 
 extern const struct command_registration arm926ejs_command_handlers[];

src/target/arm946e.c

@@ -512,7 +512,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
 int arm946e_write_memory(struct target *target, uint32_t address,
-		uint32_t size, uint32_t count, uint8_t *buffer)
+		uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	int retval;
 

src/target/arm_adi_v5.c

@@ -270,11 +270,11 @@ int mem_ap_write_atomic_u32(struct adiv5_dap *dap, uint32_t address,
 * Write a buffer in target order (little endian)                             *
 *                                                                            *
 *****************************************************************************/
-int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
 {
 	int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
 	uint32_t adr = address;
-	uint8_t* pBuffer = buffer;
+	const uint8_t* pBuffer = buffer;
 
 	count >>= 2;
 	wcount = count;
@@ -343,7 +343,7 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint
 }
 
 static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap,
-		uint8_t *buffer, int count, uint32_t address)
+		const uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 	int wcount, blocksize, writecount, i;
@@ -424,7 +424,7 @@ static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap,
 	return retval;
 }
 
-int mem_ap_write_buf_u16(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u16(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 
@@ -456,7 +456,7 @@ int mem_ap_write_buf_u16(struct adiv5_dap *dap, uint8_t *buffer, int count, uint
 }
 
 static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap,
-		uint8_t *buffer, int count, uint32_t address)
+		const uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 	int wcount, blocksize, writecount, i;
@@ -532,7 +532,7 @@ static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap,
 	return retval;
 }
 
-int mem_ap_write_buf_u8(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u8(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 
@@ -935,21 +935,21 @@ int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
 }
 
 int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address)
+		const uint8_t *buffer, int count, uint32_t address)
 {
 	dap_ap_select(swjdp, ap);
 	return mem_ap_write_buf_u8(swjdp, buffer, count, address);
 }
 
 int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address)
+		const uint8_t *buffer, int count, uint32_t address)
 {
 	dap_ap_select(swjdp, ap);
 	return mem_ap_write_buf_u16(swjdp, buffer, count, address);
 }
 
 int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address)
+		const uint8_t *buffer, int count, uint32_t address)
 {
 	dap_ap_select(swjdp, ap);
 	return mem_ap_write_buf_u32(swjdp, buffer, count, address);

src/target/arm_adi_v5.h

@@ -376,11 +376,11 @@ int mem_ap_read_buf_u32(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
 
 int mem_ap_write_buf_u8(struct adiv5_dap *swjdp,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 int mem_ap_write_buf_u16(struct adiv5_dap *swjdp,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 
 
 
@@ -405,11 +405,11 @@ int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
 		uint8_t *buffer, int count, uint32_t address);
 
 int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
-		uint8_t *buffer, int count, uint32_t address);
+		const uint8_t *buffer, int count, uint32_t address);
 
 
 

src/target/armv4_5_mmu.c

@@ -149,7 +149,7 @@ int armv4_5_mmu_read_physical(struct target *target, struct armv4_5_mmu_common *
 	return retval;
 }
 
-int armv4_5_mmu_write_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+int armv4_5_mmu_write_physical(struct target *target, struct armv4_5_mmu_common *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	int retval;
 

src/target/armv4_5_mmu.h

@@ -28,7 +28,7 @@ struct armv4_5_mmu_common
 {
 	int (*get_ttb)(struct target *target, uint32_t *result);
 	int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-	int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+	int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 	int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
 	int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
 	struct armv4_5_cache_common armv4_5_cache;
@@ -46,7 +46,7 @@ int armv4_5_mmu_read_physical(struct target *target,
 
 int armv4_5_mmu_write_physical(struct target *target,
 		struct armv4_5_mmu_common *armv4_5_mmu,
-		uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+		uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
 
 enum
 {

src/target/avr32_ap7k.c

@@ -515,7 +515,7 @@ static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
 }
 
 static int avr32_ap7k_write_memory(struct target *target, uint32_t address,
-		uint32_t size, uint32_t count, uint8_t *buffer)
+		uint32_t size, uint32_t count, const uint8_t *buffer)
 {
 	struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
 
@@ -600,7 +600,7 @@ static int avr32_ap7k_examine(struct target *target)
 }
 
 static int avr32_ap7k_bulk_write_memory(struct target *target, uint32_t address,
-		uint32_t count, uint8_t *buffer)
+		uint32_t count, const uint8_t *buffer)
 {
 	LOG_ERROR("%s: implement me", __func__);
 

src/target/avr32_mem.c

@@ -152,7 +152,7 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info,
 }
 
 int avr32_jtag_write_memory32(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint32_t *buffer)
+		uint32_t addr, int count, const uint32_t *buffer)
 {
 	int i, retval;
 	uint32_t data;
@@ -173,7 +173,7 @@ int avr32_jtag_write_memory32(struct avr32_jtag *jtag_info,
 }
 
 int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint16_t *buffer)
+		uint32_t addr, int count, const uint16_t *buffer)
 {
 	int i, retval;
 	uint32_t data;
@@ -248,7 +248,7 @@ int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info,
 }
 
 int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint8_t *buffer)
+		uint32_t addr, int count, const uint8_t *buffer)
 {
 	int i, j, retval;
 	uint32_t data;

src/target/avr32_mem.h

@@ -27,11 +27,11 @@ int avr32_jtag_read_memory8(struct avr32_jtag *jtag_info,
 		uint32_t addr, int count, uint8_t *buffer);
 
 int avr32_jtag_write_memory32(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint32_t *buffer);
+		uint32_t addr, int count, const uint32_t *buffer);
 int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint16_t *buffer);
+		uint32_t addr, int count, const uint16_t *buffer);
 int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info, 
-		uint32_t addr, int count, uint8_t *buffer);
+		uint32_t addr, int count, const uint8_t *buffer);
 
 #endif /* AVR32_MEM */
 

src/target/cortex_a.c

@@ -1587,7 +1587,7 @@ static int cortex_a8_read_memory(struct target *target, uint32_t address,
 
 static int cortex_a8_write_phys_memory(struct target *target,
                 uint32_t address, uint32_t size,
-                uint32_t count, uint8_t *buffer)
+                uint32_t count, const uint8_t *buffer)
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct adiv5_dap *swjdp = &armv7a->dap;
@@ -1748,7 +1748,7 @@ static int cortex_a8_write_phys_memory(struct target *target,
 }
 
 static int cortex_a8_write_memory(struct target *target, uint32_t address,
-                uint32_t size, uint32_t count, uint8_t *buffer)
+                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
         int enabled = 0;
         uint32_t virt, phys;
@@ -1774,7 +1774,7 @@ static int cortex_a8_write_memory(struct target *target, uint32_t address,
 }
 
 static int cortex_a8_bulk_write_memory(struct target *target, uint32_t address,
-		uint32_t count, uint8_t *buffer)
+		uint32_t count, const uint8_t *buffer)
 {
 	return cortex_a8_write_memory(target, address, 4, count, buffer);
 }