Gaghik KhachatrianandAlex Deucher ec3e3976f6 drm/amd/display: Update MCIF_ADDR macro to address IGT DWB regression ...

[Why]
A previous warning-fix commit updated type casts in the DCN3
mmhubbub code but missed updating the MCIF_ADDR macro to the
correct, fully parenthesized and casted version. This caused
a regression during DWB tests, where address values could be
misinterpreted, potentially leading to incorrect hardware
programming.

[How]
Updated the MCIF_ADDR macro in dcn30_mmhubbub.c to use the
proper parenthesization and type casting, ensuring correct
address handling. Removed redundant casts from REG_UPDATE
calls for improved clarity and consistency with current
coding standards.

Fixes: f4cdbb5d54 ("drm/amd/display: Fix implicit narrowing conversion warnings")
Reviewed-by: Clayton King <clayton.king@amd.com>
Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 4f251a5e9f)

2026-04-28 15:45:28 -04:00

..

dcn30_afmt.c

…

dcn30_afmt.h

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dcn30_cm_common.c

drm/amd/display: Fix Silence signed/unsighed mismatch warning in dc

2026-03-30 14:55:17 -04:00

dcn30_mmhubbub.c

drm/amd/display: Update MCIF_ADDR macro to address IGT DWB regression

2026-04-28 15:45:28 -04:00

dcn30_mmhubbub.h

…

dcn30_opp.h

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dcn30_vpg.c

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dcn30_vpg.h

…

Makefile

drm/amd/display: Refactoring HPO

2024-07-23 17:35:45 -04:00