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MIPS: perf: Add hardware perf events support for new Loongson-3

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New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs.
Loongson-3 processors have three types of PMU types (so there are three
event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1,
Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Huacai Chen
2020-04-30 16:33:24 +02:00
committed by Thomas Bogendoerfer
parent 44220fd84f
commit e9dfbaaeef
2 changed files with 342 additions and 34 deletions
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arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h
+1
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@@ -48,5 +48,6 @@
#define cpu_hwrena_impl_bits 0xc0000000
#define cpu_has_mac2008_only 1
#define cpu_has_mips_r2_exec_hazard 0
#define cpu_has_perf_cntr_intr_bit 0
#endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */
arch/mips/kernel/perf_event_mipsxx.c
+341 -34
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