Merge tag 'gpio-updates-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "We have two new drivers, some improvements to the core code, lots of
  different updates to existing GPIO drivers and some dt-bindings on
  top.

  There's nothing controversial in here and almost everything has been
  in next for more than a week (95% a lot longer than this). The only
  thing that has spent less time in next is a new driver so no risk of
  regressions.

  The single merge pulls in changes that remove all usage of global GPIO
  numbers from arch/arm/mach-omap.

  Core GPIO library:
   - remove unused symbols
   - don't spam the kernel log with messages about hogs
   - remove old sysfs API cruft
   - improve handling of GPIO masks

  New drivers:
   - add a driver for the BlueField-3 GPIO controller
   - add GPIO support for the TPS65219 PMIC

  Driver improvements:
   - extend the gpio-aggregator driver to support ramp-up/ramp-down
     delay
   - remove unnecessary CONFIG_OF guards from gpio-aggregator
   - readability improvements in gpio-tangier
   - switch i2c drivers back to using probe() now that it's been
     converted in the i2c subsystem to not taking the id parameter
   - remove unused inclusions of of_gpio.h in several drivers
   - make pm ops static in gpio-davinci and fix a comment
   - use more devres in drivers to shrink and simplify the code
   - add missing include in gpio-sa1100
   - add HAS_IOPORT KConfig dependency where needed
   - add permissions checks before accessing pins in gpio-tegra186
   - convert the gpio-zynq driver to using immutable irqchips
   - preserve output settings set by the bootloader in gpio-mpc8xxx

  Selftests:
   - tweak the variable naming in script tests

  Device tree updates:
   - convert gpio-mmio and gpio-stmpe to YAML
   - add parsing of GPIO hogs to gpio-vf610
   - add bindings for the Cirrus EP93xx GPIO controller
   - add gpio-line-names property to the gpio-pca9570 bindings
   - extend the binding for x-powers,axp209 with another block"

* tag 'gpio-updates-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (58 commits)
  of: unittest: drop assertions for GPIO hog messages
  gpiolib: Drop unused domain_ops memeber of GPIO IRQ chip
  gpio: synq: remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres
  dt-bindings: gpio: gpio-vf610: Add parsing of hogs
  gpio: lpc18xx: Remove unused of_gpio.h inclusion
  gpio: xra1403: Remove unused of_gpio.h inclusion
  gpio: mpc8xxx: Remove unused of_gpio.h inclusion
  dt-bindings: gpio: Add Cirrus EP93xx
  gpio: mpc8xxx: latch GPIOs state on module load when configured as output
  selftests: gpio: gpio-sim: Use same variable name for sysfs pathname
  gpio: mlxbf3: Add gpio driver support
  gpio: delay: Remove duplicative functionality
  gpio: aggregator: Set up a parser of delay line parameters
  gpio: aggregator: Support delay for setting up individual GPIOs
  gpio: aggregator: Remove CONFIG_OF and of_match_ptr() protections
  dt-bindings: gpio: pca9570: add gpio-line-names property
  gpiolib: remove unused gpio_cansleep()
  gpio: tps65219: add GPIO support for TPS65219 PMIC
  gpio: zynq: fix zynqmp_gpio not an immutable chip warning
  gpio: davinci: make davinci_gpio_dev_pm_ops static
  ...
This commit is contained in:
Linus Torvalds
2023-06-29 10:11:10 -07:00
89 changed files with 1798 additions and 988 deletions
@@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml#
$id: http://devicetree.org/schemas/gpio/brcm,bcm63xx-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM6345 GPIO controller
title: Broadcom BCM63xx GPIO controller
maintainers:
- Álvaro Fernández Rojas <noltari@gmail.com>
@@ -18,8 +18,6 @@ description: |+
BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
and/or written, and the direction changed from input to output.
BCM6345 have 16-bit data and dirout registers, where GPIO state can be read
and/or written, and the direction changed from input to output.
BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data
and dirout registers, where GPIO state can be read and/or written, and the
direction changed from input to output.
@@ -29,7 +27,6 @@ properties:
enum:
- brcm,bcm6318-gpio
- brcm,bcm6328-gpio
- brcm,bcm6345-gpio
- brcm,bcm6358-gpio
- brcm,bcm6362-gpio
- brcm,bcm6368-gpio
@@ -63,17 +60,6 @@ required:
additionalProperties: false
examples:
- |
gpio@fffe0406 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
reg = <0xfffe0406 2>, <0xfffe040a 2>;
native-endian;
gpio-controller;
#gpio-cells = <2>;
};
- |
gpio@0 {
compatible = "brcm,bcm63268-gpio";
@@ -0,0 +1,79 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/gpio-delay.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GPIO delay controller
maintainers:
- Alexander Stein <linux@ew.tq-group.com>
description: |
This binding describes an electrical setup where setting an GPIO output
is delayed by some external setup, e.g. RC circuit.
+----------+ +-----------+
| | VCC_B | |
| | | | |
| | VCC_A _ | |
| GPIO | | | R | Consumer |
|controller| ___ |_| | |
| | | | | | |
| [IOx|-------| |--+-----|-----+ |
| | |___| | | input |
| | | | |
+----------+ --- C +-----------+
---
|
-
GND
If the input on the consumer is controlled by an open-drain signal
attached to an RC circuit the ramp-up delay is not under control
of the GPIO controller.
properties:
compatible:
const: gpio-delay
"#gpio-cells":
description: |
Specifies the pin, ramp-up and ramp-down delays. The
delays are specified in microseconds.
const: 3
gpios:
description: Array of GPIOs which output signal change is delayed
minItems: 1
maxItems: 32
gpio-controller: true
gpio-line-names:
minItems: 1
maxItems: 32
required:
- compatible
- "#gpio-cells"
- gpio-controller
- gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
enable_delay: enable-delay {
compatible = "gpio-delay";
#gpio-cells = <3>;
gpio-controller;
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>,
<&gpio3 1 GPIO_ACTIVE_HIGH>;
};
consumer {
enable-gpios = <&enable_delay 0 130000 30000>;
};
@@ -0,0 +1,154 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: EP93xx GPIO controller
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
- Bartosz Golaszewski <brgl@bgdev.pl>
- Nikita Shubin <nikita.shubin@maquefel.me>
properties:
compatible:
oneOf:
- const: cirrus,ep9301-gpio
- items:
- enum:
- cirrus,ep9302-gpio
- cirrus,ep9307-gpio
- cirrus,ep9312-gpio
- cirrus,ep9315-gpio
- const: cirrus,ep9301-gpio
reg:
minItems: 2
items:
- description: data register
- description: direction register
- description: interrupt registers base
reg-names:
minItems: 2
items:
- const: data
- const: dir
- const: intr
gpio-controller: true
gpio-ranges: true
"#gpio-cells":
const: 2
interrupt-controller: true
"#interrupt-cells":
const: 2
interrupts:
oneOf:
- maxItems: 1
- description: port F has dedicated irq line for each gpio line
maxItems: 8
required:
- compatible
- reg
- gpio-controller
- "#gpio-cells"
additionalProperties: false
examples:
- |
gpio@80840000 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840000 0x04>,
<0x80840010 0x04>,
<0x80840090 0x1c>;
reg-names = "data", "dir", "intr";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&vic1>;
interrupts = <27>;
};
gpio@80840004 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840004 0x04>,
<0x80840014 0x04>,
<0x808400ac 0x1c>;
reg-names = "data", "dir", "intr";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&vic1>;
interrupts = <27>;
};
gpio@80840008 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840008 0x04>,
<0x80840018 0x04>;
reg-names = "data", "dir";
gpio-controller;
#gpio-cells = <2>;
};
gpio@8084000c {
compatible = "cirrus,ep9301-gpio";
reg = <0x8084000c 0x04>,
<0x8084001c 0x04>;
reg-names = "data", "dir";
gpio-controller;
#gpio-cells = <2>;
};
gpio@80840020 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840020 0x04>,
<0x80840024 0x04>;
reg-names = "data", "dir";
gpio-controller;
#gpio-cells = <2>;
};
gpio@80840030 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840030 0x04>,
<0x80840034 0x04>,
<0x8084004c 0x1c>;
reg-names = "data", "dir", "intr";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupts-extended = <&vic0 19>, <&vic0 20>,
<&vic0 21>, <&vic0 22>,
<&vic1 15>, <&vic1 16>,
<&vic1 17>, <&vic1 18>;
};
gpio@80840038 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840038 0x04>,
<0x8084003c 0x04>;
reg-names = "data", "dir";
gpio-controller;
#gpio-cells = <2>;
};
gpio@80840040 {
compatible = "cirrus,ep9301-gpio";
reg = <0x80840040 0x04>,
<0x80840044 0x04>;
reg-names = "data", "dir";
gpio-controller;
#gpio-cells = <2>;
};
...
@@ -0,0 +1,117 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Generic MMIO GPIO
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
- Bartosz Golaszewski <brgl@bgdev.pl>
description:
Some simple GPIO controllers may consist of a single data register or a pair
of set/clear-bit registers. Such controllers are common for glue logic in
FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
NAND-style parallel busses.
properties:
compatible:
enum:
- brcm,bcm6345-gpio
- ni,169445-nand-gpio
- wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller
big-endian: true
'#gpio-cells':
const: 2
gpio-controller: true
little-endian: true
reg:
minItems: 1
description:
A list of registers in the controller. The width of each register is
determined by its size. All registers must have the same width. The number
of GPIOs is set by the width, with bit 0 corresponding to GPIO 0.
items:
- description:
Register to READ the value of the GPIO lines. If GPIO line is high,
the bit will be set. If the GPIO line is low, the bit will be cleared.
This register may also be used to drive GPIOs if the SET register is
omitted.
- description:
Register to SET the value of the GPIO lines. Setting a bit in this
register will drive the GPIO line high.
- description:
Register to CLEAR the value of the GPIO lines. Setting a bit in this
register will drive the GPIO line low. If this register is omitted,
the SET register will be used to clear the GPIO lines as well, by
actively writing the line with 0.
- description:
Register to set the line as OUTPUT. Setting a bit in this register
will turn that line into an output line. Conversely, clearing a bit
will turn that line into an input.
- description:
Register to set this line as INPUT. Setting a bit in this register
will turn that line into an input line. Conversely, clearing a bit
will turn that line into an output.
reg-names:
minItems: 1
maxItems: 5
items:
enum:
- dat
- set
- clr
- dirout
- dirin
native-endian: true
no-output:
$ref: /schemas/types.yaml#/definitions/flag
description:
If this property is present, the controller cannot drive the GPIO lines.
required:
- compatible
- reg
- reg-names
- '#gpio-cells'
- gpio-controller
additionalProperties: false
examples:
- |
gpio@1f300010 {
compatible = "ni,169445-nand-gpio";
reg = <0x1f300010 0x4>;
reg-names = "dat";
gpio-controller;
#gpio-cells = <2>;
};
gpio@e0100000 {
compatible = "wd,mbl-gpio";
reg-names = "dat";
reg = <0xe0100000 0x1>;
#gpio-cells = <2>;
gpio-controller;
no-output;
};
gpio@fffe0406 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
reg = <0xfffe0406 2>, <0xfffe040a 2>;
native-endian;
gpio-controller;
#gpio-cells = <2>;
};
@@ -24,6 +24,10 @@ properties:
'#gpio-cells':
const: 2
gpio-line-names:
minItems: 4
maxItems: 8
required:
- compatible
- reg
@@ -1,17 +0,0 @@
STMPE gpio
----------
Required properties:
- compatible: "st,stmpe-gpio"
Optional properties:
- st,norequest-mask: bitmask specifying which GPIOs should _not_ be requestable
due to different usage (e.g. touch, keypad)
Node should be child node of stmpe node to which it belongs.
Example:
stmpe_gpio {
compatible = "st,stmpe-gpio";
st,norequest-mask = <0x20>; //gpio 5 can't be used
};
@@ -61,6 +61,13 @@ properties:
gpio-ranges:
maxItems: 1
patternProperties:
"^.+-hog(-[0-9]+)?$":
type: object
required:
- gpio-hog
required:
- compatible
- reg
@@ -1,38 +0,0 @@
Bindings for the National Instruments 169445 GPIO NAND controller
The 169445 GPIO NAND controller has two memory mapped GPIO registers, one
for input (the ready signal) and one for output (control signals). It is
intended to be used with the GPIO NAND driver.
Required properties:
- compatible: should be "ni,169445-nand-gpio"
- reg-names: must contain
"dat" - data register
- reg: address + size pairs describing the GPIO register sets;
order must correspond with the order of entries in reg-names
- #gpio-cells: must be set to 2. The first cell is the pin number and
the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
- gpio-controller: Marks the device node as a gpio controller.
Optional properties:
- no-output: disables driving output on the pins
Examples:
gpio1: nand-gpio-out@1f300010 {
compatible = "ni,169445-nand-gpio";
reg = <0x1f300010 0x4>;
reg-names = "dat";
gpio-controller;
#gpio-cells = <2>;
};
gpio2: nand-gpio-in@1f300014 {
compatible = "ni,169445-nand-gpio";
reg = <0x1f300014 0x4>;
reg-names = "dat";
gpio-controller;
#gpio-cells = <2>;
no-output;
};
@@ -0,0 +1,53 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/st,stmpe-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectonics Port Expander (STMPE) GPIO Block
description:
STMicroelectronics Port Expander (STMPE) is a series of slow
bus controllers for various expanded peripherals such as GPIO, keypad,
touchscreen, ADC, PWM or rotator. It can contain one or several different
peripherals connected to SPI or I2C. These bindings pertain to the
GPIO portions of these expanders.
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
properties:
compatible:
const: st,stmpe-gpio
"#gpio-cells":
const: 2
"#interrupt-cells":
const: 2
gpio-controller: true
interrupt-controller: true
st,norequest-mask:
description:
A bitmask of GPIO lines that cannot be requested because for
for example not being connected to anything on the system
$ref: /schemas/types.yaml#/definitions/uint32
patternProperties:
"^.+-hog(-[0-9]+)?$":
type: object
required:
- gpio-hog
additionalProperties: false
required:
- compatible
- "#gpio-cells"
- "#interrupt-cells"
- gpio-controller
- interrupt-controller
@@ -1,38 +0,0 @@
Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
The Western Digital MyBook Live has two memory-mapped GPIO controllers.
Both GPIO controller only have a single 8-bit data register, where GPIO
state can be read and/or written.
Required properties:
- compatible: should be "wd,mbl-gpio"
- reg-names: must contain
"dat" - data register
- reg: address + size pairs describing the GPIO register sets;
order must correspond with the order of entries in reg-names
- #gpio-cells: must be set to 2. The first cell is the pin number and
the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
- gpio-controller: Marks the device node as a gpio controller.
Optional properties:
- no-output: GPIOs are read-only.
Examples:
gpio0: gpio0@e0000000 {
compatible = "wd,mbl-gpio";
reg-names = "dat";
reg = <0xe0000000 0x1>;
#gpio-cells = <2>;
gpio-controller;
};
gpio1: gpio1@e0100000 {
compatible = "wd,mbl-gpio";
reg-names = "dat";
reg = <0xe0100000 0x1>;
#gpio-cells = <2>;
gpio-controller;
no-output;
};
@@ -44,6 +44,7 @@ patternProperties:
- GPIO0
- GPIO1
- GPIO2
- GPIO3
function:
enum:
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
@@ -35,11 +35,11 @@ patternProperties:
"^gpio@[0-9a-f]+$":
# Child node
type: object
$ref: "../gpio/brcm,bcm6345-gpio.yaml"
$ref: "../gpio/brcm,bcm63xx-gpio.yaml"
description:
GPIO controller for the SoC GPIOs. This child node definition
should follow the bindings specified in
Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
"^pinctrl@[0-9a-f]+$":
# Child node
+1 -30
View File
@@ -165,8 +165,7 @@ Most GPIO controllers can be accessed with memory read/write instructions.
Those don't need to sleep, and can safely be done from inside hard
(nonthreaded) IRQ handlers and similar contexts.
Use the following calls to access such GPIOs,
for which gpio_cansleep() will always return false (see below)::
Use the following calls to access such GPIOs::
/* GPIO INPUT: return zero or nonzero */
int gpio_get_value(unsigned gpio);
@@ -200,13 +199,6 @@ Some GPIO controllers must be accessed using message based busses like I2C
or SPI. Commands to read or write those GPIO values require waiting to
get to the head of a queue to transmit a command and get its response.
This requires sleeping, which can't be done from inside IRQ handlers.
Platforms that support this type of GPIO distinguish them from other GPIOs
by returning nonzero from this call (which requires a valid GPIO number,
which should have been previously allocated with gpio_request)::
int gpio_cansleep(unsigned gpio);
To access such GPIOs, a different set of accessors is defined::
/* GPIO INPUT: return zero or nonzero, might sleep */
@@ -215,7 +207,6 @@ To access such GPIOs, a different set of accessors is defined::
/* GPIO OUTPUT, might sleep */
void gpio_set_value_cansleep(unsigned gpio, int value);
Accessing such GPIOs requires a context which may sleep, for example
a threaded IRQ handler, and those accessors must be used instead of
spinlock-safe accessors without the cansleep() name suffix.
@@ -319,11 +310,6 @@ where 'flags' is currently defined to specify the following properties:
* GPIOF_INIT_LOW - as output, set initial level to LOW
* GPIOF_INIT_HIGH - as output, set initial level to HIGH
* GPIOF_OPEN_DRAIN - gpio pin is open drain type.
* GPIOF_OPEN_SOURCE - gpio pin is open source type.
* GPIOF_EXPORT_DIR_FIXED - export gpio to sysfs, keep direction
* GPIOF_EXPORT_DIR_CHANGEABLE - also export, allow changing direction
since GPIOF_INIT_* are only valid when configured as output, so group valid
combinations as:
@@ -332,20 +318,6 @@ combinations as:
* GPIOF_OUT_INIT_LOW - configured as output, initial level LOW
* GPIOF_OUT_INIT_HIGH - configured as output, initial level HIGH
When setting the flag as GPIOF_OPEN_DRAIN then it will assume that pins is
open drain type. Such pins will not be driven to 1 in output mode. It is
require to connect pull-up on such pins. By enabling this flag, gpio lib will
make the direction to input when it is asked to set value of 1 in output mode
to make the pin HIGH. The pin is make to LOW by driving value 0 in output mode.
When setting the flag as GPIOF_OPEN_SOURCE then it will assume that pins is
open source type. Such pins will not be driven to 0 in output mode. It is
require to connect pull-down on such pin. By enabling this flag, gpio lib will
make the direction to input when it is asked to set value of 0 in output mode
to make the pin LOW. The pin is make to HIGH by driving value 1 in output mode.
In the future, these flags can be extended to support more properties.
Further more, to ease the claim/release of multiple GPIOs, 'struct gpio' is
introduced to encapsulate all three fields as::
@@ -556,7 +528,6 @@ code, which always dispatches through the gpio_chip::
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
Fancier implementations could instead define those as inline functions with
logic optimizing access to specific SOC-based GPIOs. For example, if the
@@ -153,8 +153,7 @@ get/set(获取/设置)函数调用没法返回错误,且有可能是配置错误
大多数 GPIO 控制器可以通过内存读/写指令来访问。这些指令不会休眠,可以
安全地在硬(非线程)中断例程和类似的上下文中完成。
对于那些用 gpio_cansleep()测试总是返回失败的 GPIO(见下文),使用
以下的函数访问::
对于那些 GPIO,使用以下的函数访问::
/* GPIO 输入:返回零或非零 */
int gpio_get_value(unsigned gpio);
@@ -186,11 +185,6 @@ GPIO值是布尔值,零表示低电平,非零表示高电平。当读取一
GPIO 值的命令需要等待其信息排到队首才发送命令,再获得其反馈。期间需要
休眠,这不能在 IRQ 例程(中断上下文)中执行。
支持此类 GPIO 的平台通过以下函数返回非零值来区分出这种 GPIO。(此函数需要
一个之前通过 gpio_request 分配到的有效 GPIO 编号)::
int gpio_cansleep(unsigned gpio);
为了访问这种 GPIO,内核定义了一套不同的函数::
/* GPIO 输入:返回零或非零 ,可能会休眠 */
@@ -199,7 +193,6 @@ GPIO 值的命令需要等待其信息排到队首才发送命令,再获得其
/* GPIO 输出,可能会休眠 */
void gpio_set_value_cansleep(unsigned gpio, int value);
访问这样的 GPIO 需要一个允许休眠的上下文,例如线程 IRQ 处理例程,并用以上的
访问函数替换那些没有 cansleep()后缀的自旋锁安全访问函数。
@@ -294,11 +287,6 @@ gpio_request()前将这类细节配置好,例如使用引脚控制子系统的
* GPIOF_INIT_LOW - 在作为输出时,初始值为低电平
* GPIOF_INIT_HIGH - 在作为输出时,初始值为高电平
* GPIOF_OPEN_DRAIN - gpio引脚为开漏信号
* GPIOF_OPEN_SOURCE - gpio引脚为源极开路信号
* GPIOF_EXPORT_DIR_FIXED - 将 gpio 导出到 sysfs,并保持方向
* GPIOF_EXPORT_DIR_CHANGEABLE - 同样是导出, 但允许改变方向
因为 GPIOF_INIT_* 仅有在配置为输出的时候才存在,所以有效的组合为:
@@ -306,18 +294,6 @@ gpio_request()前将这类细节配置好,例如使用引脚控制子系统的
* GPIOF_OUT_INIT_LOW - 配置为输出,并初始化为低电平
* GPIOF_OUT_INIT_HIGH - 配置为输出,并初始化为高电平
当设置 flag 为 GPIOF_OPEN_DRAIN 时,则假设引脚是开漏信号。这样的引脚
将不会在输出模式下置1。这样的引脚需要连接上拉电阻。通过使能这个标志,gpio库
将会在被要求输出模式下置1时将引脚变为输入状态来使引脚置高。引脚在输出模式下
通过置0使其输出低电平。
当设置 flag 为 GPIOF_OPEN_SOURCE 时,则假设引脚为源极开路信号。这样的引脚
将不会在输出模式下置0。这样的引脚需要连接下拉电阻。通过使能这个标志,gpio库
将会在被要求输出模式下置0时将引脚变为输入状态来使引脚置低。引脚在输出模式下
通过置1使其输出高电平。
将来这些标志可能扩展到支持更多的属性。
更进一步,为了更简单地声明/释放多个 GPIO,'struct gpio'被引进来封装所有
这三个领域::
@@ -500,8 +476,8 @@ GPIO 实现者的框架(可选)
为了支持这个框架,一个平台的 Kconfig 文件将会 "select"(选择)
ARCH_REQUIRE_GPIOLIB 或 ARCH_WANT_OPTIONAL_GPIOLIB,并让它的
<asm/gpio.h> 包含 <asm-generic/gpio.h>,同时定义个方法:
gpio_get_value()、gpio_set_value()和 gpio_cansleep()
<asm/gpio.h> 包含 <asm-generic/gpio.h>,同时定义个方法:
gpio_get_value()、gpio_set_value()。
它也应提供一个 ARCH_NR_GPIOS 的定义值,这样可以更好地反映该平台 GPIO
的实际数量,节省静态表的空间。(这个定义值应该包含片上系统内建 GPIO 和
@@ -519,7 +495,6 @@ ARCH_WANT_OPTIONAL_GPIOLIB 意味着 gpiolib 核心默认关闭,且用户可以
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
这些定义可以用更理想的实现方法替代,那就是使用经过逻辑优化的内联函数来访问
基于特定片上系统的 GPIO。例如,若引用的 GPIO (寄存器位偏移)是常量“12”,
+3 -28
View File
@@ -161,8 +161,7 @@ get/set(獲取/設置)函數調用沒法返回錯誤,且有可能是配置錯誤
大多數 GPIO 控制器可以通過內存讀/寫指令來訪問。這些指令不會休眠,可以
安全地在硬(非線程)中斷例程和類似的上下文中完成。
對於那些用 gpio_cansleep()測試總是返回失敗的 GPIO(見下文),使用
以下的函數訪問:
對於那些 GPIO,使用以下的函數訪問:
/* GPIO 輸入:返回零或非零 */
int gpio_get_value(unsigned gpio);
@@ -193,11 +192,6 @@ GPIO值是布爾值,零表示低電平,非零表示高電平。當讀取一
GPIO 值的命令需要等待其信息排到隊首才發送命令,再獲得其反饋。期間需要
休眠,這不能在 IRQ 例程(中斷上下文)中執行。
支持此類 GPIO 的平台通過以下函數返回非零值來區分出這種 GPIO。(此函數需要
一個之前通過 gpio_request 分配到的有效 GPIO 編號):
int gpio_cansleep(unsigned gpio);
爲了訪問這種 GPIO,內核定義了一套不同的函數:
/* GPIO 輸入:返回零或非零 ,可能會休眠 */
@@ -206,7 +200,6 @@ GPIO 值的命令需要等待其信息排到隊首才發送命令,再獲得其
/* GPIO 輸出,可能會休眠 */
void gpio_set_value_cansleep(unsigned gpio, int value);
訪問這樣的 GPIO 需要一個允許休眠的上下文,例如線程 IRQ 處理例程,並用以上的
訪問函數替換那些沒有 cansleep()後綴的自旋鎖安全訪問函數。
@@ -300,11 +293,6 @@ gpio_request()前將這類細節配置好,例如使用 pinctrl 子系統的映
* GPIOF_INIT_LOW - 在作爲輸出時,初始值爲低電平
* GPIOF_INIT_HIGH - 在作爲輸出時,初始值爲高電平
* GPIOF_OPEN_DRAIN - gpio引腳爲開漏信號
* GPIOF_OPEN_SOURCE - gpio引腳爲源極開路信號
* GPIOF_EXPORT_DIR_FIXED - 將 gpio 導出到 sysfs,並保持方向
* GPIOF_EXPORT_DIR_CHANGEABLE - 同樣是導出, 但允許改變方向
因爲 GPIOF_INIT_* 僅有在配置爲輸出的時候才存在,所以有效的組合爲:
@@ -312,18 +300,6 @@ gpio_request()前將這類細節配置好,例如使用 pinctrl 子系統的映
* GPIOF_OUT_INIT_LOW - 配置爲輸出,並初始化爲低電平
* GPIOF_OUT_INIT_HIGH - 配置爲輸出,並初始化爲高電平
當設置 flag 爲 GPIOF_OPEN_DRAIN 時,則假設引腳是開漏信號。這樣的引腳
將不會在輸出模式下置1。這樣的引腳需要連接上拉電阻。通過使能這個標誌,gpio庫
將會在被要求輸出模式下置1時將引腳變爲輸入狀態來使引腳置高。引腳在輸出模式下
通過置0使其輸出低電平。
當設置 flag 爲 GPIOF_OPEN_SOURCE 時,則假設引腳爲源極開路信號。這樣的引腳
將不會在輸出模式下置0。這樣的引腳需要連接下拉電阻。通過使能這個標誌,gpio庫
將會在被要求輸出模式下置0時將引腳變爲輸入狀態來使引腳置低。引腳在輸出模式下
通過置1使其輸出高電平。
將來這些標誌可能擴展到支持更多的屬性。
更進一步,爲了更簡單地聲明/釋放多個 GPIO,'struct gpio'被引進來封裝所有
這三個領域:
@@ -466,8 +442,8 @@ GPIO 實現者的框架 (可選)
-------
爲了支持這個框架,一個平台的 Kconfig 文件將會 "select"(選擇)
ARCH_REQUIRE_GPIOLIB 或 ARCH_WANT_OPTIONAL_GPIOLIB,並讓它的
<asm/gpio.h> 包含 <asm-generic/gpio.h>,同時定義個方法:
gpio_get_value()、gpio_set_value()和 gpio_cansleep()
<asm/gpio.h> 包含 <asm-generic/gpio.h>,同時定義個方法:
gpio_get_value()、gpio_set_value()。
它也應提供一個 ARCH_NR_GPIOS 的定義值,這樣可以更好地反映該平台 GPIO
的實際數量,節省靜態表的空間。(這個定義值應該包含片上系統內建 GPIO 和
@@ -485,7 +461,6 @@ ARCH_WANT_OPTIONAL_GPIOLIB 意味著 gpiolib 核心默認關閉,且用戶可以
#define gpio_get_value __gpio_get_value
#define gpio_set_value __gpio_set_value
#define gpio_cansleep __gpio_cansleep
這些定義可以用更理想的實現方法替代,那就是使用經過邏輯優化的內聯函數來訪問
基於特定片上系統的 GPIO。例如,若引用的 GPIO (寄存器位偏移)是常量「12」,

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