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Merge tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Browse Source 
Pull devicetree updates from Rob Herring:
 "DT core:

   - Cleanup of the reserved memory code to keep CMA specifics in CMA
     code

   - Add and convert several users to new of_machine_get_match() helper

   - Validate nul termination in string properties

   - Update dtc to upstream v1.7.2-69-g53373d135579

   - Limit matching reserved memory devices to /reserved-memory nodes

   - Fix some UAF in unittests

   - Remove Baikal SoC bus driver

   - Fix false DT_SPLIT_BINDING_PATCH checkpatch warning

   - Allow fw_devlink device-tree on x86

   - Fix kerneldoc return description for of_property_count_elems_of_size()

  DT bindings:

   - Add fsl,imx25-aips, fsl,imx25-tcq, qcom,eliza-pdc,
     qcom,eliza-spmi-pmic-arb, qcom,hawi-imem, qcom,milos-imem,
     qcom,hawi-pdc, and lg,sw49410 bindings

   - Convert arm,vexpress-scc to DT schema

   - Deprecate Qualcomm generic CPU compatibles. Add Apple M3 CPU cores.

   - Move some dual-link display panels to the dual-link schema

   - Drop mux controller node name constraints

   - Remove Baikal SoC bus bindings

   - Fix a false warning in the thermal trip node binding"

* tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
  dt-bindings: display: panel: panel-simple: Add lg,sw49410 compatible
  dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints
  dt-bindings: display: simple: Move Innolux G156HCE-L01 panel to dual-link
  dt-bindings: display: simple: Move AUO 21.5" FHD to dual-link
  dt-bindings: thermal: Fix false warning with 'phandle' in trips nodes
  of: unittest: fix use-after-free in testdrv_probe()
  of: unittest: fix use-after-free in of_unittest_changeset()
  dt-bindings: qcom,pdc: document the Hawi Power Domain Controller
  dt-bindings: ARM: arm,vexpress-scc: convert to DT schema
  drivers/of: fdt: validate flat DT string properties before string use
  drivers/of: fdt: validate stdout-path properties before parsing them
  dt-bindings: sram: Document qcom,hawi-imem compatible
  dt-bindings: sram: Allow multiple-word prefixes to sram subnode
  dt-bindings: sram: Document qcom,milos-imem
  scripts/dtc: Update to upstream version v1.7.2-69-g53373d135579
  of: property: Allow fw_devlink device-tree on x86
  dt-bindings: arm: cpus: Add Apple M3 CPU core compatibles
  dt-bindings: display: lt8912b: Drop redundant endpoint properties
  dt-bindings: opp-v2: Fix example 3 CPU reg value
  dt-bindings: connector: add pd-disable dependency
  ...
This commit is contained in:
Linus Torvalds
2026-04-17 14:09:02 -07:00
parent 430cc9f42b a74c2e55ab
commit e2d10998e4
42 changed files with 508 additions and 1332 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml
+53
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@@ -0,0 +1,53 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,vexpress-scc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Express Serial Configuration Controller
maintainers:
- Liviu Dudau <liviu.dudau@arm.com>
- Sudeep Holla <sudeep.holla@arm.com>
description: |
Test chips for ARM Versatile Express platform implement SCC (Serial
Configuration Controller) interface, used to set initial conditions
for the test chip.
In some cases its registers are also mapped in normal address space
and can be used to obtain runtime information about the chip internals
(like silicon temperature sensors) and as interface to other subsystems
like platform configuration control and power management.
properties:
compatible:
items:
- enum:
- arm,vexpress-scc,v2p-ca15_a7
- const: arm,vexpress-scc
reg:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
additionalProperties: false
examples:
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
scc@7fff0000 {
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
reg = <0 0x7fff0000 0 0x1000>;
interrupts = <0 95 4>;
};
};
...
Documentation/devicetree/bindings/arm/cpus.yaml
+156 -150
View File
@@ -79,156 +79,162 @@ properties:
All other bits in the reg cells must be set to 0.
compatible:
enum:
- apm,potenza
- apm,strega
- apple,avalanche
- apple,blizzard
- apple,cyclone
- apple,firestorm
- apple,hurricane-zephyr
- apple,icestorm
- apple,mistral
- apple,monsoon
- apple,twister
- apple,typhoon
- arm,arm710t
- arm,arm720t
- arm,arm740t
- arm,arm7ej-s
- arm,arm7tdmi
- arm,arm7tdmi-s
- arm,arm9es
- arm,arm9ej-s
- arm,arm920t
- arm,arm922t
- arm,arm925
- arm,arm926e-s
- arm,arm926ej-s
- arm,arm940t
- arm,arm946e-s
- arm,arm966e-s
- arm,arm968e-s
- arm,arm9tdmi
- arm,arm1020e
- arm,arm1020t
- arm,arm1022e
- arm,arm1026ej-s
- arm,arm1136j-s
- arm,arm1136jf-s
- arm,arm1156t2-s
- arm,arm1156t2f-s
- arm,arm1176jzf
- arm,arm1176jz-s
- arm,arm1176jzf-s
- arm,arm11mpcore
- arm,armv8 # Only for s/w models
- arm,c1-nano
- arm,c1-premium
- arm,c1-pro
- arm,c1-ultra
- arm,cortex-a5
- arm,cortex-a7
- arm,cortex-a8
- arm,cortex-a9
- arm,cortex-a12
- arm,cortex-a15
- arm,cortex-a17
- arm,cortex-a32
- arm,cortex-a34
- arm,cortex-a35
- arm,cortex-a53
- arm,cortex-a55
- arm,cortex-a57
- arm,cortex-a65
- arm,cortex-a72
- arm,cortex-a73
- arm,cortex-a75
- arm,cortex-a76
- arm,cortex-a77
- arm,cortex-a78
- arm,cortex-a78ae
- arm,cortex-a78c
- arm,cortex-a320
- arm,cortex-a510
- arm,cortex-a520
- arm,cortex-a520ae
- arm,cortex-a710
- arm,cortex-a715
- arm,cortex-a720
- arm,cortex-a720ae
- arm,cortex-a725
- arm,cortex-m0
- arm,cortex-m0+
- arm,cortex-m1
- arm,cortex-m3
- arm,cortex-m4
- arm,cortex-r4
- arm,cortex-r5
- arm,cortex-r7
- arm,cortex-r52
- arm,cortex-x1
- arm,cortex-x1c
- arm,cortex-x2
- arm,cortex-x3
- arm,cortex-x4
- arm,cortex-x925
- arm,neoverse-e1
- arm,neoverse-n1
- arm,neoverse-n2
- arm,neoverse-n3
- arm,neoverse-v1
- arm,neoverse-v2
- arm,neoverse-v3
- arm,neoverse-v3ae
- arm,rainier
- brcm,brahma-b15
- brcm,brahma-b53
- brcm,vulcan
- cavium,thunder
- cavium,thunder2
- faraday,fa526
- intel,sa110
- intel,sa1100
- marvell,feroceon
- marvell,mohawk
- marvell,pj4a
- marvell,pj4b
- marvell,sheeva-v5
- marvell,sheeva-v7
- nvidia,tegra132-denver
- nvidia,tegra186-denver
- nvidia,tegra194-carmel
- qcom,krait
- qcom,kryo
- qcom,kryo240
- qcom,kryo250
- qcom,kryo260
- qcom,kryo280
- qcom,kryo360
- qcom,kryo385
- qcom,kryo465
- qcom,kryo468
- qcom,kryo470
- qcom,kryo485
- qcom,kryo560
- qcom,kryo570
- qcom,kryo660
- qcom,kryo670
- qcom,kryo685
- qcom,kryo780
- qcom,oryon
- qcom,oryon-1-1
- qcom,oryon-1-2
- qcom,oryon-1-3
- qcom,oryon-1-4
- qcom,oryon-2-1
- qcom,oryon-2-2
- qcom,oryon-2-3
- qcom,scorpion
- samsung,mongoose-m2
- samsung,mongoose-m3
- samsung,mongoose-m5
oneOf:
- enum:
- apm,potenza
- apm,strega
- apple,avalanche
- apple,blizzard
- apple,cyclone
- apple,everest
- apple,firestorm
- apple,hurricane-zephyr
- apple,icestorm
- apple,mistral
- apple,monsoon
- apple,sawtooth
- apple,twister
- apple,typhoon
- arm,arm710t
- arm,arm720t
- arm,arm740t
- arm,arm7ej-s
- arm,arm7tdmi
- arm,arm7tdmi-s
- arm,arm9es
- arm,arm9ej-s
- arm,arm920t
- arm,arm922t
- arm,arm925
- arm,arm926e-s
- arm,arm926ej-s
- arm,arm940t
- arm,arm946e-s
- arm,arm966e-s
- arm,arm968e-s
- arm,arm9tdmi
- arm,arm1020e
- arm,arm1020t
- arm,arm1022e
- arm,arm1026ej-s
- arm,arm1136j-s
- arm,arm1136jf-s
- arm,arm1156t2-s
- arm,arm1156t2f-s
- arm,arm1176jzf
- arm,arm1176jz-s
- arm,arm1176jzf-s
- arm,arm11mpcore
- arm,armv8 # Only for s/w models
- arm,c1-nano
- arm,c1-premium
- arm,c1-pro
- arm,c1-ultra
- arm,cortex-a5
- arm,cortex-a7
- arm,cortex-a8
- arm,cortex-a9
- arm,cortex-a12
- arm,cortex-a15
- arm,cortex-a17
- arm,cortex-a32
- arm,cortex-a34
- arm,cortex-a35
- arm,cortex-a53
- arm,cortex-a55
- arm,cortex-a57
- arm,cortex-a65
- arm,cortex-a72
- arm,cortex-a73
- arm,cortex-a75
- arm,cortex-a76
- arm,cortex-a77
- arm,cortex-a78
- arm,cortex-a78ae
- arm,cortex-a78c
- arm,cortex-a320
- arm,cortex-a510
- arm,cortex-a520
- arm,cortex-a520ae
- arm,cortex-a710
- arm,cortex-a715
- arm,cortex-a720
- arm,cortex-a720ae
- arm,cortex-a725
- arm,cortex-m0
- arm,cortex-m0+
- arm,cortex-m1
- arm,cortex-m3
- arm,cortex-m4
- arm,cortex-r4
- arm,cortex-r5
- arm,cortex-r7
- arm,cortex-r52
- arm,cortex-x1
- arm,cortex-x1c
- arm,cortex-x2
- arm,cortex-x3
- arm,cortex-x4
- arm,cortex-x925
- arm,neoverse-e1
- arm,neoverse-n1
- arm,neoverse-n2
- arm,neoverse-n3
- arm,neoverse-v1
- arm,neoverse-v2
- arm,neoverse-v3
- arm,neoverse-v3ae
- arm,rainier
- brcm,brahma-b15
- brcm,brahma-b53
- brcm,vulcan
- cavium,thunder
- cavium,thunder2
- faraday,fa526
- intel,sa110
- intel,sa1100
- marvell,feroceon
- marvell,mohawk
- marvell,pj4a
- marvell,pj4b
- marvell,sheeva-v5
- marvell,sheeva-v7
- nvidia,tegra132-denver
- nvidia,tegra186-denver
- nvidia,tegra194-carmel
- qcom,krait
- qcom,kryo240
- qcom,kryo250
- qcom,kryo260
- qcom,kryo280
- qcom,kryo360
- qcom,kryo385
- qcom,kryo465
- qcom,kryo468
- qcom,kryo470
- qcom,kryo485
- qcom,kryo560
- qcom,kryo570
- qcom,kryo660
- qcom,kryo670
- qcom,kryo685
- qcom,kryo780
- qcom,oryon-1-1
- qcom,oryon-1-2
- qcom,oryon-1-3
- qcom,oryon-1-4
- qcom,oryon-2-1
- qcom,oryon-2-2
- qcom,oryon-2-3
- qcom,scorpion
- samsung,mongoose-m2
- samsung,mongoose-m3
- samsung,mongoose-m5
- enum:
- qcom,kryo
- qcom,oryon
# Too generic, do not use in new code
deprecated: true
enable-method:
$ref: /schemas/types.yaml#/definitions/string
Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml
+1
View File
@@ -15,6 +15,7 @@ properties:
compatible:
oneOf:
- enum:
- fsl,imx25-aips
- fsl,imx51-m4if
- fsl,imx51-tigerp
- fsl,imx51-aipstz
Documentation/devicetree/bindings/arm/vexpress-scc.txt
-33
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@@ -1,33 +0,0 @@
ARM Versatile Express Serial Configuration Controller
-----------------------------------------------------
Test chips for ARM Versatile Express platform implement SCC (Serial
Configuration Controller) interface, used to set initial conditions
for the test chip.
In some cases its registers are also mapped in normal address space
and can be used to obtain runtime information about the chip internals
(like silicon temperature sensors) and as interface to other subsystems
like platform configuration control and power management.
Required properties:
- compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
where <model> is the full tile model name (as used
in the tile's Technical Reference Manual),
eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
Optional properties:
- reg: when the SCC is memory mapped, physical address and size of the
registers window
- interrupts: when the SCC can generate a system-level interrupt
Example:
scc@7fff0000 {
compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
reg = <0 0x7fff0000 0 0x1000>;
interrupts = <0 95 4>;
};
Documentation/devicetree/bindings/bus/baikal,bt1-apb.yaml
-90
View File
@@ -1,90 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Baikal-T1 APB-bus
maintainers:
- Serge Semin <fancer.lancer@gmail.com>
description: |
Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
which routes them to the AXI-APB bridge. This interface is a single master
multiple slaves bus in turn serializing IO accesses and routing them to the
addressed APB slave devices. In case of any APB protocol collisions, slave
device not responding on timeout an IRQ is raised with an erroneous address
reported to the APB terminator (APB Errors Handler Block).
allOf:
- $ref: /schemas/simple-bus.yaml#
properties:
compatible:
contains:
const: baikal,bt1-apb
reg:
items:
- description: APB EHB MMIO registers
- description: APB MMIO region with no any device mapped
reg-names:
items:
- const: ehb
- const: nodev
interrupts:
maxItems: 1
clocks:
items:
- description: APB reference clock
clock-names:
items:
- const: pclk
resets:
items:
- description: APB domain reset line
reset-names:
items:
- const: prst
unevaluatedProperties: false
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
examples:
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
bus@1f059000 {
compatible = "baikal,bt1-apb", "simple-bus";
reg = <0x1f059000 0x1000>,
<0x1d000000 0x2040000>;
reg-names = "ehb", "nodev";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu_sys 1>;
clock-names = "pclk";
resets = <&ccu_sys 1>;
reset-names = "prst";
};
...
Documentation/devicetree/bindings/bus/baikal,bt1-axi.yaml
-107
View File
@@ -1,107 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Baikal-T1 AXI-bus
maintainers:
- Serge Semin <fancer.lancer@gmail.com>
description: |
AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
high-speed peripheral IP-cores with RAM controller and with MIPS P5600
cores. Traffic arbitration is done by means of DW AXI Interconnect (so
called AXI Main Interconnect) routing IO requests from one block to
another: from CPU to SoC peripherals and between some SoC peripherals
(mostly between peripheral devices and RAM, but also between DMA and
some peripherals). In case of any protocol error, device not responding
an IRQ is raised and a faulty situation is reported to the AXI EHB
(Errors Handler Block) embedded on top of the DW AXI Interconnect and
accessible by means of the Baikal-T1 System Controller.
allOf:
- $ref: /schemas/simple-bus.yaml#
properties:
compatible:
contains:
const: baikal,bt1-axi
reg:
minItems: 1
items:
- description: Synopsys DesignWare AXI Interconnect QoS registers
- description: AXI EHB MMIO system controller registers
reg-names:
minItems: 1
items:
- const: qos
- const: ehb
'#interconnect-cells':
const: 1
syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to the Baikal-T1 System Controller DT node
interrupts:
maxItems: 1
clocks:
items:
- description: Main Interconnect uplink reference clock
clock-names:
items:
- const: aclk
resets:
items:
- description: Main Interconnect reset line
reset-names:
items:
- const: arst
unevaluatedProperties: false
required:
- compatible
- reg
- reg-names
- syscon
- interrupts
- clocks
- clock-names
examples:
- |
#include <dt-bindings/interrupt-controller/mips-gic.h>
bus@1f05a000 {
compatible = "baikal,bt1-axi", "simple-bus";
reg = <0x1f05a000 0x1000>,
<0x1f04d110 0x8>;
reg-names = "qos", "ehb";
#address-cells = <1>;
#size-cells = <1>;
#interconnect-cells = <1>;
syscon = <&syscon>;
ranges;
interrupts = <GIC_SHARED 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu_axi 0>;
clock-names = "aclk";
resets = <&ccu_axi 0>;
reset-names = "arst";
};
...
Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml
-3
View File
@@ -39,9 +39,6 @@ properties:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
data-lanes: true
required:
- data-lanes
Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml
+4
View File
@@ -40,8 +40,12 @@ properties:
- auo,g185han01
# AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel
- auo,g190ean01
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
- auo,t215hvn01
# BOE AV123Z7M-N17 12.3" (1920x720) LVDS TFT LCD panel
- boe,av123z7m-n17
# InnoLux 15.6" FHD (1920x1080) TFT LCD panel
- innolux,g156hce-l01
# Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel
- koe,tx26d202vm0bwa
# Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200
Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+2 -4
View File
@@ -61,8 +61,6 @@ properties:
- auo,p238han01
# AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
- auo,p320hvn03
# AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
- auo,t215hvn01
# Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
- avic,tm070ddh03
# BOE AV101HDT-a10 10.1" 1280x720 LVDS panel
@@ -180,8 +178,6 @@ properties:
- innolux,g121xce-l01
# InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel
- innolux,g150xge-l05
# InnoLux 15.6" FHD (1920x1080) TFT LCD panel
- innolux,g156hce-l01
# InnoLux 13.3" FHD (1920x1080) TFT LCD panel
- innolux,n133hse-ea1
# InnoLux 15.6" WXGA TFT LCD panel
@@ -204,6 +200,8 @@ properties:
- lemaker,bl035-rgb-002
# LG 7" (800x480 pixels) TFT LCD panel
- lg,lb070wv8
# LG 6.1" (1440x3120) IPS LCD panel
- lg,sw49410
# Logic Technologies LT161010-2NHC 7" WVGA TFT Cap Touch Module
- logictechno,lt161010-2nhc
# Logic Technologies LT161010-2NHR 7" WVGA TFT Resistive Touch Module
Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
+52 -18
View File
@@ -36,34 +36,50 @@ properties:
reg:
description:
Addresses to each DSS memory region described in the SoC's TRM.
items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: VID video plane
- description: OVR1 overlay manager for vp1
- description: OVR2 overlay manager for vp2
- description: VP1 video port 1
- description: VP2 video port 2
- description: common1 DSS register area
oneOf:
- items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: VID video plane
- description: OVR1 overlay manager for vp1
- description: OVR2 overlay manager for vp2
- description: VP1 video port 1
- description: VP2 video port 2
- description: common1 DSS register area
- items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: OVR1 overlay manager for vp1
- description: VP1 video port 1
- description: common1 DSS register area
reg-names:
items:
- const: common
- const: vidl1
- const: vid
- const: ovr1
- const: ovr2
- const: vp1
- const: vp2
- const: common1
oneOf:
- items:
- const: common
- const: vidl1
- const: vid
- const: ovr1
- const: ovr2
- const: vp1
- const: vp2
- const: common1
- items:
- const: common
- const: vidl1
- const: ovr1
- const: vp1
- const: common1
clocks:
minItems: 2
items:
- description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock
- description: vp2 Video Port 2 pixel clock
clock-names:
minItems: 2
items:
- const: fck
- const: vp1
@@ -179,6 +195,24 @@ allOf:
ports:
properties:
port@1: false
reg:
maxItems: 5
reg-names:
maxItems: 5
clocks:
maxItems: 2
clock-names:
maxItems: 2
else:
properties:
reg:
minItems: 8
reg-names:
minItems: 8
clocks:
minItems: 3
clock-names:
minItems: 3
- if:
properties:
Documentation/devicetree/bindings/input/touchscreen/fsl,imx25-tcq.yaml
+69
View File
@@ -0,0 +1,69 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/touchscreen/fsl,imx25-tcq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale mx25 TS conversion queue module
maintainers:
- Frank Li <Frank.Li@nxp.com>
description:
mx25 touchscreen conversion queue module which controls the ADC unit of the
mx25 for attached touchscreens.
properties:
compatible:
const: fsl,imx25-tcq
reg:
maxItems: 1
interrupts:
maxItems: 1
fsl,wires:
description: touch wires number.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [4, 5]
fsl,pen-debounce-ns:
description:
Pen debounce time in nanoseconds.
fsl,pen-threshold:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Pen-down threshold for the touchscreen. This is a value
between 1 and 4096. It is the ratio between the internal reference voltage
and the measured voltage after the plate was precharged. Resistance between
plates and therefore the voltage decreases with pressure so that a smaller
value is equivalent to a higher pressure.
fsl,settling-time-ns:
description:
Settling time in nanoseconds. The settling time is before
the actual touch detection to wait for an even charge distribution in the
plate.
allOf:
- $ref: touchscreen.yaml
required:
- compatible
- reg
- interrupts
- fsl,wires
unevaluatedProperties: false
examples:
- |
touchscreen@50030400 {
compatible = "fsl,imx25-tcq";
reg = <0x50030400 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <0>;
fsl,wires = <4>;
};
Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
-34
View File
@@ -1,34 +0,0 @@
Freescale mx25 TS conversion queue module
mx25 touchscreen conversion queue module which controls the ADC unit of the
mx25 for attached touchscreens.
Required properties:
- compatible: Should be "fsl,imx25-tcq".
- reg: Memory range of the device.
- interrupts: Should be the interrupt number associated with this module within
the tscadc unit (<0>).
- fsl,wires: Should be '<4>' or '<5>'
Optional properties:
- fsl,pen-debounce-ns: Pen debounce time in nanoseconds.
- fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value
between 1 and 4096. It is the ratio between the internal reference voltage
and the measured voltage after the plate was precharged. Resistance between
plates and therefore the voltage decreases with pressure so that a smaller
value is equivalent to a higher pressure.
- fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before
the actual touch detection to wait for an even charge distribution in the
plate.
This device includes two conversion queues which can be added as subnodes.
The first queue is for the touchscreen, the second for general purpose ADC.
Example:
tsc: tcq@50030400 {
compatible = "fsl,imx25-tcq";
reg = <0x50030400 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <0>;
fsl,wires = <4>;
};
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
+1 -1
View File
@@ -50,7 +50,7 @@ properties:
The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987]. PPI interrupts are in the
range [0-15]. Extended SPI interrupts are in the range [0-1023].
Extended PPI interrupts are in the range [0-127].
Extended PPI interrupts are in the range [0-63].
The 3rd cell is the flags, encoded as follows:
bits[3:0] trigger type and level flags.
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+2
View File
@@ -26,7 +26,9 @@ properties:
compatible:
items:
- enum:
- qcom,eliza-pdc
- qcom,glymur-pdc
- qcom,hawi-pdc
- qcom,kaanapali-pdc
- qcom,milos-pdc
- qcom,qcs615-pdc
Documentation/devicetree/bindings/mux/mux-controller.yaml
-6
View File
@@ -63,18 +63,12 @@ description: |
select:
anyOf:
- properties:
$nodename:
pattern: '^mux-controller'
- required:
- '#mux-control-cells'
- required:
- '#mux-state-cells'
properties:
$nodename:
pattern: '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$'
'#mux-control-cells':
enum: [ 0, 1 ]
Documentation/devicetree/bindings/opp/opp-v2.yaml
+4 -4
View File
@@ -172,7 +172,7 @@ examples:
cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
reg = <0x0>;
next-level-cache = <&L2>;
clocks = <&clk_controller 0>;
clock-names = "cpu";
@@ -183,7 +183,7 @@ examples:
cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
reg = <0x1>;
next-level-cache = <&L2>;
clocks = <&clk_controller 0>;
clock-names = "cpu";
@@ -194,7 +194,7 @@ examples:
cpu@100 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <100>;
reg = <0x100>;
next-level-cache = <&L2>;
clocks = <&clk_controller 1>;
clock-names = "cpu";
@@ -205,7 +205,7 @@ examples:
cpu@101 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <101>;
reg = <0x101>;
next-level-cache = <&L2>;
clocks = <&clk_controller 1>;
clock-names = "cpu";
Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml
+3 -1
View File
@@ -24,7 +24,9 @@ properties:
compatible:
oneOf:
- items:
- const: qcom,sar2130p-spmi-pmic-arb
- enum:
- qcom,eliza-spmi-pmic-arb
- qcom,sar2130p-spmi-pmic-arb
- const: qcom,x1e80100-spmi-pmic-arb
- const: qcom,x1e80100-spmi-pmic-arb
Documentation/devicetree/bindings/sram/sram.yaml
+3 -1
View File
@@ -34,7 +34,9 @@ properties:
- nvidia,tegra186-sysram
- nvidia,tegra194-sysram
- nvidia,tegra234-sysram
- qcom,hawi-imem
- qcom,kaanapali-imem
- qcom,milos-imem
- qcom,rpm-msg-ram
- rockchip,rk3288-pmu-sram
@@ -65,7 +67,7 @@ properties:
type: boolean
patternProperties:
"^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$":
"^([a-z0-9]+-)*sram(-section)?@[a-f0-9]+$":
type: object
description:
Each child of the sram node specifies a region of reserved memory.
Documentation/devicetree/bindings/thermal/thermal-zones.yaml
+46 -49
View File
@@ -129,63 +129,60 @@ patternProperties:
which the thermal framework needs to take action. The actions to
be taken are defined in another node called cooling-maps.
patternProperties:
"^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$":
type: object
additionalProperties:
type: object
additionalProperties: false
properties:
temperature:
$ref: /schemas/types.yaml#/definitions/int32
minimum: -273000
maximum: 200000
description:
An integer expressing the trip temperature in millicelsius.
properties:
temperature:
$ref: /schemas/types.yaml#/definitions/int32
minimum: -273000
maximum: 200000
description:
An integer expressing the trip temperature in millicelsius.
hysteresis:
$ref: /schemas/types.yaml#/definitions/uint32
description:
An unsigned integer expressing the hysteresis delta with
respect to the trip temperature property above, also in
millicelsius. Any cooling action initiated by the framework is
maintained until the temperature falls below
(trip temperature - hysteresis). This potentially prevents a
situation where the trip gets constantly triggered soon after
cooling action is removed.
hysteresis:
$ref: /schemas/types.yaml#/definitions/uint32
description:
An unsigned integer expressing the hysteresis delta with
respect to the trip temperature property above, also in
millicelsius. Any cooling action initiated by the framework is
maintained until the temperature falls below
(trip temperature - hysteresis). This potentially prevents a
situation where the trip gets constantly triggered soon after
cooling action is removed.
type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- active # enable active cooling e.g. fans
- passive # enable passive cooling e.g. throttling cpu
- hot # send notification to driver
- critical # send notification to driver, trigger shutdown
description: |
There are four valid trip types: active, passive, hot,
critical.
type:
$ref: /schemas/types.yaml#/definitions/string
enum:
- active # enable active cooling e.g. fans
- passive # enable passive cooling e.g. throttling cpu
- hot # send notification to driver
- critical # send notification to driver, trigger shutdown
description: |
There are four valid trip types: active, passive, hot,
critical.
The critical trip type is used to set the maximum
temperature threshold above which the HW becomes
unstable and underlying firmware might even trigger a
reboot. Hitting the critical threshold triggers a system
shutdown.
The critical trip type is used to set the maximum
temperature threshold above which the HW becomes
unstable and underlying firmware might even trigger a
reboot. Hitting the critical threshold triggers a system
shutdown.
The hot trip type can be used to send a notification to
the thermal driver (if a .notify callback is registered).
The action to be taken is left to the driver.
The hot trip type can be used to send a notification to
the thermal driver (if a .notify callback is registered).
The action to be taken is left to the driver.
The passive trip type can be used to slow down HW e.g. run
the CPU, GPU, bus at a lower frequency.
The passive trip type can be used to slow down HW e.g. run
the CPU, GPU, bus at a lower frequency.
The active trip type can be used to control other HW to
help in cooling e.g. fans can be sped up or slowed down
The active trip type can be used to control other HW to
help in cooling e.g. fans can be sped up or slowed down
required:
- temperature
- hysteresis
- type
additionalProperties: false
additionalProperties: false
required:
- temperature
- hysteresis
- type
cooling-maps:
type: object
Documentation/devicetree/of_unittest.rst
+10 -10
View File
@@ -48,30 +48,30 @@ from 'scripts/dtc/of_unittest_expect --help'.
3. Test-data
============
The Device Tree Source file (drivers/of/unittest-data/testcases.dts) contains
The Device Tree Source file (drivers/of/unittest-data/testcases.dtso) contains
the test data required for executing the unit tests automated in
drivers/of/unittest.c. See the content of the folder::
drivers/of/unittest-data/tests-*.dtsi
for the Device Tree Source Include files (.dtsi) included in testcases.dts.
for the Device Tree Source Include files (.dtsi) included in testcases.dtso.
When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make
rule::
$(obj)/%.dtb: $(src)/%.dts FORCE
$(call if_changed_dep, dtc)
$(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE
$(call if_changed_dep,dtc)
is used to compile the DT source file (testcases.dts) into a binary blob
(testcases.dtb), also referred as flattened DT.
is used to compile the DT source file (testcases.dtso) into a binary blob
(testcases.dtbo), also referred as flattened DT.
After that, using the following rule the binary blob above is wrapped as an
assembly file (testcases.dtb.S)::
assembly file (testcases.dtbo.S)::
$(obj)/%.dtb.S: $(obj)/%.dtb
$(call cmd, dt_S_dtb)
$(obj)/%.dtbo.S: $(obj)/%.dtbo FORCE
$(call if_changed,wrap_S_dtb)
The assembly file is compiled into an object file (testcases.dtb.o), and is
The assembly file is compiled into an object file (testcases.dtbo.o), and is
linked into the kernel image.

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