mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'spi-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"There's some quite exciting core work in this release, we've got the
beginnings of support for hardware initiated transfers which is itself
independently useful for optimising fast paths in existing drivers.
We also have a rework of the DMA mapping which allows finer grained
decisions about DMA mapping messages and also helps remove some bodges
that we'd had.
Otherwise it's a fairly quiet release, a few new drivers and features
for existing drivers, together with various cleanups and DT binding
conversions.
One regmap SPI fix made it's way in here too which I should probably
have sent as a regmap fix instead.
Summary:
- Support for pre-optimising messages, reducing the overhead for
messages that are repeatedly used (eg, reading the interrupt status
from a device). This will also be used for hardware initiated
transfers in future.
- A reworking of how DMA mapping is done, introducing a new helper
and allowing the DMA mapping decision to be done per transfer
instead of per message.
- Support for Atmel SAMA7D64, Freescale LX2160A DSPI and WCH CH341A"
* tag 'spi-v6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (72 commits)
spi: dt-bindings: at91: Add sama7d65 compatible string
spi: add ch341a usb2spi driver
spi: dt-bindings: fsl-dspi: add compatible string 'fsl,lx2160a-dspi'
spi: dt-bindings: fsl-dspi: add dmas and dma-names properties
spi: spi: Remove unnecessary ‘0’ values from status
spi: spi: Remove unnecessary ‘0’ values from rc
spi: xcomm: fix coding style
spi: xcomm: remove i2c_set_clientdata()
spi: xcomm: make use of devm_spi_alloc_host()
spi: xcomm: add gpiochip support
spi: dt-bindings: snps,dw-apb-ssi.yaml: update compatible property
spi: dt-bindings: fsl-dspi: Convert to yaml format
spi: fsl-dspi: use common proptery 'spi-cs-setup(hold)-delay-ns'
spi: axi-spi-engine: remove platform_set_drvdata()
spi: spi-fsl-lpspi: Pass pm_ptr()
spi: spi-imx: Pass pm_ptr()
spi: spi-fsl-lpspi: Switch to SYSTEM_SLEEP_PM_OPS()
spi: spi-imx: Switch to RUNTIME_PM_OPS/SYSTEM_SLEEP_PM_OPS()
spi: add EXPORT_SYMBOL_GPL(devm_spi_optimize_message)
spi: add devm_spi_optimize_message() helper
...
This commit is contained in:
Linus Torvalds
@@ -1,64 +0,0 @@
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Device tree bindings for Marvell PXA SSP ports
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Required properties:
|
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|
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- compatible: Must be one of
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mrvl,pxa25x-ssp
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mvrl,pxa25x-nssp
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mrvl,pxa27x-ssp
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mrvl,pxa3xx-ssp
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mvrl,pxa168-ssp
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mrvl,pxa910-ssp
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mrvl,ce4100-ssp
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- reg: The memory base
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- dmas: Two dma phandles, one for rx, one for tx
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- dma-names: Must be "rx", "tx"
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Example for PXA3xx:
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ssp0: ssp@41000000 {
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compatible = "mrvl,pxa3xx-ssp";
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reg = <0x41000000 0x40>;
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ssp-id = <1>;
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interrupts = <24>;
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clock-names = "pxa27x-ssp.0";
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dmas = <&dma 13
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&dma 14>;
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dma-names = "rx", "tx";
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};
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ssp1: ssp@41700000 {
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compatible = "mrvl,pxa3xx-ssp";
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reg = <0x41700000 0x40>;
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ssp-id = <2>;
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interrupts = <16>;
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clock-names = "pxa27x-ssp.1";
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dmas = <&dma 15
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&dma 16>;
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dma-names = "rx", "tx";
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};
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ssp2: ssp@41900000 {
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compatibl3 = "mrvl,pxa3xx-ssp";
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reg = <0x41900000 0x40>;
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ssp-id = <3>;
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interrupts = <0>;
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clock-names = "pxa27x-ssp.2";
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dmas = <&dma 66
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&dma 67>;
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dma-names = "rx", "tx";
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};
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ssp3: ssp@41a00000 {
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compatible = "mrvl,pxa3xx-ssp";
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reg = <0x41a00000 0x40>;
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ssp-id = <4>;
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interrupts = <13>;
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clock-names = "pxa27x-ssp.3";
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dmas = <&dma 2
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&dma 3>;
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dma-names = "rx", "tx";
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};
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@@ -23,6 +23,9 @@ properties:
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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@@ -18,10 +18,10 @@ properties:
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oneOf:
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- const: atmel,at91rm9200-spi
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- items:
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- const: microchip,sam9x60-spi
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- const: atmel,at91rm9200-spi
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- items:
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- const: microchip,sam9x7-spi
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- enum:
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- microchip,sam9x60-spi
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- microchip,sam9x7-spi
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- microchip,sama7d65-spi
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- const: atmel,at91rm9200-spi
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reg:
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@@ -1,23 +0,0 @@
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Broadcom BCM2835 SPI0 controller
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The BCM2835 contains two forms of SPI master controller, one known simply as
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SPI0, and the other known as the "Universal SPI Master"; part of the
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auxiliary block. This binding applies to the SPI0 controller.
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Required properties:
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- compatible: Should be one of "brcm,bcm2835-spi" for BCM2835/2836/2837 or
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"brcm,bcm2711-spi" for BCM2711 or "brcm,bcm7211-spi" for BCM7211.
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- reg: Should contain register location and length.
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- interrupts: Should contain interrupt.
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- clocks: The clock feeding the SPI controller.
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Example:
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spi@20204000 {
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compatible = "brcm,bcm2835-spi";
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reg = <0x7e204000 0x1000>;
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interrupts = <2 22>;
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clocks = <&clk_spi>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@@ -0,0 +1,50 @@
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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/brcm,bcm2835-spi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom BCM2835 SPI0 controller
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maintainers:
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- Florian Fainelli <florian.fainelli@broadcom.com>
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- Kanak Shilledar <kanakshilledar111@protonmail.com>
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- Stefan Wahren <wahrenst@gmx.net>
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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enum:
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- brcm,bcm2835-spi
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- brcm,bcm2711-spi
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- brcm,bcm7211-spi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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spi@20204000 {
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compatible = "brcm,bcm2835-spi";
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reg = <0x7e204000 0x1000>;
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interrupts = <2 22>;
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clocks = <&clk_spi>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@@ -0,0 +1,30 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/fsl,dspi-peripheral-props.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Peripheral-specific properties for Freescale DSPI controller
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maintainers:
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- Vladimir Oltean <olteanv@gmail.com>
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description:
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See spi-peripheral-props.yaml for more info.
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properties:
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fsl,spi-cs-sck-delay:
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deprecated: true
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description:
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Delay in nanoseconds between activating chip select and the start of
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clock signal, at the start of a transfer.
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$ref: /schemas/types.yaml#/definitions/uint32
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fsl,spi-sck-cs-delay:
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deprecated: true
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description:
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Delay in nanoseconds between stopping the clock signal and
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deactivating chip select, at the end of a transfer.
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$ref: /schemas/types.yaml#/definitions/uint32
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additionalProperties: true
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@@ -0,0 +1,116 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/fsl,dspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Freescale DSPI controller
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,vf610-dspi
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- fsl,ls1021a-v1.0-dspi
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- fsl,ls1012a-dspi
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- fsl,ls1028a-dspi
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- fsl,ls1043a-dspi
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- fsl,ls1046a-dspi
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- fsl,ls1088a-dspi
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- fsl,ls2080a-dspi
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- fsl,ls2085a-dspi
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- fsl,lx2160a-dspi
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- items:
|
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- enum:
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- fsl,ls1012a-dspi
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- fsl,ls1028a-dspi
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- fsl,ls1043a-dspi
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- fsl,ls1046a-dspi
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- fsl,ls1088a-dspi
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- const: fsl,ls1021a-v1.0-dspi
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- items:
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- const: fsl,ls2080a-dspi
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- const: fsl,ls2085a-dspi
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- items:
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- const: fsl,lx2160a-dspi
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- const: fsl,ls2085a-dspi
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reg:
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maxItems: 1
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interrupts:
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||||
maxItems: 1
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||||
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: dspi
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dmas:
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items:
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- description: DMA controller phandle and request line for TX
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- description: DMA controller phandle and request line for RX
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dma-names:
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items:
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- const: tx
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- const: rx
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spi-num-chipselects:
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$ref: /schemas/types.yaml#/definitions/uint32
|
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description:
|
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The number of the chip native chipselect signals.
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cs-gpios don't count against this number.
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big-endian: true
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bus-num:
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$ref: /schemas/types.yaml#/definitions/uint32
|
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description: SoC-specific identifier for the SPI controller.
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required:
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||||
- compatible
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- reg
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- clocks
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- clock-names
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- spi-num-chipselects
|
||||
|
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allOf:
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- $ref: spi-controller.yaml#
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unevaluatedProperties: false
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examples:
|
||||
- |
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||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/vf610-clock.h>
|
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spi@4002c000 {
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compatible = "fsl,vf610-dspi";
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reg = <0x4002c000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks VF610_CLK_DSPI0>;
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clock-names = "dspi";
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spi-num-chipselects = <5>;
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bus-num = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dspi0_1>;
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big-endian;
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|
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <16000000>;
|
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spi-cpol;
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spi-cpha;
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spi-cs-setup-delay-ns = <100>;
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spi-cs-hold-delay-ns = <50>;
|
||||
};
|
||||
};
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@@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/spi/ibm,spi-fsi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: IBM FSI-attached SPI Controller
|
||||
|
||||
maintainers:
|
||||
- Eddie James <eajames@linux.ibm.com>
|
||||
|
||||
description:
|
||||
A SPI controller found on IBM Power processors, accessed over FSI from a
|
||||
service processor. This node will always be a child node of an ibm,fsi2spi
|
||||
node.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ibm,spi-fsi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: spi-controller.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
fsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
spi@0 {
|
||||
compatible = "ibm,spi-fsi";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
size = <0x80000>;
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
spi-max-frequency = <1000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -10,12 +10,17 @@ title: PXA2xx SSP SPI Controller
|
||||
maintainers:
|
||||
- Lubomir Rintel <lkundrak@v3.sk>
|
||||
|
||||
allOf:
|
||||
- $ref: spi-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: marvell,mmp2-ssp
|
||||
enum:
|
||||
- marvell,mmp2-ssp
|
||||
- mrvl,ce4100-ssp
|
||||
- mvrl,pxa168-ssp
|
||||
- mrvl,pxa25x-ssp
|
||||
- mvrl,pxa25x-nssp
|
||||
- mrvl,pxa27x-ssp
|
||||
- mrvl,pxa3xx-ssp
|
||||
- mrvl,pxa910-ssp
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
@@ -26,6 +31,16 @@ properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
dmas:
|
||||
items:
|
||||
- description: Receive DMA
|
||||
- description: Transmit DMA
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: rx
|
||||
- const: tx
|
||||
|
||||
ready-gpios:
|
||||
description: |
|
||||
GPIO used to signal a SPI master that the FIFO is filled and we're
|
||||
@@ -41,6 +56,18 @@ required:
|
||||
dependencies:
|
||||
ready-gpios: [ spi-slave ]
|
||||
|
||||
allOf:
|
||||
- $ref: spi-controller.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: marvell,mmp2-ssp
|
||||
then:
|
||||
properties:
|
||||
dmas: false
|
||||
dma-names: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -13,9 +13,6 @@ description:
|
||||
maintainers:
|
||||
- Conor Dooley <conor.dooley@microchip.com>
|
||||
|
||||
allOf:
|
||||
- $ref: spi-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
@@ -43,6 +40,32 @@ required:
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: spi-controller.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: microchip,mpfs-spi
|
||||
then:
|
||||
properties:
|
||||
num-cs:
|
||||
default: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: microchip,mpfs-spi
|
||||
not:
|
||||
required:
|
||||
- cs-gpios
|
||||
then:
|
||||
properties:
|
||||
num-cs:
|
||||
maximum: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -88,6 +88,10 @@ properties:
|
||||
- renesas,r9a06g032-spi # RZ/N1D
|
||||
- renesas,r9a06g033-spi # RZ/N1S
|
||||
- const: renesas,rzn1-spi # RZ/N1
|
||||
- description: T-HEAD TH1520 SoC SPI Controller
|
||||
items:
|
||||
- const: thead,th1520-spi
|
||||
- const: snps,dw-apb-ssi
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
|
||||
@@ -55,6 +55,13 @@ properties:
|
||||
label:
|
||||
description: Descriptive name of the SPI controller.
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: spi
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@@ -1,65 +0,0 @@
|
||||
ARM Freescale DSPI controller
|
||||
|
||||
Required properties:
|
||||
- compatible : must be one of:
|
||||
"fsl,vf610-dspi",
|
||||
"fsl,ls1021a-v1.0-dspi",
|
||||
"fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
|
||||
"fsl,ls1028a-dspi",
|
||||
"fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
|
||||
"fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
|
||||
"fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"),
|
||||
"fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"),
|
||||
"fsl,ls2085a-dspi",
|
||||
"fsl,lx2160a-dspi",
|
||||
- reg : Offset and length of the register set for the device
|
||||
- interrupts : Should contain SPI controller interrupt
|
||||
- clocks: from common clock binding: handle to dspi clock.
|
||||
- clock-names: from common clock binding: Shall be "dspi".
|
||||
- pinctrl-0: pin control group to be used for this controller.
|
||||
- pinctrl-names: must contain a "default" entry.
|
||||
- spi-num-chipselects : the number of the chipselect signals.
|
||||
|
||||
Optional property:
|
||||
- big-endian: If present the dspi device's registers are implemented
|
||||
in big endian mode.
|
||||
- bus-num : the slave chip chipselect signal number.
|
||||
|
||||
Optional SPI slave node properties:
|
||||
- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
|
||||
select and the start of clock signal, at the start of a transfer.
|
||||
- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
|
||||
signal and deactivating chip select, at the end of a transfer.
|
||||
|
||||
Example:
|
||||
|
||||
dspi0@4002c000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,vf610-dspi";
|
||||
reg = <0x4002c000 0x1000>;
|
||||
interrupts = <0 67 0x04>;
|
||||
clocks = <&clks VF610_CLK_DSPI0>;
|
||||
clock-names = "dspi";
|
||||
spi-num-chipselects = <5>;
|
||||
bus-num = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dspi0_1>;
|
||||
big-endian;
|
||||
|
||||
sflash: at26df081a@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at26df081a";
|
||||
spi-max-frequency = <16000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
reg = <0>;
|
||||
linux,modalias = "m25p80";
|
||||
modal = "at26df081a";
|
||||
fsl,spi-cs-sck-delay = <100>;
|
||||
fsl,spi-sck-cs-delay = <50>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -122,6 +122,7 @@ properties:
|
||||
allOf:
|
||||
- $ref: arm,pl022-peripheral-props.yaml#
|
||||
- $ref: cdns,qspi-nor-peripheral-props.yaml#
|
||||
- $ref: fsl,dspi-peripheral-props.yaml#
|
||||
- $ref: samsung,spi-peripheral-props.yaml#
|
||||
- $ref: nvidia,tegra210-quad-peripheral-props.yaml#
|
||||
|
||||
|
||||
@@ -464,7 +464,10 @@ SLAVE DMA ENGINE
|
||||
SPI
|
||||
devm_spi_alloc_master()
|
||||
devm_spi_alloc_slave()
|
||||
devm_spi_optimize_message()
|
||||
devm_spi_register_controller()
|
||||
devm_spi_register_host()
|
||||
devm_spi_register_target()
|
||||
|
||||
WATCHDOG
|
||||
devm_watchdog_register_device()
|
||||
|
||||
+1
-1
@@ -8725,7 +8725,7 @@ FREESCALE DSPI DRIVER
|
||||
M: Vladimir Oltean <olteanv@gmail.com>
|
||||
L: linux-spi@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
|
||||
F: Documentation/devicetree/bindings/spi/fsl,dspi*.yaml
|
||||
F: drivers/spi/spi-fsl-dspi.c
|
||||
F: include/linux/spi/spi-fsl-dspi.h
|
||||
|
||||
|
||||
@@ -122,8 +122,7 @@ static const struct regmap_bus *regmap_get_spi_bus(struct spi_device *spi,
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
max_msg_size = spi_max_message_size(spi);
|
||||
reg_reserve_size = config->reg_bits / BITS_PER_BYTE
|
||||
+ config->pad_bits / BITS_PER_BYTE;
|
||||
reg_reserve_size = (config->reg_bits + config->pad_bits) / BITS_PER_BYTE;
|
||||
if (max_size + reg_reserve_size > max_msg_size)
|
||||
max_size -= reg_reserve_size;
|
||||
|
||||
|
||||
@@ -277,6 +277,12 @@ config SPI_CADENCE_XSPI
|
||||
device with a Cadence XSPI controller and want to access the
|
||||
Flash as an MTD device.
|
||||
|
||||
config SPI_CH341
|
||||
tristate "CH341 USB2SPI adapter"
|
||||
depends on SPI_MASTER && USB
|
||||
help
|
||||
Enables the SPI controller on the CH341a USB to serial chip
|
||||
|
||||
config SPI_CLPS711X
|
||||
tristate "CLPS711X host SPI controller"
|
||||
depends on ARCH_CLPS711X || COMPILE_TEST
|
||||
|
||||
@@ -39,6 +39,7 @@ obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o
|
||||
obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o
|
||||
obj-$(CONFIG_SPI_CADENCE_QUADSPI) += spi-cadence-quadspi.o
|
||||
obj-$(CONFIG_SPI_CADENCE_XSPI) += spi-cadence-xspi.o
|
||||
obj-$(CONFIG_SPI_CH341) += spi-ch341.o
|
||||
obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o
|
||||
obj-$(CONFIG_SPI_COLDFIRE_QSPI) += spi-coldfire-qspi.o
|
||||
obj-$(CONFIG_SPI_CS42L43) += spi-cs42l43.o
|
||||
@@ -107,7 +108,8 @@ obj-$(CONFIG_SPI_PIC32) += spi-pic32.o
|
||||
obj-$(CONFIG_SPI_PIC32_SQI) += spi-pic32-sqi.o
|
||||
obj-$(CONFIG_SPI_PL022) += spi-pl022.o
|
||||
obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx.o
|
||||
spi-pxa2xx-platform-objs := spi-pxa2xx.o spi-pxa2xx-dma.o
|
||||
obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-core.o
|
||||
spi-pxa2xx-core-y := spi-pxa2xx.o spi-pxa2xx-dma.o
|
||||
obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o
|
||||
obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o
|
||||
obj-$(CONFIG_SPI_QCOM_GENI) += spi-geni-qcom.o
|
||||
|
||||
@@ -756,8 +756,15 @@ static int __maybe_unused atmel_qspi_resume(struct device *dev)
|
||||
struct atmel_qspi *aq = spi_controller_get_devdata(ctrl);
|
||||
int ret;
|
||||
|
||||
clk_prepare(aq->pclk);
|
||||
clk_prepare(aq->qspick);
|
||||
ret = clk_prepare(aq->pclk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare(aq->qspick);
|
||||
if (ret) {
|
||||
clk_unprepare(aq->pclk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = pm_runtime_force_resume(dev);
|
||||
if (ret < 0)
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user