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arm64: dts: qcom: x1e80100: Add CCI definitions

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Add in two CCI buses.

One bus has two CCI bus master pinouts:
cci_i2c_sda0 = gpio101
cci_i2c_scl0 = gpio102

cci_i2c_sda1 = gpio103
cci_i2c_scl1 = gpio104

The second bus has two CCI bus master pinouts:
cci_i2c_sda2 = gpio105
cci_i2c_scl2 = gpio106

aon_cci_i2c_sda3 = gpio235
aon_cci_i2c_scl3 = gpio236

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Daniel J Blueman <daniel@quora.org> # Lenovo Slim 7x X1E80100
Link: https://patch.msgid.link/20260708-x1e-camss-csi2-phy-dtsi-v4-2-572348ad1b2a@linaro.org
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
This commit is contained in:
Bryan O'Donoghue
2026-08-03 12:45:53 +03:00
committed by Abel Vesa
parent 30741146a0
commit dec1b7c130
1 changed files with 150 additions and 0 deletions
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arch/arm64/boot/dts/qcom/hamoa.dtsi
+150
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@@ -5551,6 +5551,84 @@
#power-domain-cells = <1>;
};
cci0: cci@ac15000 {
compatible = "qcom,x1e80100-cci", "qcom,msm8996-cci";
reg = <0 0x0ac15000 0 0x1000>;
interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
<&camcc CAM_CC_CPAS_AHB_CLK>,
<&camcc CAM_CC_CCI_0_CLK>;
clock-names = "camnoc_axi",
"cpas_ahb",
"cci";
power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
pinctrl-0 = <&cci0_default>;
pinctrl-1 = <&cci0_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci0_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci0_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
cci1: cci@ac16000 {
compatible = "qcom,x1e80100-cci", "qcom,msm8996-cci";
reg = <0 0x0ac16000 0 0x1000>;
interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>;
clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
<&camcc CAM_CC_CPAS_AHB_CLK>,
<&camcc CAM_CC_CCI_1_CLK>;
clock-names = "camnoc_axi",
"cpas_ahb",
"cci";
power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
pinctrl-0 = <&cci1_default>;
pinctrl-1 = <&cci1_sleep>;
pinctrl-names = "default", "sleep";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
cci1_i2c0: i2c-bus@0 {
reg = <0>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
cci1_i2c1: i2c-bus@1 {
reg = <1>;
clock-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
camcc: clock-controller@ade0000 {
compatible = "qcom,x1e80100-camcc";
reg = <0 0x0ade0000 0 0x20000>;
@@ -6148,6 +6226,78 @@
gpio-ranges = <&tlmm 0 0 239>;
wakeup-parent = <&pdc>;
cci0_default: cci0-default-state {
cci0_i2c0_default: cci0-i2c0-default-pins {
/* cci_i2c_sda0, cci_i2c_scl0 */
pins = "gpio101", "gpio102";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci0_i2c1_default: cci0-i2c1-default-pins {
/* cci_i2c_sda1, cci_i2c_scl1 */
pins = "gpio103", "gpio104";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
};
cci0_sleep: cci0-sleep-state {
cci0_i2c0_sleep: cci0-i2c0-sleep-pins {
/* cci_i2c_sda0, cci_i2c_scl0 */
pins = "gpio101", "gpio102";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci0_i2c1_sleep: cci0-i2c1-sleep-pins {
/* cci_i2c_sda1, cci_i2c_scl1 */
pins = "gpio103", "gpio104";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
};
cci1_default: cci1-default-state {
cci1_i2c0_default: cci1-i2c0-default-pins {
/* cci_i2c_sda2, cci_i2c_scl2 */
pins = "gpio105", "gpio106";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-up;
};
cci1_i2c1_default: cci1-i2c1-default-pins {
/* aon_cci_i2c_sda3, aon_cci_i2c_scl3 */
pins = "gpio235", "gpio236";
function = "aon_cci";
drive-strength = <2>;
bias-pull-up;
};
};
cci1_sleep: cci1-sleep-state {
cci1_i2c0_sleep: cci1-i2c0-sleep-pins {
/* cci_i2c_sda2, cci_i2c_scl2 */
pins = "gpio105", "gpio106";
function = "cci_i2c";
drive-strength = <2>;
bias-pull-down;
};
cci1_i2c1_sleep: cci1-i2c1-sleep-pins {
/* aon_cci_i2c_sda3, aon_cci_i2c_scl3 */
pins = "gpio235", "gpio236";
function = "aon_cci";
drive-strength = <2>;
bias-pull-down;
};
};
edp0_hpd_default: edp0-hpd-default-state {
pins = "gpio119";
function = "edp0_hot";