mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul: "As usual a couple of new drivers, a bunch of new device support and few updates to existing drivers New Support: - Starfive dphy rx, JH7110 usb and pcie support - Rockchip rv1126 inno-dsi phy, rk3588 usb and pcie support - Qualcomm sa8775p PCIe support, M31 USB PHY driver - Samsung Exynos850 usb support Updates: - Mediatek dsi driver clock updates - Qualcomm sm8150 combo phy with reworking of qmp pcie driver - Xilinx zynqmp runtime PM support" * tag 'phy-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (83 commits) phy: exynos5-usbdrd: Add Exynos850 support phy: exynos5-usbdrd: Add 26MHz ref clk support phy: exynos5-usbdrd: Make it possible to pass custom phy ops dt-bindings: phy: samsung,usb3-drd-phy: Add Exynos850 support phy: qcom-qmp-combo: fix clock probing phy: qcom-qmp-pcie: support SM8150 PCIe QMP PHYs phy: qcom-qmp-pcie: populate offsets configuration phy: qcom-qmp-pcie: simplify clock handling phy: qcom-qmp-pcie: keep offset tables sorted phy: qcom-qmp-pcie: drop ln_shrd from v5_20 config dt-bindings: phy: qcom,qmp-pcie: describe SM8150 PCIe PHYs dt-bindings: phy: migrate QMP PCIe PHY bindings to qcom,sc8280xp-qmp-pcie-phy.yaml phy: fsl-imx8mq-usb: add dev_err_probe if getting vbus failed phy: qcom: Introduce M31 USB PHY driver dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy phy: rockchip: inno-dsidphy: Add rv1126 support dt-bindings: phy: rockchip-inno-dsidphy: Document rv1126 dt-bindings: phy: mediatek,tphy: allow simple nodename pattern phy: amlogic: meson-g12a-usb2: fix Wvoid-pointer-to-enum-cast warning phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warning ...
This commit is contained in:
Linus Torvalds
@@ -64,7 +64,7 @@ description: |
|
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|
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properties:
|
||||
$nodename:
|
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pattern: "^t-phy@[0-9a-f]+$"
|
||||
pattern: "^t-phy(@[0-9a-f]+)?$"
|
||||
|
||||
compatible:
|
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oneOf:
|
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|
||||
@@ -0,0 +1,59 @@
|
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
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%YAML 1.2
|
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---
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||||
$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: M31 USB PHY
|
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|
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maintainers:
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- Sricharan Ramabadhran <quic_srichara@quicinc.com>
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- Varadarajan Narayanan <quic_varada@quicinc.com>
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description:
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USB M31 PHY (https://www.m31tech.com) found in Qualcomm
|
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IPQ5018, IPQ5332 SoCs.
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|
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properties:
|
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compatible:
|
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items:
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- const: qcom,ipq5332-usb-hsphy
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|
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"#phy-cells":
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const: 0
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|
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reg:
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maxItems: 1
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|
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clocks:
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maxItems: 1
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|
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clock-names:
|
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items:
|
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- const: cfg_ahb
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|
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resets:
|
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maxItems: 1
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|
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vdd-supply:
|
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description:
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Phandle to 5V regulator supply to PHY digital circuit.
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,ipq5332-gcc.h>
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usb-phy@7b000 {
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compatible = "qcom,ipq5332-usb-hsphy";
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reg = <0x0007b000 0x12c>;
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clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
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clock-names = "cfg_ahb";
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#phy-cells = <0>;
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resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
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vdd-supply = <®ulator_fixed_5p0>;
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};
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@@ -13,287 +13,79 @@ description:
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QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
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|
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Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
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qcom,sc8280xp-qmp-pcie-phy.yaml.
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properties:
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compatible:
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enum:
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- qcom,ipq6018-qmp-pcie-phy
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- qcom,ipq8074-qmp-gen3-pcie-phy
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- qcom,ipq8074-qmp-pcie-phy
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- qcom,msm8998-qmp-pcie-phy
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- qcom,sc8180x-qmp-pcie-phy
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- qcom,sdm845-qhp-pcie-phy
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- qcom,sdm845-qmp-pcie-phy
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- qcom,sdx55-qmp-pcie-phy
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- qcom,sm8250-qmp-gen3x1-pcie-phy
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- qcom,sm8250-qmp-gen3x2-pcie-phy
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- qcom,sm8250-qmp-modem-pcie-phy
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- qcom,sm8450-qmp-gen3x1-pcie-phy
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- qcom,sm8450-qmp-gen4x2-pcie-phy
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reg:
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items:
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- description: serdes
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|
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"#address-cells":
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enum: [ 1, 2 ]
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"#size-cells":
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enum: [ 1, 2 ]
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ranges: true
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clocks:
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minItems: 2
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maxItems: 4
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maxItems: 3
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|
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clock-names:
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minItems: 2
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maxItems: 4
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items:
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- const: aux
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- const: cfg_ahb
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- const: pipe
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|
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resets:
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minItems: 1
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maxItems: 2
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|
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reset-names:
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minItems: 1
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maxItems: 2
|
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items:
|
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- const: phy
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- const: common
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vdda-phy-supply: true
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"#clock-cells":
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const: 0
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vdda-pll-supply: true
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clock-output-names:
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maxItems: 1
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vddp-ref-clk-supply: true
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|
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patternProperties:
|
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"^phy@[0-9a-f]+$":
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type: object
|
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description: single PHY-provider child node
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properties:
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reg:
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minItems: 3
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maxItems: 6
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|
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clocks:
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items:
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- description: PIPE clock
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|
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clock-names:
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deprecated: true
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items:
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- const: pipe0
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|
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"#clock-cells":
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const: 0
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|
||||
clock-output-names:
|
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maxItems: 1
|
||||
|
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"#phy-cells":
|
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const: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
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- "#clock-cells"
|
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- clock-output-names
|
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- "#phy-cells"
|
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|
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additionalProperties: false
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
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- "#clock-cells"
|
||||
- clock-output-names
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8998-qmp-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
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||||
resets:
|
||||
maxItems: 2
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
required:
|
||||
- vdda-phy-supply
|
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- vdda-pll-supply
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|
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- if:
|
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properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq6018-qmp-pcie-phy
|
||||
- qcom,ipq8074-qmp-gen3-pcie-phy
|
||||
- qcom,ipq8074-qmp-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
resets:
|
||||
maxItems: 2
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
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||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8180x-qmp-pcie-phy
|
||||
- qcom,sdm845-qhp-pcie-phy
|
||||
- qcom,sdm845-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
- const: refgen
|
||||
resets:
|
||||
maxItems: 1
|
||||
reset-names:
|
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items:
|
||||
- const: phy
|
||||
required:
|
||||
- vdda-phy-supply
|
||||
- vdda-pll-supply
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8180x-qmp-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX lane 1
|
||||
- description: RX lane 1
|
||||
- description: PCS
|
||||
- description: TX lane 2
|
||||
- description: RX lane 2
|
||||
- description: PCS_MISC
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm845-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX
|
||||
- description: RX
|
||||
- description: PCS
|
||||
- description: PCS_MISC
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq6018-qmp-pcie-phy
|
||||
- qcom,ipq8074-qmp-pcie-phy
|
||||
- qcom,msm8998-qmp-pcie-phy
|
||||
- qcom,sdm845-qhp-pcie-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX
|
||||
- description: RX
|
||||
- description: PCS
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
phy-wrapper@1c0e000 {
|
||||
compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";
|
||||
reg = <0x01c0e000 0x1c0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x01c0e000 0x1000>;
|
||||
#include <dt-bindings/clock/qcom,gcc-ipq6018.h>
|
||||
#include <dt-bindings/reset/qcom,gcc-ipq6018.h>
|
||||
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_WIGIG_CLKREF_EN>,
|
||||
<&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "ref", "refgen";
|
||||
phy@84000 {
|
||||
compatible = "qcom,ipq6018-qmp-pcie-phy";
|
||||
reg = <0x0 0x00084000 0x0 0x1000>;
|
||||
|
||||
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
|
||||
reset-names = "phy";
|
||||
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
|
||||
<&gcc GCC_PCIE0_AHB_CLK>,
|
||||
<&gcc GCC_PCIE0_PIPE_CLK>;
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"pipe";
|
||||
|
||||
vdda-phy-supply = <&vreg_l10c_0p88>;
|
||||
vdda-pll-supply = <&vreg_l6b_1p2>;
|
||||
clock-output-names = "gcc_pcie0_pipe_clk_src";
|
||||
#clock-cells = <0>;
|
||||
|
||||
phy@200 {
|
||||
reg = <0x200 0x170>,
|
||||
<0x400 0x200>,
|
||||
<0xa00 0x1f0>,
|
||||
<0x600 0x170>,
|
||||
<0x800 0x200>,
|
||||
<0xe00 0xf4>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
|
||||
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "pcie_1_pipe_clk";
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
resets = <&gcc GCC_PCIE0_PHY_BCR>,
|
||||
<&gcc GCC_PCIE0PHY_PHY_BCR>;
|
||||
reset-names = "phy",
|
||||
"common";
|
||||
};
|
||||
|
||||
@@ -1,228 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QMP PHY controller (UFS, MSM8996)
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
description:
|
||||
QMP PHY controller supports physical layer functionality for a number of
|
||||
controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
|
||||
|
||||
Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
|
||||
qcom,sc8280xp-qmp-ufs-phy.yaml.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,msm8996-qmp-ufs-phy
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sm6115-qmp-ufs-phy
|
||||
- qcom,sm6350-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: serdes
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: ufsphy
|
||||
|
||||
vdda-phy-supply: true
|
||||
|
||||
vdda-pll-supply: true
|
||||
|
||||
vddp-ref-clk-supply: true
|
||||
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
type: object
|
||||
description: single PHY-provider child node
|
||||
properties:
|
||||
reg:
|
||||
minItems: 3
|
||||
maxItems: 6
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- vdda-phy-supply
|
||||
- vdda-pll-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sm6115-qmp-ufs-phy
|
||||
- qcom,sm6350-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
- const: ref_aux
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
- const: ref_aux
|
||||
- const: qref
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sm6350-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX lane 1
|
||||
- description: RX lane 1
|
||||
- description: PCS
|
||||
- description: TX lane 2
|
||||
- description: RX lane 2
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-qmp-ufs-phy
|
||||
- qcom,sm6115-qmp-ufs-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX
|
||||
- description: RX
|
||||
- description: PCS
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sm8250.h>
|
||||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
|
||||
phy-wrapper@1d87000 {
|
||||
compatible = "qcom,sm8250-qmp-ufs-phy";
|
||||
reg = <0x01d87000 0x1c0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x01d87000 0x1000>;
|
||||
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
|
||||
clock-names = "ref", "ref_aux";
|
||||
|
||||
resets = <&ufs_mem_hc 0>;
|
||||
reset-names = "ufsphy";
|
||||
|
||||
vdda-phy-supply = <&vreg_l6b>;
|
||||
vdda-pll-supply = <&vreg_l3b>;
|
||||
|
||||
phy@400 {
|
||||
reg = <0x400 0x108>,
|
||||
<0x600 0x1e0>,
|
||||
<0xc00 0x1dc>,
|
||||
<0x800 0x108>,
|
||||
<0xa00 0x1e0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
@@ -23,25 +23,16 @@ properties:
|
||||
- qcom,ipq8074-qmp-usb3-phy
|
||||
- qcom,msm8996-qmp-usb3-phy
|
||||
- qcom,msm8998-qmp-usb3-phy
|
||||
- qcom,sc7180-qmp-usb3-phy
|
||||
- qcom,sc8180x-qmp-usb3-phy
|
||||
- qcom,sdm845-qmp-usb3-phy
|
||||
- qcom,sdm845-qmp-usb3-uni-phy
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
- qcom,sdx65-qmp-usb3-uni-phy
|
||||
- qcom,sm8150-qmp-usb3-phy
|
||||
- qcom,sm8150-qmp-usb3-uni-phy
|
||||
- qcom,sm8250-qmp-usb3-phy
|
||||
- qcom,sm8250-qmp-usb3-uni-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
- qcom,sm8450-qmp-usb3-phy
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: serdes
|
||||
- description: DP_COM
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
@@ -126,28 +117,6 @@ required:
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc7180-qmp-usb3-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
- const: com_aux
|
||||
resets:
|
||||
maxItems: 1
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@@ -202,7 +171,6 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8150-qmp-usb3-phy
|
||||
- qcom,sm8150-qmp-usb3-uni-phy
|
||||
- qcom,sm8250-qmp-usb3-uni-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
@@ -223,51 +191,6 @@ allOf:
|
||||
- const: phy
|
||||
- const: common
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8250-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref_clk_src
|
||||
- const: com_aux
|
||||
resets:
|
||||
maxItems: 2
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm845-qmp-usb3-phy
|
||||
- qcom,sm8150-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
- qcom,sm8450-qmp-usb3-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: TX lane 1
|
||||
- description: RX lane 1
|
||||
- description: PCS
|
||||
- description: TX lane 2
|
||||
- description: RX lane 2
|
||||
- description: PCS_MISC
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@@ -293,12 +216,9 @@ allOf:
|
||||
enum:
|
||||
- qcom,ipq6018-qmp-usb3-phy
|
||||
- qcom,ipq8074-qmp-usb3-phy
|
||||
- qcom,sc7180-qmp-usb3-phy
|
||||
- qcom,sc8180x-qmp-usb3-phy
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
- qcom,sdx65-qmp-usb3-uni-phy
|
||||
- qcom,sm8150-qmp-usb3-uni-phy
|
||||
- qcom,sm8250-qmp-usb3-phy
|
||||
then:
|
||||
patternProperties:
|
||||
"^phy@[0-9a-f]+$":
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-pcie-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QMP PHY controller (PCIe, MSM8998)
|
||||
|
||||
maintainers:
|
||||
- Vinod Koul <vkoul@kernel.org>
|
||||
|
||||
description:
|
||||
The QMP PHY controller supports physical layer functionality for a number of
|
||||
controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,msm8998-qmp-pcie-phy
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: serdes
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
- const: pipe
|
||||
|
||||
resets:
|
||||
maxItems: 2
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
|
||||
vdda-phy-supply: true
|
||||
|
||||
vdda-pll-supply: true
|
||||
|
||||
"#clock-cells":
|
||||
const: 0
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- vdda-phy-supply
|
||||
- vdda-pll-supply
|
||||
- "#clock-cells"
|
||||
- clock-output-names
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8998.h>
|
||||
|
||||
phy@1c18000 {
|
||||
compatible = "qcom,msm8998-qmp-pcie-phy";
|
||||
reg = <0x01c06000 0x1000>;
|
||||
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_CLKREF_CLK>,
|
||||
<&gcc GCC_PCIE_0_PIPE_CLK>;
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"ref",
|
||||
"pipe";
|
||||
|
||||
clock-output-names = "pcie_0_pipe_clk_src";
|
||||
#clock-cells = <0>;
|
||||
|
||||
#phy-cells = <0>;
|
||||
|
||||
resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
|
||||
reset-names = "phy", "common";
|
||||
|
||||
vdda-phy-supply = <&vreg_l1a_0p875>;
|
||||
vdda-pll-supply = <&vreg_l2a_1p2>;
|
||||
};
|
||||
@@ -1,282 +0,0 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QMP USB3 DP PHY controller (SC7180)
|
||||
|
||||
description:
|
||||
The QMP PHY controller supports physical layer functionality for a number of
|
||||
controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
|
||||
|
||||
Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
|
||||
qcom,sc8280xp-qmp-usb43dp-phy.yaml.
|
||||
|
||||
maintainers:
|
||||
- Wesley Cheng <quic_wcheng@quicinc.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- qcom,sc7180-qmp-usb3-dp-phy
|
||||
- qcom,sc8180x-qmp-usb3-dp-phy
|
||||
- qcom,sdm845-qmp-usb3-dp-phy
|
||||
- qcom,sm8250-qmp-usb3-dp-phy
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sc7280-qmp-usb3-dp-phy
|
||||
- const: qcom,sm8250-qmp-usb3-dp-phy
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Address and length of PHY's USB serdes block.
|
||||
- description: Address and length of the DP_COM control block.
|
||||
- description: Address and length of PHY's DP serdes block.
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: usb
|
||||
- const: dp_com
|
||||
- const: dp
|
||||
|
||||
"#address-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
"#size-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
ranges: true
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
orientation-switch:
|
||||
description: Flag the port as possible handler of orientation switching
|
||||
type: boolean
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: reset of phy block.
|
||||
- description: phy common block reset.
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
|
||||
vdda-phy-supply:
|
||||
description:
|
||||
Phandle to a regulator supply to PHY core block.
|
||||
|
||||
vdda-pll-supply:
|
||||
description:
|
||||
Phandle to 1.8V regulator supply to PHY refclk pll block.
|
||||
|
||||
vddp-ref-clk-supply:
|
||||
description:
|
||||
Phandle to a regulator supply to any specific refclk pll block.
|
||||
|
||||
# Required nodes:
|
||||
patternProperties:
|
||||
"^usb3-phy@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description:
|
||||
The USB3 PHY.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: Address and length of TX.
|
||||
- description: Address and length of RX.
|
||||
- description: Address and length of PCS.
|
||||
- description: Address and length of TX2.
|
||||
- description: Address and length of RX2.
|
||||
- description: Address and length of pcs_misc.
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: pipe clock
|
||||
|
||||
clock-names:
|
||||
deprecated: true
|
||||
items:
|
||||
- const: pipe0
|
||||
|
||||
clock-output-names:
|
||||
items:
|
||||
- const: usb3_phy_pipe_clk_src
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
'#phy-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
- '#phy-cells'
|
||||
|
||||
"^dp-phy@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
description:
|
||||
The DP PHY.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: Address and length of TX.
|
||||
- description: Address and length of RX.
|
||||
- description: Address and length of PCS.
|
||||
- description: Address and length of TX2.
|
||||
- description: Address and length of RX2.
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#phy-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- '#phy-cells'
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- vdda-phy-supply
|
||||
- vdda-pll-supply
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-qmp-usb3-dp-phy
|
||||
- qcom,sdm845-qmp-usb3-dp-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock
|
||||
- description: Phy config clock
|
||||
- description: 19.2 MHz ref clk
|
||||
- description: Phy common block aux clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
- const: com_aux
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8180x-qmp-usb3-dp-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock
|
||||
- description: 19.2 MHz ref clk
|
||||
- description: Phy common block aux clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref
|
||||
- const: com_aux
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8250-qmp-usb3-dp-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock
|
||||
- description: Board XO source
|
||||
- description: Phy common block aux clock
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref_clk_src
|
||||
- const: com_aux
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
||||
usb_1_qmpphy: phy-wrapper@88e9000 {
|
||||
compatible = "qcom,sdm845-qmp-usb3-dp-phy";
|
||||
reg = <0x088e9000 0x18c>,
|
||||
<0x088e8000 0x10>,
|
||||
<0x088ea000 0x40>;
|
||||
reg-names = "usb", "dp_com", "dp";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x088e9000 0x2000>;
|
||||
|
||||
clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
|
||||
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
|
||||
<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
|
||||
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "ref", "com_aux";
|
||||
|
||||
resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
|
||||
<&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
|
||||
reset-names = "phy", "common";
|
||||
|
||||
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
|
||||
vdda-pll-supply = <&vdda_usb2_ss_core>;
|
||||
|
||||
orientation-switch;
|
||||
|
||||
usb3-phy@200 {
|
||||
reg = <0x200 0x128>,
|
||||
<0x400 0x200>,
|
||||
<0xc00 0x218>,
|
||||
<0x600 0x128>,
|
||||
<0x800 0x200>,
|
||||
<0xa00 0x100>;
|
||||
#clock-cells = <0>;
|
||||
#phy-cells = <0>;
|
||||
clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
|
||||
clock-output-names = "usb3_phy_pipe_clk_src";
|
||||
};
|
||||
|
||||
dp-phy@88ea200 {
|
||||
reg = <0xa200 0x200>,
|
||||
<0xa400 0x200>,
|
||||
<0xaa00 0x200>,
|
||||
<0xa600 0x200>,
|
||||
<0xa800 0x200>;
|
||||
#clock-cells = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
@@ -16,11 +16,24 @@ description:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sa8775p-qmp-gen4x2-pcie-phy
|
||||
- qcom,sa8775p-qmp-gen4x4-pcie-phy
|
||||
- qcom,sc8180x-qmp-pcie-phy
|
||||
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
|
||||
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
|
||||
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
|
||||
- qcom,sdm845-qhp-pcie-phy
|
||||
- qcom,sdm845-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sdx65-qmp-gen4x2-pcie-phy
|
||||
- qcom,sm8150-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8150-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8350-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
- qcom,sm8550-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8550-qmp-gen4x2-pcie-phy
|
||||
|
||||
@@ -30,7 +43,7 @@ properties:
|
||||
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 5
|
||||
@@ -38,9 +51,10 @@ properties:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
- const: rchng
|
||||
- enum: [rchng, refgen]
|
||||
- const: pipe
|
||||
- const: pipediv2
|
||||
- const: phy_aux
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
@@ -84,7 +98,6 @@ required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- resets
|
||||
- reset-names
|
||||
- vdda-phy-supply
|
||||
@@ -120,7 +133,18 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8180x-qmp-pcie-phy
|
||||
- qcom,sdm845-qhp-pcie-phy
|
||||
- qcom,sdm845-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sm8150-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8150-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8350-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8550-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8550-qmp-gen4x2-pcie-phy
|
||||
then:
|
||||
@@ -129,13 +153,36 @@ allOf:
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
maxItems: 5
|
||||
else:
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
|
||||
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
|
||||
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 6
|
||||
clock-names:
|
||||
minItems: 6
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sa8775p-qmp-gen4x2-pcie-phy
|
||||
- qcom,sa8775p-qmp-gen4x4-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 7
|
||||
clock-names:
|
||||
minItems: 7
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@@ -16,21 +16,31 @@ description:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,msm8996-qmp-ufs-phy
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,sa8775p-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sc8280xp-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sm6115-qmp-ufs-phy
|
||||
- qcom,sm6125-qmp-ufs-phy
|
||||
- qcom,sm6350-qmp-ufs-phy
|
||||
- qcom,sm7150-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
- qcom,sm8550-qmp-ufs-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
minItems: 1
|
||||
items:
|
||||
- const: ref
|
||||
- const: ref_aux
|
||||
@@ -75,19 +85,51 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sa8775p-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
clock-names:
|
||||
minItems: 3
|
||||
else:
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sc8280xp-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sm6115-qmp-ufs-phy
|
||||
- qcom,sm6125-qmp-ufs-phy
|
||||
- qcom,sm6350-qmp-ufs-phy
|
||||
- qcom,sm7150-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8550-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
maxItems: 2
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-qmp-ufs-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -16,8 +16,14 @@ description:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-qmp-usb3-dp-phy
|
||||
- qcom,sc7280-qmp-usb3-dp-phy
|
||||
- qcom,sc8180x-qmp-usb3-dp-phy
|
||||
- qcom,sc8280xp-qmp-usb43dp-phy
|
||||
- qcom,sdm845-qmp-usb3-dp-phy
|
||||
- qcom,sm6350-qmp-usb3-dp-phy
|
||||
- qcom,sm8150-qmp-usb3-dp-phy
|
||||
- qcom,sm8250-qmp-usb3-dp-phy
|
||||
- qcom,sm8350-qmp-usb3-dp-phy
|
||||
- qcom,sm8450-qmp-usb3-dp-phy
|
||||
- qcom,sm8550-qmp-usb3-dp-phy
|
||||
@@ -26,14 +32,17 @@ properties:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
minItems: 4
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
minItems: 4
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref
|
||||
- const: com_aux
|
||||
- const: usb3_pipe
|
||||
- const: cfg_ahb
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
@@ -85,7 +94,6 @@ required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- resets
|
||||
- reset-names
|
||||
- vdda-phy-supply
|
||||
@@ -93,6 +101,40 @@ required:
|
||||
- "#clock-cells"
|
||||
- "#phy-cells"
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-qmp-usb3-dp-phy
|
||||
- qcom,sdm845-qmp-usb3-dp-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
maxItems: 5
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
maxItems: 4
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8280xp-qmp-usb43dp-phy
|
||||
- qcom,sm6350-qmp-usb3-dp-phy
|
||||
- qcom,sm8550-qmp-usb3-dp-phy
|
||||
then:
|
||||
required:
|
||||
- power-domains
|
||||
else:
|
||||
properties:
|
||||
power-domains: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -15,7 +15,12 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,pm8550b-eusb2-repeater
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,pm7550ba-eusb2-repeater
|
||||
- const: qcom,pm8550b-eusb2-repeater
|
||||
- const: qcom,pm8550b-eusb2-repeater
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -20,6 +20,7 @@ properties:
|
||||
- rockchip,rk3366-usb2phy
|
||||
- rockchip,rk3399-usb2phy
|
||||
- rockchip,rk3568-usb2phy
|
||||
- rockchip,rk3588-usb2phy
|
||||
- rockchip,rv1108-usb2phy
|
||||
|
||||
reg:
|
||||
@@ -56,6 +57,14 @@ properties:
|
||||
description: Muxed interrupt for both ports
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 2
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: apb
|
||||
|
||||
rockchip,usbgrf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
@@ -120,15 +129,21 @@ required:
|
||||
- reg
|
||||
- clock-output-names
|
||||
- "#clock-cells"
|
||||
- host-port
|
||||
- otg-port
|
||||
|
||||
anyOf:
|
||||
- required:
|
||||
- otg-port
|
||||
- required:
|
||||
- host-port
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: rockchip,rk3568-usb2phy
|
||||
enum:
|
||||
- rockchip,rk3568-usb2phy
|
||||
- rockchip,rk3588-usb2phy
|
||||
|
||||
then:
|
||||
properties:
|
||||
|
||||
@@ -13,19 +13,18 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- rockchip,rk3568-pcie3-phy
|
||||
- rockchip,rk3588-pcie3-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: refclk_m
|
||||
- const: refclk_n
|
||||
- const: pclk
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
data-lanes:
|
||||
description: which lanes (by position) should be mapped to which
|
||||
@@ -61,6 +60,30 @@ required:
|
||||
- rockchip,phy-grf
|
||||
- "#phy-cells"
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- rockchip,rk3588-pcie3-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
items:
|
||||
- const: pclk
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: refclk_m
|
||||
- const: refclk_n
|
||||
- const: pclk
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -19,6 +19,7 @@ properties:
|
||||
- rockchip,rk3128-dsi-dphy
|
||||
- rockchip,rk3368-dsi-dphy
|
||||
- rockchip,rk3568-dsi-dphy
|
||||
- rockchip,rv1126-dsi-dphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -29,6 +29,7 @@ properties:
|
||||
- samsung,exynos5420-usbdrd-phy
|
||||
- samsung,exynos5433-usbdrd-phy
|
||||
- samsung,exynos7-usbdrd-phy
|
||||
- samsung,exynos850-usbdrd-phy
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
|
||||
@@ -0,0 +1,71 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: StarFive SoC JH7110 MIPI D-PHY Rx Controller
|
||||
|
||||
maintainers:
|
||||
- Jack Zhu <jack.zhu@starfivetech.com>
|
||||
- Changhuang Liang <changhuang.liang@starfivetech.com>
|
||||
|
||||
description:
|
||||
StarFive SoCs contain a MIPI CSI D-PHY based on M31 IP, used to
|
||||
transfer CSI camera data.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-dphy-rx
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: config clock
|
||||
- description: reference clock
|
||||
- description: escape mode transmit clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg
|
||||
- const: ref
|
||||
- const: tx
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: DPHY_HW reset
|
||||
- description: DPHY_B09_ALWAYS_ON reset
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- power-domains
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
phy@19820000 {
|
||||
compatible = "starfive,jh7110-dphy-rx";
|
||||
reg = <0x19820000 0x10000>;
|
||||
clocks = <&ispcrg 3>,
|
||||
<&ispcrg 4>,
|
||||
<&ispcrg 5>;
|
||||
clock-names = "cfg", "ref", "tx";
|
||||
resets = <&ispcrg 2>,
|
||||
<&ispcrg 3>;
|
||||
power-domains = <&aon_syscon 1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
@@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/starfive,jh7110-pcie-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: StarFive JH7110 PCIe 2.0 PHY
|
||||
|
||||
maintainers:
|
||||
- Minda Chen <minda.chen@starfivetech.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-pcie-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
starfive,sys-syscon:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: phandle to System Register Controller sys_syscon node.
|
||||
- description: PHY connect offset of SYS_SYSCONSAIF__SYSCFG register for USB PHY.
|
||||
description:
|
||||
The phandle to System Register Controller syscon node and the PHY connect offset
|
||||
of SYS_SYSCONSAIF__SYSCFG register. Connect PHY to USB3 controller.
|
||||
|
||||
starfive,stg-syscon:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: phandle to System Register Controller stg_syscon node.
|
||||
- description: PHY mode offset of STG_SYSCONSAIF__SYSCFG register.
|
||||
- description: PHY enable for USB offset of STG_SYSCONSAIF__SYSCFG register.
|
||||
description:
|
||||
The phandle to System Register Controller syscon node and the offset
|
||||
of STG_SYSCONSAIF__SYSCFG register for PCIe PHY. Total 2 regsisters offset.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
phy@10210000 {
|
||||
compatible = "starfive,jh7110-pcie-phy";
|
||||
reg = <0x10210000 0x10000>;
|
||||
#phy-cells = <0>;
|
||||
starfive,sys-syscon = <&sys_syscon 0x18>;
|
||||
starfive,stg-syscon = <&stg_syscon 0x148 0x1f4>;
|
||||
};
|
||||
@@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/starfive,jh7110-usb-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: StarFive JH7110 USB 2.0 PHY
|
||||
|
||||
maintainers:
|
||||
- Minda Chen <minda.chen@starfivetech.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-usb-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: PHY 125m
|
||||
- description: app 125m
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: 125m
|
||||
- const: app_125m
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
phy@10200000 {
|
||||
compatible = "starfive,jh7110-usb-phy";
|
||||
reg = <0x10200000 0x10000>;
|
||||
clocks = <&syscrg 95>,
|
||||
<&stgcrg 6>;
|
||||
clock-names = "125m", "app_125m";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
+15
@@ -20419,6 +20419,13 @@ S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
|
||||
F: drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
|
||||
|
||||
STARFIVE JH7110 DPHY RX DRIVER
|
||||
M: Jack Zhu <jack.zhu@starfivetech.com>
|
||||
M: Changhuang Liang <changhuang.liang@starfivetech.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
|
||||
F: drivers/phy/starfive/phy-jh7110-dphy-rx.c
|
||||
|
||||
STARFIVE JH7110 MMC/SD/SDIO DRIVER
|
||||
M: William Qiu <william.qiu@starfivetech.com>
|
||||
S: Supported
|
||||
@@ -20502,6 +20509,14 @@ S: Supported
|
||||
F: Documentation/devicetree/bindings/watchdog/starfive*
|
||||
F: drivers/watchdog/starfive-wdt.c
|
||||
|
||||
STARFIVE JH71X0 PCIE AND USB PHY DRIVER
|
||||
M: Minda Chen <minda.chen@starfivetech.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
|
||||
F: Documentation/devicetree/bindings/phy/starfive,jh7110-usb-phy.yaml
|
||||
F: drivers/phy/starfive/phy-jh7110-pcie.c
|
||||
F: drivers/phy/starfive/phy-jh7110-usb.c
|
||||
|
||||
STATIC BRANCH/CALL
|
||||
M: Peter Zijlstra <peterz@infradead.org>
|
||||
M: Josh Poimboeuf <jpoimboe@kernel.org>
|
||||
|
||||
@@ -93,6 +93,7 @@ source "drivers/phy/rockchip/Kconfig"
|
||||
source "drivers/phy/samsung/Kconfig"
|
||||
source "drivers/phy/socionext/Kconfig"
|
||||
source "drivers/phy/st/Kconfig"
|
||||
source "drivers/phy/starfive/Kconfig"
|
||||
source "drivers/phy/sunplus/Kconfig"
|
||||
source "drivers/phy/tegra/Kconfig"
|
||||
source "drivers/phy/ti/Kconfig"
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user