mirror of
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synced 2026-08-13 14:19:53 -07:00
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Ingo Molnar: - Make /sys/devices/cpu/rdpmc based RDPMC enforcement more instantaneous - decoder: Update the Intel opcode map - Various tooling fixes, including a few late optimizations and cleanups. * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits) perf script: Fix invalid LBR/binary mismatch error perf script: Fix brstackinsn for AUXTRACE perf affinity: Add infrastructure to save/restore affinity perf pmu: Use file system cache to optimize sysfs access perf regs: Make perf_reg_name() return "unknown" instead of NULL perf diff: Use llabs() with 64-bit values perf diff: Use llabs() with 64-bit values perf/x86: Implement immediate enforcement of /sys/devices/cpu/rdpmc value of 0 perf tools: Allow to link with libbpf dynamicaly perf tests: Rename tests/map_groups.c to tests/maps.c perf tests: Rename thread-mg-share to thread-maps-share perf maps: Rename map_groups.h to maps.h perf maps: Rename 'mg' variables to 'maps' perf map_symbol: Rename ms->mg to ms->maps perf addr_location: Rename al->mg to al->maps perf thread: Rename thread->mg to thread->maps perf maps: Merge 'struct maps' with 'struct map_groups' x86/insn: perf tools: Add some more instructions to the new instructions test x86/insn: Add some more Intel instructions to the opcode map perf map: Remove unused functions ...
This commit is contained in:
Linus Torvalds committed
commit
b7fcf31f70
68 files changed
+2248
-628
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+13
-7
@@ -49,6 +49,7 @@ DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
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.enabled = 1,
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};
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DEFINE_STATIC_KEY_FALSE(rdpmc_never_available_key);
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DEFINE_STATIC_KEY_FALSE(rdpmc_always_available_key);
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u64 __read_mostly hw_cache_event_ids
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@@ -2181,20 +2182,25 @@ static ssize_t set_attr_rdpmc(struct device *cdev,
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if (x86_pmu.attr_rdpmc_broken)
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return -ENOTSUPP;
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if ((val == 2) != (x86_pmu.attr_rdpmc == 2)) {
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if (val != x86_pmu.attr_rdpmc) {
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/*
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* Changing into or out of always available, aka
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* perf-event-bypassing mode. This path is extremely slow,
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* Changing into or out of never available or always available,
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* aka perf-event-bypassing mode. This path is extremely slow,
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* but only root can trigger it, so it's okay.
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*/
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if (val == 0)
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static_branch_inc(&rdpmc_never_available_key);
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else if (x86_pmu.attr_rdpmc == 0)
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static_branch_dec(&rdpmc_never_available_key);
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if (val == 2)
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static_branch_inc(&rdpmc_always_available_key);
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else
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else if (x86_pmu.attr_rdpmc == 2)
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static_branch_dec(&rdpmc_always_available_key);
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on_each_cpu(refresh_pce, NULL, 1);
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}
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x86_pmu.attr_rdpmc = val;
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on_each_cpu(refresh_pce, NULL, 1);
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x86_pmu.attr_rdpmc = val;
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}
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return count;
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}
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@@ -26,12 +26,14 @@ static inline void paravirt_activate_mm(struct mm_struct *prev,
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#ifdef CONFIG_PERF_EVENTS
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DECLARE_STATIC_KEY_FALSE(rdpmc_never_available_key);
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DECLARE_STATIC_KEY_FALSE(rdpmc_always_available_key);
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static inline void load_mm_cr4_irqsoff(struct mm_struct *mm)
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{
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if (static_branch_unlikely(&rdpmc_always_available_key) ||
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atomic_read(&mm->context.perf_rdpmc_allowed))
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(!static_branch_unlikely(&rdpmc_never_available_key) &&
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atomic_read(&mm->context.perf_rdpmc_allowed)))
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cr4_set_bits_irqsoff(X86_CR4_PCE);
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else
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cr4_clear_bits_irqsoff(X86_CR4_PCE);
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@@ -695,16 +695,28 @@ AVXcode: 2
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4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev)
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4e: vrsqrt14ps/d Vpd,Wpd (66),(ev)
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4f: vrsqrt14ss/d Vsd,Hsd,Wsd (66),(ev)
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# Skip 0x50-0x57
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50: vpdpbusd Vx,Hx,Wx (66),(ev)
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51: vpdpbusds Vx,Hx,Wx (66),(ev)
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52: vdpbf16ps Vx,Hx,Wx (F3),(ev) | vpdpwssd Vx,Hx,Wx (66),(ev) | vp4dpwssd Vdqq,Hdqq,Wdq (F2),(ev)
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53: vpdpwssds Vx,Hx,Wx (66),(ev) | vp4dpwssds Vdqq,Hdqq,Wdq (F2),(ev)
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54: vpopcntb/w Vx,Wx (66),(ev)
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55: vpopcntd/q Vx,Wx (66),(ev)
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58: vpbroadcastd Vx,Wx (66),(v)
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59: vpbroadcastq Vx,Wx (66),(v) | vbroadcasti32x2 Vx,Wx (66),(evo)
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5a: vbroadcasti128 Vqq,Mdq (66),(v) | vbroadcasti32x4/64x2 Vx,Wx (66),(evo)
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5b: vbroadcasti32x8/64x4 Vqq,Mdq (66),(ev)
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# Skip 0x5c-0x63
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# Skip 0x5c-0x61
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62: vpexpandb/w Vx,Wx (66),(ev)
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63: vpcompressb/w Wx,Vx (66),(ev)
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64: vpblendmd/q Vx,Hx,Wx (66),(ev)
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65: vblendmps/d Vx,Hx,Wx (66),(ev)
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66: vpblendmb/w Vx,Hx,Wx (66),(ev)
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# Skip 0x67-0x74
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68: vp2intersectd/q Kx,Hx,Wx (F2),(ev)
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# Skip 0x69-0x6f
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70: vpshldvw Vx,Hx,Wx (66),(ev)
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71: vpshldvd/q Vx,Hx,Wx (66),(ev)
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72: vcvtne2ps2bf16 Vx,Hx,Wx (F2),(ev) | vcvtneps2bf16 Vx,Wx (F3),(ev) | vpshrdvw Vx,Hx,Wx (66),(ev)
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73: vpshrdvd/q Vx,Hx,Wx (66),(ev)
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75: vpermi2b/w Vx,Hx,Wx (66),(ev)
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76: vpermi2d/q Vx,Hx,Wx (66),(ev)
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77: vpermi2ps/d Vx,Hx,Wx (66),(ev)
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@@ -727,6 +739,7 @@ AVXcode: 2
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8c: vpmaskmovd/q Vx,Hx,Mx (66),(v)
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8d: vpermb/w Vx,Hx,Wx (66),(ev)
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8e: vpmaskmovd/q Mx,Vx,Hx (66),(v)
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8f: vpshufbitqmb Kx,Hx,Wx (66),(ev)
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# 0x0f 0x38 0x90-0xbf (FMA)
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90: vgatherdd/q Vx,Hx,Wx (66),(v) | vpgatherdd/q Vx,Wx (66),(evo)
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91: vgatherqd/q Vx,Hx,Wx (66),(v) | vpgatherqd/q Vx,Wx (66),(evo)
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@@ -738,8 +751,8 @@ AVXcode: 2
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97: vfmsubadd132ps/d Vx,Hx,Wx (66),(v)
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98: vfmadd132ps/d Vx,Hx,Wx (66),(v)
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99: vfmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
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9a: vfmsub132ps/d Vx,Hx,Wx (66),(v)
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9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1)
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9a: vfmsub132ps/d Vx,Hx,Wx (66),(v) | v4fmaddps Vdqq,Hdqq,Wdq (F2),(ev)
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9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1) | v4fmaddss Vdq,Hdq,Wdq (F2),(ev)
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9c: vfnmadd132ps/d Vx,Hx,Wx (66),(v)
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9d: vfnmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
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9e: vfnmsub132ps/d Vx,Hx,Wx (66),(v)
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@@ -752,8 +765,8 @@ a6: vfmaddsub213ps/d Vx,Hx,Wx (66),(v)
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a7: vfmsubadd213ps/d Vx,Hx,Wx (66),(v)
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a8: vfmadd213ps/d Vx,Hx,Wx (66),(v)
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a9: vfmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
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aa: vfmsub213ps/d Vx,Hx,Wx (66),(v)
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ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1)
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aa: vfmsub213ps/d Vx,Hx,Wx (66),(v) | v4fnmaddps Vdqq,Hdqq,Wdq (F2),(ev)
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ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1) | v4fnmaddss Vdq,Hdq,Wdq (F2),(ev)
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ac: vfnmadd213ps/d Vx,Hx,Wx (66),(v)
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ad: vfnmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
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ae: vfnmsub213ps/d Vx,Hx,Wx (66),(v)
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@@ -780,11 +793,12 @@ ca: sha1msg2 Vdq,Wdq | vrcp28ps/d Vx,Wx (66),(ev)
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cb: sha256rnds2 Vdq,Wdq | vrcp28ss/d Vx,Hx,Wx (66),(ev)
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cc: sha256msg1 Vdq,Wdq | vrsqrt28ps/d Vx,Wx (66),(ev)
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cd: sha256msg2 Vdq,Wdq | vrsqrt28ss/d Vx,Hx,Wx (66),(ev)
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cf: vgf2p8mulb Vx,Wx (66)
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db: VAESIMC Vdq,Wdq (66),(v1)
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dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
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dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
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de: VAESDEC Vdq,Hdq,Wdq (66),(v1)
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df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1)
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dc: vaesenc Vx,Hx,Wx (66)
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dd: vaesenclast Vx,Hx,Wx (66)
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de: vaesdec Vx,Hx,Wx (66)
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df: vaesdeclast Vx,Hx,Wx (66)
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f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
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f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
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f2: ANDN Gy,By,Ey (v)
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@@ -848,7 +862,7 @@ AVXcode: 3
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41: vdppd Vdq,Hdq,Wdq,Ib (66),(v1)
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42: vmpsadbw Vx,Hx,Wx,Ib (66),(v1) | vdbpsadbw Vx,Hx,Wx,Ib (66),(evo)
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43: vshufi32x4/64x2 Vx,Hx,Wx,Ib (66),(ev)
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44: vpclmulqdq Vdq,Hdq,Wdq,Ib (66),(v1)
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44: vpclmulqdq Vx,Hx,Wx,Ib (66)
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46: vperm2i128 Vqq,Hqq,Wqq,Ib (66),(v)
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4a: vblendvps Vx,Hx,Wx,Lx (66),(v)
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4b: vblendvpd Vx,Hx,Wx,Lx (66),(v)
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@@ -865,7 +879,13 @@ AVXcode: 3
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63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
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66: vfpclassps/d Vk,Wx,Ib (66),(ev)
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67: vfpclassss/d Vk,Wx,Ib (66),(ev)
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70: vpshldw Vx,Hx,Wx,Ib (66),(ev)
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71: vpshldd/q Vx,Hx,Wx,Ib (66),(ev)
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72: vpshrdw Vx,Hx,Wx,Ib (66),(ev)
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73: vpshrdd/q Vx,Hx,Wx,Ib (66),(ev)
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cc: sha1rnds4 Vdq,Wdq,Ib
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ce: vgf2p8affineqb Vx,Wx,Ib (66)
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cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
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df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
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f0: RORX Gy,Ey,Ib (F2),(v)
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EndTable
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@@ -695,16 +695,28 @@ AVXcode: 2
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4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev)
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4e: vrsqrt14ps/d Vpd,Wpd (66),(ev)
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4f: vrsqrt14ss/d Vsd,Hsd,Wsd (66),(ev)
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# Skip 0x50-0x57
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50: vpdpbusd Vx,Hx,Wx (66),(ev)
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51: vpdpbusds Vx,Hx,Wx (66),(ev)
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52: vdpbf16ps Vx,Hx,Wx (F3),(ev) | vpdpwssd Vx,Hx,Wx (66),(ev) | vp4dpwssd Vdqq,Hdqq,Wdq (F2),(ev)
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53: vpdpwssds Vx,Hx,Wx (66),(ev) | vp4dpwssds Vdqq,Hdqq,Wdq (F2),(ev)
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54: vpopcntb/w Vx,Wx (66),(ev)
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55: vpopcntd/q Vx,Wx (66),(ev)
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58: vpbroadcastd Vx,Wx (66),(v)
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59: vpbroadcastq Vx,Wx (66),(v) | vbroadcasti32x2 Vx,Wx (66),(evo)
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5a: vbroadcasti128 Vqq,Mdq (66),(v) | vbroadcasti32x4/64x2 Vx,Wx (66),(evo)
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5b: vbroadcasti32x8/64x4 Vqq,Mdq (66),(ev)
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# Skip 0x5c-0x63
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# Skip 0x5c-0x61
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62: vpexpandb/w Vx,Wx (66),(ev)
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63: vpcompressb/w Wx,Vx (66),(ev)
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64: vpblendmd/q Vx,Hx,Wx (66),(ev)
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65: vblendmps/d Vx,Hx,Wx (66),(ev)
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66: vpblendmb/w Vx,Hx,Wx (66),(ev)
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# Skip 0x67-0x74
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68: vp2intersectd/q Kx,Hx,Wx (F2),(ev)
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# Skip 0x69-0x6f
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70: vpshldvw Vx,Hx,Wx (66),(ev)
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71: vpshldvd/q Vx,Hx,Wx (66),(ev)
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72: vcvtne2ps2bf16 Vx,Hx,Wx (F2),(ev) | vcvtneps2bf16 Vx,Wx (F3),(ev) | vpshrdvw Vx,Hx,Wx (66),(ev)
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||||
73: vpshrdvd/q Vx,Hx,Wx (66),(ev)
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||||
75: vpermi2b/w Vx,Hx,Wx (66),(ev)
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||||
76: vpermi2d/q Vx,Hx,Wx (66),(ev)
|
||||
77: vpermi2ps/d Vx,Hx,Wx (66),(ev)
|
||||
@@ -727,6 +739,7 @@ AVXcode: 2
|
||||
8c: vpmaskmovd/q Vx,Hx,Mx (66),(v)
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||||
8d: vpermb/w Vx,Hx,Wx (66),(ev)
|
||||
8e: vpmaskmovd/q Mx,Vx,Hx (66),(v)
|
||||
8f: vpshufbitqmb Kx,Hx,Wx (66),(ev)
|
||||
# 0x0f 0x38 0x90-0xbf (FMA)
|
||||
90: vgatherdd/q Vx,Hx,Wx (66),(v) | vpgatherdd/q Vx,Wx (66),(evo)
|
||||
91: vgatherqd/q Vx,Hx,Wx (66),(v) | vpgatherqd/q Vx,Wx (66),(evo)
|
||||
@@ -738,8 +751,8 @@ AVXcode: 2
|
||||
97: vfmsubadd132ps/d Vx,Hx,Wx (66),(v)
|
||||
98: vfmadd132ps/d Vx,Hx,Wx (66),(v)
|
||||
99: vfmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
9a: vfmsub132ps/d Vx,Hx,Wx (66),(v)
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||||
9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
9a: vfmsub132ps/d Vx,Hx,Wx (66),(v) | v4fmaddps Vdqq,Hdqq,Wdq (F2),(ev)
|
||||
9b: vfmsub132ss/d Vx,Hx,Wx (66),(v),(v1) | v4fmaddss Vdq,Hdq,Wdq (F2),(ev)
|
||||
9c: vfnmadd132ps/d Vx,Hx,Wx (66),(v)
|
||||
9d: vfnmadd132ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
9e: vfnmsub132ps/d Vx,Hx,Wx (66),(v)
|
||||
@@ -752,8 +765,8 @@ a6: vfmaddsub213ps/d Vx,Hx,Wx (66),(v)
|
||||
a7: vfmsubadd213ps/d Vx,Hx,Wx (66),(v)
|
||||
a8: vfmadd213ps/d Vx,Hx,Wx (66),(v)
|
||||
a9: vfmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
aa: vfmsub213ps/d Vx,Hx,Wx (66),(v)
|
||||
ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
aa: vfmsub213ps/d Vx,Hx,Wx (66),(v) | v4fnmaddps Vdqq,Hdqq,Wdq (F2),(ev)
|
||||
ab: vfmsub213ss/d Vx,Hx,Wx (66),(v),(v1) | v4fnmaddss Vdq,Hdq,Wdq (F2),(ev)
|
||||
ac: vfnmadd213ps/d Vx,Hx,Wx (66),(v)
|
||||
ad: vfnmadd213ss/d Vx,Hx,Wx (66),(v),(v1)
|
||||
ae: vfnmsub213ps/d Vx,Hx,Wx (66),(v)
|
||||
@@ -780,11 +793,12 @@ ca: sha1msg2 Vdq,Wdq | vrcp28ps/d Vx,Wx (66),(ev)
|
||||
cb: sha256rnds2 Vdq,Wdq | vrcp28ss/d Vx,Hx,Wx (66),(ev)
|
||||
cc: sha256msg1 Vdq,Wdq | vrsqrt28ps/d Vx,Wx (66),(ev)
|
||||
cd: sha256msg2 Vdq,Wdq | vrsqrt28ss/d Vx,Hx,Wx (66),(ev)
|
||||
cf: vgf2p8mulb Vx,Wx (66)
|
||||
db: VAESIMC Vdq,Wdq (66),(v1)
|
||||
dc: VAESENC Vdq,Hdq,Wdq (66),(v1)
|
||||
dd: VAESENCLAST Vdq,Hdq,Wdq (66),(v1)
|
||||
de: VAESDEC Vdq,Hdq,Wdq (66),(v1)
|
||||
df: VAESDECLAST Vdq,Hdq,Wdq (66),(v1)
|
||||
dc: vaesenc Vx,Hx,Wx (66)
|
||||
dd: vaesenclast Vx,Hx,Wx (66)
|
||||
de: vaesdec Vx,Hx,Wx (66)
|
||||
df: vaesdeclast Vx,Hx,Wx (66)
|
||||
f0: MOVBE Gy,My | MOVBE Gw,Mw (66) | CRC32 Gd,Eb (F2) | CRC32 Gd,Eb (66&F2)
|
||||
f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
|
||||
f2: ANDN Gy,By,Ey (v)
|
||||
@@ -848,7 +862,7 @@ AVXcode: 3
|
||||
41: vdppd Vdq,Hdq,Wdq,Ib (66),(v1)
|
||||
42: vmpsadbw Vx,Hx,Wx,Ib (66),(v1) | vdbpsadbw Vx,Hx,Wx,Ib (66),(evo)
|
||||
43: vshufi32x4/64x2 Vx,Hx,Wx,Ib (66),(ev)
|
||||
44: vpclmulqdq Vdq,Hdq,Wdq,Ib (66),(v1)
|
||||
44: vpclmulqdq Vx,Hx,Wx,Ib (66)
|
||||
46: vperm2i128 Vqq,Hqq,Wqq,Ib (66),(v)
|
||||
4a: vblendvps Vx,Hx,Wx,Lx (66),(v)
|
||||
4b: vblendvpd Vx,Hx,Wx,Lx (66),(v)
|
||||
@@ -865,7 +879,13 @@ AVXcode: 3
|
||||
63: vpcmpistri Vdq,Wdq,Ib (66),(v1)
|
||||
66: vfpclassps/d Vk,Wx,Ib (66),(ev)
|
||||
67: vfpclassss/d Vk,Wx,Ib (66),(ev)
|
||||
70: vpshldw Vx,Hx,Wx,Ib (66),(ev)
|
||||
71: vpshldd/q Vx,Hx,Wx,Ib (66),(ev)
|
||||
72: vpshrdw Vx,Hx,Wx,Ib (66),(ev)
|
||||
73: vpshrdd/q Vx,Hx,Wx,Ib (66),(ev)
|
||||
cc: sha1rnds4 Vdq,Wdq,Ib
|
||||
ce: vgf2p8affineqb Vx,Wx,Ib (66)
|
||||
cf: vgf2p8affineinvqb Vx,Wx,Ib (66)
|
||||
df: VAESKEYGEN Vdq,Wdq,Ib (66),(v1)
|
||||
f0: RORX Gy,Ey,Ib (F2),(v)
|
||||
EndTable
|
||||
|
||||
@@ -96,7 +96,8 @@ FEATURE_TESTS_EXTRA := \
|
||||
cxx \
|
||||
llvm \
|
||||
llvm-version \
|
||||
clang
|
||||
clang \
|
||||
libbpf
|
||||
|
||||
FEATURE_TESTS ?= $(FEATURE_TESTS_BASIC)
|
||||
|
||||
|
||||
@@ -53,6 +53,7 @@ FILES= \
|
||||
test-zlib.bin \
|
||||
test-lzma.bin \
|
||||
test-bpf.bin \
|
||||
test-libbpf.bin \
|
||||
test-get_cpuid.bin \
|
||||
test-sdt.bin \
|
||||
test-cxx.bin \
|
||||
@@ -270,6 +271,9 @@ $(OUTPUT)test-get_cpuid.bin:
|
||||
$(OUTPUT)test-bpf.bin:
|
||||
$(BUILD)
|
||||
|
||||
$(OUTPUT)test-libbpf.bin:
|
||||
$(BUILD) -lbpf
|
||||
|
||||
$(OUTPUT)test-sdt.bin:
|
||||
$(BUILD)
|
||||
|
||||
|
||||
@@ -0,0 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
#include <bpf/libbpf.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
return bpf_object__open("test") ? 0 : -1;
|
||||
}
|
||||
@@ -483,6 +483,16 @@ ifndef NO_LIBELF
|
||||
ifeq ($(feature-bpf), 1)
|
||||
CFLAGS += -DHAVE_LIBBPF_SUPPORT
|
||||
$(call detected,CONFIG_LIBBPF)
|
||||
|
||||
# detecting libbpf without LIBBPF_DYNAMIC, so make VF=1 shows libbpf detection status
|
||||
$(call feature_check,libbpf)
|
||||
ifdef LIBBPF_DYNAMIC
|
||||
ifeq ($(feature-libbpf), 1)
|
||||
EXTLIBS += -lbpf
|
||||
else
|
||||
dummy := $(error Error: No libbpf devel library found, please install libbpf-devel);
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
ifndef NO_DWARF
|
||||
|
||||
@@ -116,6 +116,8 @@ include ../scripts/utilities.mak
|
||||
#
|
||||
# Define TCMALLOC to enable tcmalloc heap profiling.
|
||||
#
|
||||
# Define LIBBPF_DYNAMIC to enable libbpf dynamic linking.
|
||||
#
|
||||
|
||||
# As per kernel Makefile, avoid funny character set dependencies
|
||||
unexport LC_ALL
|
||||
@@ -360,7 +362,9 @@ export PERL_PATH
|
||||
|
||||
PERFLIBS = $(LIBAPI) $(LIBTRACEEVENT) $(LIBSUBCMD) $(LIBPERF)
|
||||
ifndef NO_LIBBPF
|
||||
PERFLIBS += $(LIBBPF)
|
||||
ifndef LIBBPF_DYNAMIC
|
||||
PERFLIBS += $(LIBBPF)
|
||||
endif
|
||||
endif
|
||||
|
||||
# We choose to avoid "if .. else if .. else .. endif endif"
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
#include "perf_regs.h"
|
||||
#include "thread.h"
|
||||
#include "map.h"
|
||||
#include "map_groups.h"
|
||||
#include "maps.h"
|
||||
#include "event.h"
|
||||
#include "debug.h"
|
||||
#include "tests/tests.h"
|
||||
@@ -26,7 +26,7 @@ static int sample_ustack(struct perf_sample *sample,
|
||||
|
||||
sp = (unsigned long) regs[PERF_REG_ARM_SP];
|
||||
|
||||
map = map_groups__find(thread->mg, (u64)sp);
|
||||
map = maps__find(thread->maps, (u64)sp);
|
||||
if (!map) {
|
||||
pr_debug("failed to get stack map\n");
|
||||
free(buf);
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
#include "perf_regs.h"
|
||||
#include "thread.h"
|
||||
#include "map.h"
|
||||
#include "map_groups.h"
|
||||
#include "maps.h"
|
||||
#include "event.h"
|
||||
#include "debug.h"
|
||||
#include "tests/tests.h"
|
||||
@@ -26,7 +26,7 @@ static int sample_ustack(struct perf_sample *sample,
|
||||
|
||||
sp = (unsigned long) regs[PERF_REG_ARM64_SP];
|
||||
|
||||
map = map_groups__find(thread->mg, (u64)sp);
|
||||
map = maps__find(thread->maps, (u64)sp);
|
||||
if (!map) {
|
||||
pr_debug("failed to get stack map\n");
|
||||
free(buf);
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
#include "perf_regs.h"
|
||||
#include "thread.h"
|
||||
#include "map.h"
|
||||
#include "map_groups.h"
|
||||
#include "maps.h"
|
||||
#include "event.h"
|
||||
#include "debug.h"
|
||||
#include "tests/tests.h"
|
||||
@@ -27,7 +27,7 @@ static int sample_ustack(struct perf_sample *sample,
|
||||
|
||||
sp = (unsigned long) regs[PERF_REG_POWERPC_R1];
|
||||
|
||||
map = map_groups__find(thread->mg, (u64)sp);
|
||||
map = maps__find(thread->maps, (u64)sp);
|
||||
if (!map) {
|
||||
pr_debug("failed to get stack map\n");
|
||||
free(buf);
|
||||
|
||||
@@ -38,7 +38,7 @@ static int s390_call__parse(struct arch *arch, struct ins_operands *ops,
|
||||
return -1;
|
||||
target.addr = map__objdump_2mem(map, ops->target.addr);
|
||||
|
||||
if (map_groups__find_ams(ms->mg, &target) == 0 &&
|
||||
if (maps__find_ams(ms->maps, &target) == 0 &&
|
||||
map__rip_2objdump(target.ms.map, map->map_ip(target.ms.map, target.addr)) == ops->target.addr)
|
||||
ops->target.sym = target.ms.sym;
|
||||
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
#include "perf_regs.h"
|
||||
#include "thread.h"
|
||||
#include "map.h"
|
||||
#include "map_groups.h"
|
||||
#include "maps.h"
|
||||
#include "event.h"
|
||||
#include "debug.h"
|
||||
#include "tests/tests.h"
|
||||
@@ -27,7 +27,7 @@ static int sample_ustack(struct perf_sample *sample,
|
||||
|
||||
sp = (unsigned long) regs[PERF_REG_X86_SP];
|
||||
|
||||
map = map_groups__find(thread->mg, (u64)sp);
|
||||
map = maps__find(thread->maps, (u64)sp);
|
||||
if (!map) {
|
||||
pr_debug("failed to get stack map\n");
|
||||
free(buf);
|
||||
|
||||
@@ -667,6 +667,86 @@
|
||||
"62 f2 55 0f 4f f4 \tvrsqrt14ss %xmm4,%xmm5,%xmm6{%k7}",},
|
||||
{{0x62, 0xf2, 0xd5, 0x0f, 0x4f, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 d5 0f 4f f4 \tvrsqrt14sd %xmm4,%xmm5,%xmm6{%k7}",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x50, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 50 d9 \tvpdpbusd %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x50, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 50 d9 \tvpdpbusd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x50, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 50 d9 \tvpdpbusd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x50, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 50 9c c8 78 56 34 12 \tvpdpbusd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x51, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 51 d9 \tvpdpbusds %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x51, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 51 d9 \tvpdpbusds %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x51, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 51 d9 \tvpdpbusds %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x51, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 51 9c c8 78 56 34 12 \tvpdpbusds 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6e, 0x08, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6e 08 52 d9 \tvdpbf16ps %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6e, 0x28, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6e 28 52 d9 \tvdpbf16ps %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6e, 0x48, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6e 48 52 d9 \tvdpbf16ps %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6e, 0x48, 0x52, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6e 48 52 9c c8 78 56 34 12 \tvdpbf16ps 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 52 d9 \tvpdpwssd %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 52 d9 \tvpdpwssd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x52, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 52 d9 \tvpdpwssd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x52, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 52 9c c8 78 56 34 12 \tvpdpwssd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x52, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 48 52 20 \tvp4dpwssd (%eax),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x52, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 48 52 a4 c8 78 56 34 12 \tvp4dpwssd 0x12345678(%eax,%ecx,8),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x53, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 53 d9 \tvpdpwssds %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x53, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 53 d9 \tvpdpwssds %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x53, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 53 d9 \tvpdpwssds %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x53, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 53 9c c8 78 56 34 12 \tvpdpwssds 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x53, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 48 53 20 \tvp4dpwssds (%eax),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x53, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 48 53 a4 c8 78 56 34 12 \tvp4dpwssds 0x12345678(%eax,%ecx,8),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x7d, 0x08, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 08 54 d1 \tvpopcntb %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x28, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 28 54 d1 \tvpopcntb %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 48 54 d1 \tvpopcntb %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x54, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7d 48 54 94 c8 78 56 34 12 \tvpopcntb 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x08, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 08 54 d1 \tvpopcntw %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x28, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 28 54 d1 \tvpopcntw %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x54, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 48 54 d1 \tvpopcntw %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x54, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 fd 48 54 94 c8 78 56 34 12 \tvpopcntw 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x08, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 08 55 d1 \tvpopcntd %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x28, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 28 55 d1 \tvpopcntd %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 48 55 d1 \tvpopcntd %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x55, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7d 48 55 94 c8 78 56 34 12 \tvpopcntd 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x08, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 08 55 d1 \tvpopcntq %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x28, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 28 55 d1 \tvpopcntq %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x55, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 48 55 d1 \tvpopcntq %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x55, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 fd 48 55 94 c8 78 56 34 12 \tvpopcntq 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0xc4, 0xe2, 0x79, 0x59, 0xf4, }, 5, 0, "", "",
|
||||
"c4 e2 79 59 f4 \tvpbroadcastq %xmm4,%xmm6",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x59, 0xf7, }, 6, 0, "", "",
|
||||
@@ -681,6 +761,38 @@
|
||||
"62 f2 7d 48 5b 31 \tvbroadcasti32x8 (%ecx),%zmm6",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x5b, 0x31, }, 6, 0, "", "",
|
||||
"62 f2 fd 48 5b 31 \tvbroadcasti64x4 (%ecx),%zmm6",},
|
||||
{{0x62, 0xf2, 0x7d, 0x08, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 08 62 d1 \tvpexpandb %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x28, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 28 62 d1 \tvpexpandb %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7d 48 62 d1 \tvpexpandb %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x62, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7d 48 62 94 c8 78 56 34 12 \tvpexpandb 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x08, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 08 62 d1 \tvpexpandw %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x28, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 28 62 d1 \tvpexpandw %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x62, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 fd 48 62 d1 \tvpexpandw %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x62, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 fd 48 62 94 c8 78 56 34 12 \tvpexpandw 0x12345678(%eax,%ecx,8),%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x08, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 7d 08 63 ca \tvpcompressb %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x28, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 7d 28 63 ca \tvpcompressb %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 7d 48 63 ca \tvpcompressb %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0x7d, 0x48, 0x63, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7d 48 63 94 c8 78 56 34 12 \tvpcompressb %zmm2,0x12345678(%eax,%ecx,8)",},
|
||||
{{0x62, 0xf2, 0xfd, 0x08, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 fd 08 63 ca \tvpcompressw %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x28, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 fd 28 63 ca \tvpcompressw %ymm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x63, 0xca, }, 6, 0, "", "",
|
||||
"62 f2 fd 48 63 ca \tvpcompressw %zmm1,%zmm2",},
|
||||
{{0x62, 0xf2, 0xfd, 0x48, 0x63, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 fd 48 63 94 c8 78 56 34 12 \tvpcompressw %zmm2,0x12345678(%eax,%ecx,8)",},
|
||||
{{0x62, 0xf2, 0x55, 0x48, 0x64, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 55 48 64 f4 \tvpblendmd %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0x64, 0xf4, }, 6, 0, "", "",
|
||||
@@ -693,6 +805,86 @@
|
||||
"62 f2 55 48 66 f4 \tvpblendmb %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0x66, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 d5 48 66 f4 \tvpblendmw %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0x6f, 0x08, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 08 68 d9 \tvp2intersectd %xmm1,%xmm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x28, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 28 68 d9 \tvp2intersectd %ymm1,%ymm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x48, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 48 68 d9 \tvp2intersectd %zmm1,%zmm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x48, 0x68, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6f 48 68 9c c8 78 56 34 12 \tvp2intersectd 0x12345678(%eax,%ecx,8),%zmm2,%k3",},
|
||||
{{0x62, 0xf2, 0xef, 0x08, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ef 08 68 d9 \tvp2intersectq %xmm1,%xmm2,%k3",},
|
||||
{{0x62, 0xf2, 0xef, 0x28, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ef 28 68 d9 \tvp2intersectq %ymm1,%ymm2,%k3",},
|
||||
{{0x62, 0xf2, 0xef, 0x48, 0x68, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ef 48 68 d9 \tvp2intersectq %zmm1,%zmm2,%k3",},
|
||||
{{0x62, 0xf2, 0xef, 0x48, 0x68, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ef 48 68 9c c8 78 56 34 12 \tvp2intersectq 0x12345678(%eax,%ecx,8),%zmm2,%k3",},
|
||||
{{0x62, 0xf2, 0xed, 0x08, 0x70, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 08 70 d9 \tvpshldvw %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x28, 0x70, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 28 70 d9 \tvpshldvw %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x70, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 70 d9 \tvpshldvw %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x70, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 70 9c c8 78 56 34 12 \tvpshldvw 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 71 d9 \tvpshldvd %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 71 d9 \tvpshldvd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 71 d9 \tvpshldvd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x71, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 71 9c c8 78 56 34 12 \tvpshldvd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x08, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 08 71 d9 \tvpshldvq %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x28, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 28 71 d9 \tvpshldvq %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x71, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 71 d9 \tvpshldvq %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x71, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 71 9c c8 78 56 34 12 \tvpshldvq 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x08, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 08 72 d9 \tvcvtne2ps2bf16 %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x28, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 28 72 d9 \tvcvtne2ps2bf16 %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x48, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6f 48 72 d9 \tvcvtne2ps2bf16 %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6f, 0x48, 0x72, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6f 48 72 9c c8 78 56 34 12 \tvcvtne2ps2bf16 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x7e, 0x08, 0x72, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7e 08 72 d1 \tvcvtneps2bf16 %xmm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7e, 0x28, 0x72, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7e 28 72 d1 \tvcvtneps2bf16 %ymm1,%xmm2",},
|
||||
{{0x62, 0xf2, 0x7e, 0x48, 0x72, 0xd1, }, 6, 0, "", "",
|
||||
"62 f2 7e 48 72 d1 \tvcvtneps2bf16 %zmm1,%ymm2",},
|
||||
{{0x62, 0xf2, 0x7e, 0x48, 0x72, 0x94, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7e 48 72 94 c8 78 56 34 12 \tvcvtneps2bf16 0x12345678(%eax,%ecx,8),%ymm2",},
|
||||
{{0x62, 0xf2, 0xed, 0x08, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 08 72 d9 \tvpshrdvw %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x28, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 28 72 d9 \tvpshrdvw %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x72, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 72 d9 \tvpshrdvw %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x72, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 72 9c c8 78 56 34 12 \tvpshrdvw 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 73 d9 \tvpshrdvd %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 73 d9 \tvpshrdvd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 73 d9 \tvpshrdvd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x73, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 73 9c c8 78 56 34 12 \tvpshrdvd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x08, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 08 73 d9 \tvpshrdvq %xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x28, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 28 73 d9 \tvpshrdvq %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x73, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 73 d9 \tvpshrdvq %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x73, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 73 9c c8 78 56 34 12 \tvpshrdvq 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x55, 0x48, 0x75, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 55 48 75 f4 \tvpermi2b %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0x75, 0xf4, }, 6, 0, "", "",
|
||||
@@ -745,6 +937,14 @@
|
||||
"62 f2 55 48 8d f4 \tvpermb %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0x8d, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 d5 48 8d f4 \tvpermw %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0x6d, 0x08, 0x8f, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 08 8f d9 \tvpshufbitqmb %xmm1,%xmm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x28, 0x8f, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 28 8f d9 \tvpshufbitqmb %ymm1,%ymm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x8f, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 8f d9 \tvpshufbitqmb %zmm1,%zmm2,%k3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x8f, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 8f 9c c8 78 56 34 12 \tvpshufbitqmb 0x12345678(%eax,%ecx,8),%zmm2,%k3",},
|
||||
{{0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x02, }, 7, 0, "", "",
|
||||
"c4 e2 69 90 4c 7d 02 \tvpgatherdd %xmm2,0x2(%ebp,%xmm7,2),%xmm1",},
|
||||
{{0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x04, }, 7, 0, "", "",
|
||||
@@ -761,6 +961,38 @@
|
||||
"62 f2 7d 49 91 b4 fd 7b 00 00 00 \tvpgatherqd 0x7b(%ebp,%zmm7,8),%ymm6{%k1}",},
|
||||
{{0x62, 0xf2, 0xfd, 0x49, 0x91, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "",
|
||||
"62 f2 fd 49 91 b4 fd 7b 00 00 00 \tvpgatherqq 0x7b(%ebp,%zmm7,8),%zmm6{%k1}",},
|
||||
{{0xc4, 0xe2, 0x69, 0x9a, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 9a d9 \tvfmsub132ps %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0x9a, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d 9a d9 \tvfmsub132ps %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x9a, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 9a d9 \tvfmsub132ps %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0x9a, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 9a 9c c8 78 56 34 12 \tvfmsub132ps 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0x9a, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 e9 9a d9 \tvfmsub132pd %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xed, 0x9a, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 ed 9a d9 \tvfmsub132pd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x9a, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 9a d9 \tvfmsub132pd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0x9a, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 9a 9c c8 78 56 34 12 \tvfmsub132pd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x9a, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 48 9a 20 \tv4fmaddps (%eax),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0x9a, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 48 9a a4 c8 78 56 34 12 \tv4fmaddps 0x12345678(%eax,%ecx,8),%zmm0,%zmm4",},
|
||||
{{0xc4, 0xe2, 0x69, 0x9b, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 9b d9 \tvfmsub132ss %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0x9b, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"c4 e2 69 9b 9c c8 78 56 34 12 \tvfmsub132ss 0x12345678(%eax,%ecx,8),%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0x9b, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 e9 9b d9 \tvfmsub132sd %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0x9b, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"c4 e2 e9 9b 9c c8 78 56 34 12 \tvfmsub132sd 0x12345678(%eax,%ecx,8),%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x08, 0x9b, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 08 9b 20 \tv4fmaddss (%eax),%xmm0,%xmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x08, 0x9b, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 08 9b a4 c8 78 56 34 12 \tv4fmaddss 0x12345678(%eax,%ecx,8),%xmm0,%xmm4",},
|
||||
{{0x62, 0xf2, 0x7d, 0x49, 0xa0, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "",
|
||||
"62 f2 7d 49 a0 b4 fd 7b 00 00 00 \tvpscatterdd %zmm6,0x7b(%ebp,%zmm7,8){%k1}",},
|
||||
{{0x62, 0xf2, 0xfd, 0x49, 0xa0, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "",
|
||||
@@ -777,6 +1009,38 @@
|
||||
"62 f2 7d 49 a3 b4 fd 7b 00 00 00 \tvscatterqps %ymm6,0x7b(%ebp,%zmm7,8){%k1}",},
|
||||
{{0x62, 0xf2, 0xfd, 0x49, 0xa3, 0xb4, 0xfd, 0x7b, 0x00, 0x00, 0x00, }, 11, 0, "", "",
|
||||
"62 f2 fd 49 a3 b4 fd 7b 00 00 00 \tvscatterqpd %zmm6,0x7b(%ebp,%zmm7,8){%k1}",},
|
||||
{{0xc4, 0xe2, 0x69, 0xaa, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 aa d9 \tvfmsub213ps %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xaa, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d aa d9 \tvfmsub213ps %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xaa, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 aa d9 \tvfmsub213ps %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xaa, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 aa 9c c8 78 56 34 12 \tvfmsub213ps 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0xaa, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 e9 aa d9 \tvfmsub213pd %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xed, 0xaa, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 ed aa d9 \tvfmsub213pd %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0xaa, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 ed 48 aa d9 \tvfmsub213pd %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0xed, 0x48, 0xaa, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 ed 48 aa 9c c8 78 56 34 12 \tvfmsub213pd 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0xaa, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 48 aa 20 \tv4fnmaddps (%eax),%zmm0,%zmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x48, 0xaa, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 48 aa a4 c8 78 56 34 12 \tv4fnmaddps 0x12345678(%eax,%ecx,8),%zmm0,%zmm4",},
|
||||
{{0xc4, 0xe2, 0x69, 0xab, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 ab d9 \tvfmsub213ss %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xab, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"c4 e2 69 ab 9c c8 78 56 34 12 \tvfmsub213ss 0x12345678(%eax,%ecx,8),%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0xab, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 e9 ab d9 \tvfmsub213sd %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0xe9, 0xab, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"c4 e2 e9 ab 9c c8 78 56 34 12 \tvfmsub213sd 0x12345678(%eax,%ecx,8),%xmm2,%xmm3",},
|
||||
{{0x62, 0xf2, 0x7f, 0x08, 0xab, 0x20, }, 6, 0, "", "",
|
||||
"62 f2 7f 08 ab 20 \tv4fnmaddss (%eax),%xmm0,%xmm4",},
|
||||
{{0x62, 0xf2, 0x7f, 0x08, 0xab, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 7f 08 ab a4 c8 78 56 34 12 \tv4fnmaddss 0x12345678(%eax,%ecx,8),%xmm0,%xmm4",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0xb4, 0xf4, }, 6, 0, "", "",
|
||||
"62 f2 d5 48 b4 f4 \tvpmadd52luq %zmm4,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf2, 0xd5, 0x48, 0xb5, 0xf4, }, 6, 0, "", "",
|
||||
@@ -805,6 +1069,50 @@
|
||||
"62 f2 4d 0f cd fd \tvrsqrt28ss %xmm5,%xmm6,%xmm7{%k7}",},
|
||||
{{0x62, 0xf2, 0xcd, 0x0f, 0xcd, 0xfd, }, 6, 0, "", "",
|
||||
"62 f2 cd 0f cd fd \tvrsqrt28sd %xmm5,%xmm6,%xmm7{%k7}",},
|
||||
{{0x66, 0x0f, 0x38, 0xcf, 0xd9, }, 5, 0, "", "",
|
||||
"66 0f 38 cf d9 \tgf2p8mulb %xmm1,%xmm3",},
|
||||
{{0x66, 0x0f, 0x38, 0xcf, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "",
|
||||
"66 0f 38 cf 9c c8 78 56 34 12 \tgf2p8mulb 0x12345678(%eax,%ecx,8),%xmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xcf, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 cf d9 \tvgf2p8mulb %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xcf, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d cf d9 \tvgf2p8mulb %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xcf, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 cf d9 \tvgf2p8mulb %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xcf, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 cf 9c c8 78 56 34 12 \tvgf2p8mulb 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xdc, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 dc d9 \tvaesenc %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xdc, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d dc d9 \tvaesenc %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdc, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 dc d9 \tvaesenc %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdc, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 dc 9c c8 78 56 34 12 \tvaesenc 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xdd, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 dd d9 \tvaesenclast %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xdd, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d dd d9 \tvaesenclast %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdd, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 dd d9 \tvaesenclast %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdd, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 dd 9c c8 78 56 34 12 \tvaesenclast 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xde, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 de d9 \tvaesdec %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xde, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d de d9 \tvaesdec %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xde, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 de d9 \tvaesdec %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xde, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 de 9c c8 78 56 34 12 \tvaesdec 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0xc4, 0xe2, 0x69, 0xdf, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 69 df d9 \tvaesdeclast %xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe2, 0x6d, 0xdf, 0xd9, }, 5, 0, "", "",
|
||||
"c4 e2 6d df d9 \tvaesdeclast %ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdf, 0xd9, }, 6, 0, "", "",
|
||||
"62 f2 6d 48 df d9 \tvaesdeclast %zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf2, 0x6d, 0x48, 0xdf, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 11, 0, "", "",
|
||||
"62 f2 6d 48 df 9c c8 78 56 34 12 \tvaesdeclast 0x12345678(%eax,%ecx,8),%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0x4d, 0x48, 0x03, 0xfd, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 4d 48 03 fd 12 \tvalignd $0x12,%zmm5,%zmm6,%zmm7",},
|
||||
{{0x62, 0xf3, 0xcd, 0x48, 0x03, 0xfd, 0x12, }, 7, 0, "", "",
|
||||
@@ -905,6 +1213,12 @@
|
||||
"62 f3 4d 48 43 fd 12 \tvshufi32x4 $0x12,%zmm5,%zmm6,%zmm7",},
|
||||
{{0x62, 0xf3, 0xcd, 0x48, 0x43, 0xfd, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 cd 48 43 fd 12 \tvshufi64x2 $0x12,%zmm5,%zmm6,%zmm7",},
|
||||
{{0xc4, 0xe3, 0x69, 0x44, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 69 44 d9 12 \tvpclmulqdq $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe3, 0x6d, 0x44, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 6d 44 d9 12 \tvpclmulqdq $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x48, 0x44, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 48 44 d9 12 \tvpclmulqdq $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0x4d, 0x48, 0x50, 0xfd, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 4d 48 50 fd 12 \tvrangeps $0x12,%zmm5,%zmm6,%zmm7",},
|
||||
{{0x62, 0xf3, 0xcd, 0x48, 0x50, 0xfd, 0x12, }, 7, 0, "", "",
|
||||
@@ -937,6 +1251,58 @@
|
||||
"62 f3 7d 08 67 ef 12 \tvfpclassss $0x12,%xmm7,%k5",},
|
||||
{{0x62, 0xf3, 0xfd, 0x08, 0x67, 0xef, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 fd 08 67 ef 12 \tvfpclasssd $0x12,%xmm7,%k5",},
|
||||
{{0x62, 0xf3, 0xed, 0x08, 0x70, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 08 70 d9 12 \tvpshldw $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x28, 0x70, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 28 70 d9 12 \tvpshldw $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0x70, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 70 d9 12 \tvpshldw $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x08, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 08 71 d9 12 \tvpshldd $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x28, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 28 71 d9 12 \tvpshldd $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x48, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 48 71 d9 12 \tvpshldd $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x08, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 08 71 d9 12 \tvpshldq $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x28, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 28 71 d9 12 \tvpshldq $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0x71, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 71 d9 12 \tvpshldq $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x08, 0x72, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 08 72 d9 12 \tvpshrdw $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x28, 0x72, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 28 72 d9 12 \tvpshrdw $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0x72, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 72 d9 12 \tvpshrdw $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x08, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 08 73 d9 12 \tvpshrdd $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x28, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 28 73 d9 12 \tvpshrdd $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0x6d, 0x48, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 6d 48 73 d9 12 \tvpshrdd $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x08, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 08 73 d9 12 \tvpshrdq $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x28, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 28 73 d9 12 \tvpshrdq $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0x73, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 73 d9 12 \tvpshrdq $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x66, 0x0f, 0x3a, 0xce, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"66 0f 3a ce d9 12 \tgf2p8affineqb $0x12,%xmm1,%xmm3",},
|
||||
{{0xc4, 0xe3, 0xe9, 0xce, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 e9 ce d9 12 \tvgf2p8affineqb $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe3, 0xed, 0xce, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 ed ce d9 12 \tvgf2p8affineqb $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0xce, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 ce d9 12 \tvgf2p8affineqb $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x66, 0x0f, 0x3a, 0xcf, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"66 0f 3a cf d9 12 \tgf2p8affineinvqb $0x12,%xmm1,%xmm3",},
|
||||
{{0xc4, 0xe3, 0xe9, 0xcf, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 e9 cf d9 12 \tvgf2p8affineinvqb $0x12,%xmm1,%xmm2,%xmm3",},
|
||||
{{0xc4, 0xe3, 0xed, 0xcf, 0xd9, 0x12, }, 6, 0, "", "",
|
||||
"c4 e3 ed cf d9 12 \tvgf2p8affineinvqb $0x12,%ymm1,%ymm2,%ymm3",},
|
||||
{{0x62, 0xf3, 0xed, 0x48, 0xcf, 0xd9, 0x12, }, 7, 0, "", "",
|
||||
"62 f3 ed 48 cf d9 12 \tvgf2p8affineinvqb $0x12,%zmm1,%zmm2,%zmm3",},
|
||||
{{0x62, 0xf1, 0x4d, 0x48, 0x72, 0xc5, 0x12, }, 7, 0, "", "",
|
||||
"62 f1 4d 48 72 c5 12 \tvprord $0x12,%zmm5,%zmm6",},
|
||||
{{0x62, 0xf1, 0xcd, 0x48, 0x72, 0xc5, 0x12, }, 7, 0, "", "",
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -18,8 +18,7 @@ int perf_event__synthesize_extra_kmaps(struct perf_tool *tool,
|
||||
{
|
||||
int rc = 0;
|
||||
struct map *pos;
|
||||
struct map_groups *kmaps = &machine->kmaps;
|
||||
struct maps *maps = &kmaps->maps;
|
||||
struct maps *kmaps = &machine->kmaps;
|
||||
union perf_event *event = zalloc(sizeof(event->mmap) +
|
||||
machine->id_hdr_size);
|
||||
|
||||
@@ -29,7 +28,7 @@ int perf_event__synthesize_extra_kmaps(struct perf_tool *tool,
|
||||
return -1;
|
||||
}
|
||||
|
||||
maps__for_each_entry(maps, pos) {
|
||||
maps__for_each_entry(kmaps, pos) {
|
||||
struct kmap *kmap;
|
||||
size_t size;
|
||||
|
||||
|
||||
@@ -547,8 +547,8 @@ static int64_t block_cycles_diff_cmp(struct hist_entry *left,
|
||||
if (!pairs_left && !pairs_right)
|
||||
return 0;
|
||||
|
||||
l = labs(left->diff.cycles);
|
||||
r = labs(right->diff.cycles);
|
||||
l = llabs(left->diff.cycles);
|
||||
r = llabs(right->diff.cycles);
|
||||
return r - l;
|
||||
}
|
||||
|
||||
@@ -646,7 +646,7 @@ static void compute_cycles_diff(struct hist_entry *he,
|
||||
if (i >= he->block_info->num || i >= NUM_SPARKS)
|
||||
break;
|
||||
|
||||
val = labs(pair->block_info->cycles_spark[i] -
|
||||
val = llabs(pair->block_info->cycles_spark[i] -
|
||||
he->block_info->cycles_spark[i]);
|
||||
|
||||
update_spark_value(pair->diff.svals, NUM_SPARKS,
|
||||
|
||||
@@ -780,11 +780,6 @@ static size_t maps__fprintf_task(struct maps *maps, int indent, FILE *fp)
|
||||
return printed;
|
||||
}
|
||||
|
||||
static int map_groups__fprintf_task(struct map_groups *mg, int indent, FILE *fp)
|
||||
{
|
||||
return maps__fprintf_task(&mg->maps, indent, fp);
|
||||
}
|
||||
|
||||
static void task__print_level(struct task *task, FILE *fp, int level)
|
||||
{
|
||||
struct thread *thread = task->thread;
|
||||
@@ -795,7 +790,7 @@ static void task__print_level(struct task *task, FILE *fp, int level)
|
||||
|
||||
fprintf(fp, "%s\n", thread__comm_str(thread));
|
||||
|
||||
map_groups__fprintf_task(thread->mg, comm_indent, fp);
|
||||
maps__fprintf_task(thread->maps, comm_indent, fp);
|
||||
|
||||
if (!list_empty(&task->children)) {
|
||||
list_for_each_entry(child, &task->children, list)
|
||||
|
||||
Loaded 20 of 68 files, more files were not shown because too many files have changed in this diff.
Show more
Reference in new issue
Block a user