arm64: dts: qcom: mahua: Add QREF regulator supplies to TCSR

Mahua has a different QREF topology from Glymur. Override the TCSR
compatible to qcom,mahua-tcsr in mahua.dtsi, and wire up the required
LDO supplies on the CRD board.

Unlike the other PCIe controllers, PCIe5 PHY on Mahua gets its refclk
from the CXO0 pad directly and requires no QREF clkref_en voting. Hence,
point its ref clock at RPMH_CXO_CLK.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
This commit is contained in:
Qiang Yu
2026-08-05 15:36:00 +03:00
committed by Abel Vesa
parent 383c925e96
commit a2bb6d1e5a
2 changed files with 29 additions and 0 deletions
+16
View File
@@ -19,3 +19,19 @@
model = "Qualcomm Technologies, Inc. Mahua CRD";
compatible = "qcom,mahua-crd", "qcom,mahua";
};
&tcsr {
vdda-qrefrpt0-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrpt1-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrpt2-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrpt3-0p9-supply = <&vreg_l1f_e1_0p82>;
vdda-qrefrpt4-0p9-supply = <&vreg_l2h_e0_0p72>;
vdda-qrefrpt5-0p9-supply = <&vreg_l2h_e0_0p72>;
vdda-qrefrx0-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrx1-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrx2-0p9-supply = <&vreg_l2f_e1_0p83>;
vdda-qrefrx3-0p9-supply = <&vreg_l2h_e0_0p72>;
vdda-qreftx1-0p9-supply = <&vreg_l1f_e1_0p82>;
vdda-refgen3-0p9-supply = <&vreg_l1f_e1_0p82>;
vdda-refgen3-1p2-supply = <&vreg_l4f_e1_1p08>;
};
+13
View File
@@ -115,6 +115,15 @@
compatible = "qcom,mahua-oobm-ss-noc", "qcom,glymur-oobm-ss-noc";
};
&pcie5_phy {
clocks = <&gcc GCC_PCIE_PHY_5_AUX_CLK>,
<&gcc GCC_PCIE_5_CFG_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
<&gcc GCC_PCIE_5_PIPE_CLK>,
<&gcc GCC_PCIE_5_PIPE_DIV2_CLK>;
};
&pcie_east_anoc {
compatible = "qcom,mahua-pcie-east-anoc", "qcom,glymur-pcie-east-anoc";
};
@@ -286,6 +295,10 @@
};
};
&tcsr {
compatible = "qcom,mahua-tcsr", "syscon";
};
&tlmm {
compatible = "qcom,mahua-tlmm";
};