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pinctrl: sophgo: add support for CV1800B SoC
Sophgo CV1800 series SoCs share common control logic but have different register mapping. For maintenance, split the driver and pin definition of the SoC. Add base driver for CV1800 series SoC and pin definition of CV1800B. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/IA1PR20MB4953B260E04EC53F6A01EB30BBB32@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Inochi Amaoto
committed by
Linus Walleij
Linus Walleij
parent
64aa494de6
commit
a29d8e93e7
@@ -583,6 +583,7 @@ source "drivers/pinctrl/qcom/Kconfig"
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source "drivers/pinctrl/realtek/Kconfig"
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source "drivers/pinctrl/renesas/Kconfig"
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source "drivers/pinctrl/samsung/Kconfig"
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source "drivers/pinctrl/sophgo/Kconfig"
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source "drivers/pinctrl/spear/Kconfig"
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source "drivers/pinctrl/sprd/Kconfig"
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source "drivers/pinctrl/starfive/Kconfig"
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@@ -73,6 +73,7 @@ obj-y += qcom/
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obj-$(CONFIG_ARCH_REALTEK) += realtek/
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obj-$(CONFIG_PINCTRL_RENESAS) += renesas/
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obj-$(CONFIG_PINCTRL_SAMSUNG) += samsung/
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obj-y += sophgo/
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obj-$(CONFIG_PINCTRL_SPEAR) += spear/
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obj-y += sprd/
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obj-$(CONFIG_SOC_STARFIVE) += starfive/
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@@ -0,0 +1,21 @@
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# SPDX-License-Identifier: GPL-2.0-only
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#
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# Sophgo SoC PINCTRL drivers
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#
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config PINCTRL_SOPHGO_CV18XX
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bool
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select GENERIC_PINCTRL_GROUPS
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select GENERIC_PINMUX_FUNCTIONS
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select GENERIC_PINCONF
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config PINCTRL_SOPHGO_CV1800B
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tristate "Sophgo CV1800B SoC Pinctrl driver"
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depends on ARCH_SOPHGO || COMPILE_TEST
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depends on OF
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select PINCTRL_SOPHGO_CV18XX
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help
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Say Y to select the pinctrl driver for CV1800B SoC.
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This pin controller allows selecting the mux function for
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each pin. This driver can also be built as a module called
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pinctrl-cv1800b.
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@@ -0,0 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_PINCTRL_SOPHGO_CV18XX) += pinctrl-cv18xx.o
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obj-$(CONFIG_PINCTRL_SOPHGO_CV1800B) += pinctrl-cv1800b.o
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@@ -0,0 +1,462 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Sophgo CV1800B SoC pinctrl driver.
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*
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* Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
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*
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* This file is generated from vendor pinout definition.
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
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#include "pinctrl-cv18xx.h"
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enum CV1800B_POWER_DOMAIN {
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VDD18A_AUD = 0,
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VDD18A_USB_PLL_ETH_CSI = 1,
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VDD33A_ETH_USB_SD1 = 2,
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VDDIO_RTC = 3,
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VDDIO_SD0_SPI = 4
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};
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static const char *const cv1800b_power_domain_desc[] = {
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[VDD18A_AUD] = "VDD18A_AUD",
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[VDD18A_USB_PLL_ETH_CSI] = "VDD18A_USB_PLL_ETH_CSI",
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[VDD33A_ETH_USB_SD1] = "VDD33A_ETH_USB_SD1",
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[VDDIO_RTC] = "VDDIO_RTC",
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[VDDIO_SD0_SPI] = "VDDIO_SD0_SPI",
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};
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static int cv1800b_get_pull_up(struct cv1800_pin *pin, const u32 *psmap)
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{
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u32 pstate = psmap[pin->power_domain];
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enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
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if (type == IO_TYPE_1V8_ONLY)
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return 79000;
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if (type == IO_TYPE_1V8_OR_3V3) {
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if (pstate == PIN_POWER_STATE_1V8)
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return 60000;
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if (pstate == PIN_POWER_STATE_3V3)
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return 60000;
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return -EINVAL;
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}
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return -ENOTSUPP;
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}
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static int cv1800b_get_pull_down(struct cv1800_pin *pin, const u32 *psmap)
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{
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u32 pstate = psmap[pin->power_domain];
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enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
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if (type == IO_TYPE_1V8_ONLY)
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return 87000;
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if (type == IO_TYPE_1V8_OR_3V3) {
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if (pstate == PIN_POWER_STATE_1V8)
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return 61000;
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if (pstate == PIN_POWER_STATE_3V3)
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return 62000;
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return -EINVAL;
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}
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return -ENOTSUPP;
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}
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static const u32 cv1800b_1v8_oc_map[] = {
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12800,
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25300,
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37400,
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49000
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};
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static const u32 cv1800b_18od33_1v8_oc_map[] = {
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7800,
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11700,
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15500,
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19200,
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23000,
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26600,
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30200,
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33700
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};
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static const u32 cv1800b_18od33_3v3_oc_map[] = {
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5500,
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8200,
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10800,
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13400,
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16100,
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18700,
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21200,
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23700
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};
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static const u32 cv1800b_eth_oc_map[] = {
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15700,
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17800
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};
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static int cv1800b_get_oc_map(struct cv1800_pin *pin, const u32 *psmap,
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const u32 **map)
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{
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enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
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u32 pstate = psmap[pin->power_domain];
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if (type == IO_TYPE_1V8_ONLY) {
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*map = cv1800b_1v8_oc_map;
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return ARRAY_SIZE(cv1800b_1v8_oc_map);
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}
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if (type == IO_TYPE_1V8_OR_3V3) {
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if (pstate == PIN_POWER_STATE_1V8) {
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*map = cv1800b_18od33_1v8_oc_map;
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return ARRAY_SIZE(cv1800b_18od33_1v8_oc_map);
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} else if (pstate == PIN_POWER_STATE_3V3) {
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*map = cv1800b_18od33_3v3_oc_map;
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return ARRAY_SIZE(cv1800b_18od33_3v3_oc_map);
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}
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}
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if (type == IO_TYPE_ETH) {
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*map = cv1800b_eth_oc_map;
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return ARRAY_SIZE(cv1800b_eth_oc_map);
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}
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return -ENOTSUPP;
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}
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static const u32 cv1800b_1v8_schmitt_map[] = {
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0,
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970000,
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1040000
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};
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static const u32 cv1800b_18od33_1v8_schmitt_map[] = {
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0,
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1070000
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};
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static const u32 cv1800b_18od33_3v3_schmitt_map[] = {
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0,
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1100000
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};
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static int cv1800b_get_schmitt_map(struct cv1800_pin *pin, const u32 *psmap,
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const u32 **map)
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{
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enum cv1800_pin_io_type type = cv1800_pin_io_type(pin);
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u32 pstate = psmap[pin->power_domain];
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if (type == IO_TYPE_1V8_ONLY) {
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*map = cv1800b_1v8_schmitt_map;
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return ARRAY_SIZE(cv1800b_1v8_schmitt_map);
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}
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if (type == IO_TYPE_1V8_OR_3V3) {
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if (pstate == PIN_POWER_STATE_1V8) {
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*map = cv1800b_18od33_1v8_schmitt_map;
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return ARRAY_SIZE(cv1800b_18od33_1v8_schmitt_map);
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} else if (pstate == PIN_POWER_STATE_3V3) {
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*map = cv1800b_18od33_3v3_schmitt_map;
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return ARRAY_SIZE(cv1800b_18od33_3v3_schmitt_map);
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}
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}
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return -ENOTSUPP;
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}
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static const struct cv1800_vddio_cfg_ops cv1800b_vddio_cfg_ops = {
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.get_pull_up = cv1800b_get_pull_up,
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.get_pull_down = cv1800b_get_pull_down,
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.get_oc_map = cv1800b_get_oc_map,
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.get_schmitt_map = cv1800b_get_schmitt_map,
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};
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static const struct pinctrl_pin_desc cv1800b_pins[] = {
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PINCTRL_PIN(PIN_AUD_AOUTR, "AUD_AOUTR"),
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PINCTRL_PIN(PIN_SD0_CLK, "SD0_CLK"),
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PINCTRL_PIN(PIN_SD0_CMD, "SD0_CMD"),
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PINCTRL_PIN(PIN_SD0_D0, "SD0_D0"),
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PINCTRL_PIN(PIN_SD0_D1, "SD0_D1"),
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PINCTRL_PIN(PIN_SD0_D2, "SD0_D2"),
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PINCTRL_PIN(PIN_SD0_D3, "SD0_D3"),
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PINCTRL_PIN(PIN_SD0_CD, "SD0_CD"),
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PINCTRL_PIN(PIN_SD0_PWR_EN, "SD0_PWR_EN"),
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PINCTRL_PIN(PIN_SPK_EN, "SPK_EN"),
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PINCTRL_PIN(PIN_UART0_TX, "UART0_TX"),
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PINCTRL_PIN(PIN_UART0_RX, "UART0_RX"),
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PINCTRL_PIN(PIN_SPINOR_HOLD_X, "SPINOR_HOLD_X"),
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PINCTRL_PIN(PIN_SPINOR_SCK, "SPINOR_SCK"),
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PINCTRL_PIN(PIN_SPINOR_MOSI, "SPINOR_MOSI"),
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PINCTRL_PIN(PIN_SPINOR_WP_X, "SPINOR_WP_X"),
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PINCTRL_PIN(PIN_SPINOR_MISO, "SPINOR_MISO"),
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PINCTRL_PIN(PIN_SPINOR_CS_X, "SPINOR_CS_X"),
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PINCTRL_PIN(PIN_IIC0_SCL, "IIC0_SCL"),
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PINCTRL_PIN(PIN_IIC0_SDA, "IIC0_SDA"),
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PINCTRL_PIN(PIN_AUX0, "AUX0"),
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PINCTRL_PIN(PIN_PWR_VBAT_DET, "PWR_VBAT_DET"),
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PINCTRL_PIN(PIN_PWR_SEQ2, "PWR_SEQ2"),
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PINCTRL_PIN(PIN_XTAL_XIN, "XTAL_XIN"),
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PINCTRL_PIN(PIN_SD1_GPIO0, "SD1_GPIO0"),
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PINCTRL_PIN(PIN_SD1_GPIO1, "SD1_GPIO1"),
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PINCTRL_PIN(PIN_SD1_D3, "SD1_D3"),
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PINCTRL_PIN(PIN_SD1_D2, "SD1_D2"),
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PINCTRL_PIN(PIN_SD1_D1, "SD1_D1"),
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PINCTRL_PIN(PIN_SD1_D0, "SD1_D0"),
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PINCTRL_PIN(PIN_SD1_CMD, "SD1_CMD"),
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PINCTRL_PIN(PIN_SD1_CLK, "SD1_CLK"),
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PINCTRL_PIN(PIN_ADC1, "ADC1"),
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PINCTRL_PIN(PIN_USB_VBUS_DET, "USB_VBUS_DET"),
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PINCTRL_PIN(PIN_ETH_TXP, "ETH_TXP"),
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PINCTRL_PIN(PIN_ETH_TXM, "ETH_TXM"),
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PINCTRL_PIN(PIN_ETH_RXP, "ETH_RXP"),
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PINCTRL_PIN(PIN_ETH_RXM, "ETH_RXM"),
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PINCTRL_PIN(PIN_MIPIRX4N, "MIPIRX4N"),
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PINCTRL_PIN(PIN_MIPIRX4P, "MIPIRX4P"),
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PINCTRL_PIN(PIN_MIPIRX3N, "MIPIRX3N"),
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PINCTRL_PIN(PIN_MIPIRX3P, "MIPIRX3P"),
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PINCTRL_PIN(PIN_MIPIRX2N, "MIPIRX2N"),
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PINCTRL_PIN(PIN_MIPIRX2P, "MIPIRX2P"),
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PINCTRL_PIN(PIN_MIPIRX1N, "MIPIRX1N"),
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PINCTRL_PIN(PIN_MIPIRX1P, "MIPIRX1P"),
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PINCTRL_PIN(PIN_MIPIRX0N, "MIPIRX0N"),
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PINCTRL_PIN(PIN_MIPIRX0P, "MIPIRX0P"),
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PINCTRL_PIN(PIN_AUD_AINL_MIC, "AUD_AINL_MIC"),
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};
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static const struct cv1800_pin cv1800b_pin_data[ARRAY_SIZE(cv1800b_pins)] = {
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CV1800_FUNC_PIN(PIN_AUD_AOUTR, VDD18A_AUD,
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IO_TYPE_AUDIO,
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CV1800_PINCONF_AREA_SYS, 0x12c, 6),
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CV1800_GENERAL_PIN(PIN_SD0_CLK, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x000, 7,
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CV1800_PINCONF_AREA_SYS, 0xa00),
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CV1800_GENERAL_PIN(PIN_SD0_CMD, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x004, 7,
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CV1800_PINCONF_AREA_SYS, 0xa04),
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CV1800_GENERAL_PIN(PIN_SD0_D0, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x008, 7,
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CV1800_PINCONF_AREA_SYS, 0xa08),
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CV1800_GENERAL_PIN(PIN_SD0_D1, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x00c, 7,
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CV1800_PINCONF_AREA_SYS, 0xa0c),
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CV1800_GENERAL_PIN(PIN_SD0_D2, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x010, 7,
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CV1800_PINCONF_AREA_SYS, 0xa10),
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CV1800_GENERAL_PIN(PIN_SD0_D3, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x014, 7,
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CV1800_PINCONF_AREA_SYS, 0xa14),
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CV1800_GENERAL_PIN(PIN_SD0_CD, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x018, 3,
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CV1800_PINCONF_AREA_SYS, 0x900),
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CV1800_GENERAL_PIN(PIN_SD0_PWR_EN, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x01c, 3,
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CV1800_PINCONF_AREA_SYS, 0x904),
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CV1800_GENERAL_PIN(PIN_SPK_EN, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x020, 3,
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CV1800_PINCONF_AREA_SYS, 0x908),
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CV1800_GENERAL_PIN(PIN_UART0_TX, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x024, 7,
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CV1800_PINCONF_AREA_SYS, 0x90c),
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CV1800_GENERAL_PIN(PIN_UART0_RX, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x028, 7,
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CV1800_PINCONF_AREA_SYS, 0x910),
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CV1800_GENERAL_PIN(PIN_SPINOR_HOLD_X, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x02c, 3,
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CV1800_PINCONF_AREA_SYS, 0x914),
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CV1800_GENERAL_PIN(PIN_SPINOR_SCK, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x030, 3,
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CV1800_PINCONF_AREA_SYS, 0x918),
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CV1800_GENERAL_PIN(PIN_SPINOR_MOSI, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x034, 3,
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CV1800_PINCONF_AREA_SYS, 0x91c),
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CV1800_GENERAL_PIN(PIN_SPINOR_WP_X, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x038, 3,
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CV1800_PINCONF_AREA_SYS, 0x920),
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CV1800_GENERAL_PIN(PIN_SPINOR_MISO, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x03c, 3,
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CV1800_PINCONF_AREA_SYS, 0x924),
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CV1800_GENERAL_PIN(PIN_SPINOR_CS_X, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x040, 3,
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CV1800_PINCONF_AREA_SYS, 0x928),
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CV1800_GENERAL_PIN(PIN_IIC0_SCL, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x04c, 7,
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CV1800_PINCONF_AREA_SYS, 0x934),
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CV1800_GENERAL_PIN(PIN_IIC0_SDA, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x050, 7,
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CV1800_PINCONF_AREA_SYS, 0x938),
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CV1800_GENERAL_PIN(PIN_AUX0, VDDIO_SD0_SPI,
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IO_TYPE_1V8_OR_3V3,
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CV1800_PINCONF_AREA_SYS, 0x054, 7,
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CV1800_PINCONF_AREA_SYS, 0x93c),
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CV1800_GENERAL_PIN(PIN_PWR_VBAT_DET, VDDIO_RTC,
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IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x05c, 0,
|
||||
CV1800_PINCONF_AREA_RTC, 0x004),
|
||||
CV1800_GENERAL_PIN(PIN_PWR_SEQ2, VDDIO_RTC,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x068, 3,
|
||||
CV1800_PINCONF_AREA_RTC, 0x010),
|
||||
CV1800_GENERAL_PIN(PIN_XTAL_XIN, VDDIO_RTC,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x074, 0,
|
||||
CV1800_PINCONF_AREA_RTC, 0x020),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_GPIO0, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x088, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x034),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_GPIO1, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x084, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x030),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_D3, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x08c, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x038),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_D2, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x090, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x03c),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_D1, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x094, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x040),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_D0, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x098, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x044),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_CMD, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x09c, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x048),
|
||||
CV1800_GENERAL_PIN(PIN_SD1_CLK, VDD33A_ETH_USB_SD1,
|
||||
IO_TYPE_1V8_OR_3V3,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0a0, 7,
|
||||
CV1800_PINCONF_AREA_RTC, 0x04c),
|
||||
CV1800_GENERAL_PIN(PIN_ADC1, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0a8, 6,
|
||||
CV1800_PINCONF_AREA_SYS, 0x804),
|
||||
CV1800_GENERAL_PIN(PIN_USB_VBUS_DET, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0ac, 6,
|
||||
CV1800_PINCONF_AREA_SYS, 0x808),
|
||||
CV1800_FUNC_PIN(PIN_ETH_TXP, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_ETH,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0c0, 7),
|
||||
CV1800_FUNC_PIN(PIN_ETH_TXM, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_ETH,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0c4, 7),
|
||||
CV1800_FUNC_PIN(PIN_ETH_RXP, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_ETH,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0c8, 7),
|
||||
CV1800_FUNC_PIN(PIN_ETH_RXM, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_ETH,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0cc, 7),
|
||||
CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4N, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0d4, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0bc, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc04),
|
||||
CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX4P, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0d8, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0b8, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc08),
|
||||
CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3N, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0dc, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0b0, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc0c),
|
||||
CV1800_GENERATE_PIN_MUX2(PIN_MIPIRX3P, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0e0, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0b4, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc10),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX2N, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0e4, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc14),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX2P, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0e8, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc18),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX1N, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0ec, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc1c),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX1P, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0f0, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc20),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX0N, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0f4, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc24),
|
||||
CV1800_GENERAL_PIN(PIN_MIPIRX0P, VDD18A_USB_PLL_ETH_CSI,
|
||||
IO_TYPE_1V8_ONLY,
|
||||
CV1800_PINCONF_AREA_SYS, 0x0f8, 7,
|
||||
CV1800_PINCONF_AREA_SYS, 0xc28),
|
||||
CV1800_FUNC_PIN(PIN_AUD_AINL_MIC, VDD18A_AUD,
|
||||
IO_TYPE_AUDIO,
|
||||
CV1800_PINCONF_AREA_SYS, 0x120, 5),
|
||||
};
|
||||
|
||||
static const struct cv1800_pinctrl_data cv1800b_pindata = {
|
||||
.pins = cv1800b_pins,
|
||||
.pindata = cv1800b_pin_data,
|
||||
.pdnames = cv1800b_power_domain_desc,
|
||||
.vddio_ops = &cv1800b_vddio_cfg_ops,
|
||||
.npins = ARRAY_SIZE(cv1800b_pins),
|
||||
.npd = ARRAY_SIZE(cv1800b_power_domain_desc),
|
||||
};
|
||||
|
||||
static const struct of_device_id cv1800b_pinctrl_ids[] = {
|
||||
{ .compatible = "sophgo,cv1800b-pinctrl", .data = &cv1800b_pindata },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, cv1800b_pinctrl_ids);
|
||||
|
||||
static struct platform_driver cv1800b_pinctrl_driver = {
|
||||
.probe = cv1800_pinctrl_probe,
|
||||
.driver = {
|
||||
.name = "cv1800b-pinctrl",
|
||||
.suppress_bind_attrs = true,
|
||||
.of_match_table = cv1800b_pinctrl_ids,
|
||||
},
|
||||
};
|
||||
module_platform_driver(cv1800b_pinctrl_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Pinctrl driver for the CV1800B series SoC");
|
||||
MODULE_LICENSE("GPL");
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,155 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com>
|
||||
*/
|
||||
|
||||
#ifndef _PINCTRL_SOPHGO_CV18XX_H
|
||||
#define _PINCTRL_SOPHGO_CV18XX_H
|
||||
|
||||
#include <linux/bits.h>
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
|
||||
enum cv1800_pin_io_type {
|
||||
IO_TYPE_1V8_ONLY = 0,
|
||||
IO_TYPE_1V8_OR_3V3 = 1,
|
||||
IO_TYPE_AUDIO = 2,
|
||||
IO_TYPE_ETH = 3
|
||||
};
|
||||
|
||||
#define CV1800_PINCONF_AREA_SYS 0
|
||||
#define CV1800_PINCONF_AREA_RTC 1
|
||||
|
||||
struct cv1800_pinmux {
|
||||
u16 offset;
|
||||
u8 area;
|
||||
u8 max;
|
||||
};
|
||||
|
||||
struct cv1800_pinmux2 {
|
||||
u16 offset;
|
||||
u8 area;
|
||||
u8 max;
|
||||
u8 pfunc;
|
||||
};
|
||||
|
||||
struct cv1800_pinconf {
|
||||
u16 offset;
|
||||
u8 area;
|
||||
};
|
||||
|
||||
#define CV1800_PIN_HAVE_MUX2 BIT(0)
|
||||
#define CV1800_PIN_IO_TYPE GENMASK(2, 1)
|
||||
|
||||
#define CV1800_PIN_FLAG_IO_TYPE(type) \
|
||||
FIELD_PREP_CONST(CV1800_PIN_IO_TYPE, type)
|
||||
struct cv1800_pin {
|
||||
u16 pin;
|
||||
u16 flags;
|
||||
u8 power_domain;
|
||||
struct cv1800_pinmux mux;
|
||||
struct cv1800_pinmux2 mux2;
|
||||
struct cv1800_pinconf conf;
|
||||
};
|
||||
|
||||
#define PIN_POWER_STATE_1V8 1800
|
||||
#define PIN_POWER_STATE_3V3 3300
|
||||
|
||||
/**
|
||||
* struct cv1800_vddio_cfg_ops - pin vddio operations
|
||||
*
|
||||
* @get_pull_up: get resistor for pull up;
|
||||
* @get_pull_down: get resistor for pull down.
|
||||
* @get_oc_map: get mapping for typical low level output current value to
|
||||
* register value map.
|
||||
* @get_schmitt_map: get mapping for register value to typical schmitt
|
||||
* threshold.
|
||||
*/
|
||||
struct cv1800_vddio_cfg_ops {
|
||||
int (*get_pull_up)(struct cv1800_pin *pin, const u32 *psmap);
|
||||
int (*get_pull_down)(struct cv1800_pin *pin, const u32 *psmap);
|
||||
int (*get_oc_map)(struct cv1800_pin *pin, const u32 *psmap,
|
||||
const u32 **map);
|
||||
int (*get_schmitt_map)(struct cv1800_pin *pin, const u32 *psmap,
|
||||
const u32 **map);
|
||||
};
|
||||
|
||||
struct cv1800_pinctrl_data {
|
||||
const struct pinctrl_pin_desc *pins;
|
||||
const struct cv1800_pin *pindata;
|
||||
const char * const *pdnames;
|
||||
const struct cv1800_vddio_cfg_ops *vddio_ops;
|
||||
u16 npins;
|
||||
u16 npd;
|
||||
};
|
||||
|
||||
static inline enum cv1800_pin_io_type cv1800_pin_io_type(struct cv1800_pin *pin)
|
||||
{
|
||||
return FIELD_GET(CV1800_PIN_IO_TYPE, pin->flags);
|
||||
};
|
||||
|
||||
int cv1800_pinctrl_probe(struct platform_device *pdev);
|
||||
|
||||
#define CV1800_FUNC_PIN(_id, _power_domain, _type, \
|
||||
_mux_area, _mux_offset, _mux_func_max) \
|
||||
{ \
|
||||
.pin = (_id), \
|
||||
.power_domain = (_power_domain), \
|
||||
.flags = CV1800_PIN_FLAG_IO_TYPE(_type), \
|
||||
.mux = { \
|
||||
.area = (_mux_area), \
|
||||
.offset = (_mux_offset), \
|
||||
.max = (_mux_func_max), \
|
||||
}, \
|
||||
}
|
||||
|
||||
#define CV1800_GENERAL_PIN(_id, _power_domain, _type, \
|
||||
_mux_area, _mux_offset, _mux_func_max, \
|
||||
_conf_area, _conf_offset) \
|
||||
{ \
|
||||
.pin = (_id), \
|
||||
.power_domain = (_power_domain), \
|
||||
.flags = CV1800_PIN_FLAG_IO_TYPE(_type), \
|
||||
.mux = { \
|
||||
.area = (_mux_area), \
|
||||
.offset = (_mux_offset), \
|
||||
.max = (_mux_func_max), \
|
||||
}, \
|
||||
.conf = { \
|
||||
.area = (_conf_area), \
|
||||
.offset = (_conf_offset), \
|
||||
}, \
|
||||
}
|
||||
|
||||
#define CV1800_GENERATE_PIN_MUX2(_id, _power_domain, _type, \
|
||||
_mux_area, _mux_offset, _mux_func_max, \
|
||||
_mux2_area, _mux2_offset, \
|
||||
_mux2_func_max, \
|
||||
_conf_area, _conf_offset) \
|
||||
{ \
|
||||
.pin = (_id), \
|
||||
.power_domain = (_power_domain), \
|
||||
.flags = CV1800_PIN_FLAG_IO_TYPE(_type) | \
|
||||
CV1800_PIN_HAVE_MUX2, \
|
||||
.mux = { \
|
||||
.area = (_mux_area), \
|
||||
.offset = (_mux_offset), \
|
||||
.max = (_mux_func_max), \
|
||||
}, \
|
||||
.mux2 = { \
|
||||
.area = (_mux2_area), \
|
||||
.offset = (_mux2_offset), \
|
||||
.max = (_mux2_func_max), \
|
||||
}, \
|
||||
.conf = { \
|
||||
.area = (_conf_area), \
|
||||
.offset = (_conf_offset), \
|
||||
}, \
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user