mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'dma-mapping-5.3' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig:
- move the USB special case that bounced DMA through a device bar into
the USB code instead of handling it in the common DMA code (Laurentiu
Tudor and Fredrik Noring)
- don't dip into the global CMA pool for single page allocations
(Nicolin Chen)
- fix a crash when allocating memory for the atomic pool failed during
boot (Florian Fainelli)
- move support for MIPS-style uncached segments to the common code and
use that for MIPS and nios2 (me)
- make support for DMA_ATTR_NON_CONSISTENT and
DMA_ATTR_NO_KERNEL_MAPPING generic (me)
- convert nds32 to the generic remapping allocator (me)
* tag 'dma-mapping-5.3' of git://git.infradead.org/users/hch/dma-mapping: (29 commits)
dma-mapping: mark dma_alloc_need_uncached as __always_inline
MIPS: only select ARCH_HAS_UNCACHED_SEGMENT for non-coherent platforms
usb: host: Fix excessive alignment restriction for local memory allocations
lib/genalloc.c: Add algorithm, align and zeroed family of DMA allocators
nios2: use the generic uncached segment support in dma-direct
nds32: use the generic remapping allocator for coherent DMA allocations
arc: use the generic remapping allocator for coherent DMA allocations
dma-direct: handle DMA_ATTR_NO_KERNEL_MAPPING in common code
dma-direct: handle DMA_ATTR_NON_CONSISTENT in common code
dma-mapping: add a dma_alloc_need_uncached helper
openrisc: remove the partial DMA_ATTR_NON_CONSISTENT support
arc: remove the partial DMA_ATTR_NON_CONSISTENT support
arm-nommu: remove the partial DMA_ATTR_NON_CONSISTENT support
ARM: dma-mapping: allow larger DMA mask than supported
dma-mapping: truncate dma masks to what dma_addr_t can hold
iommu/dma: Apply dma_{alloc,free}_contiguous functions
dma-remap: Avoid de-referencing NULL atomic_pool
MIPS: use the generic uncached segment support in dma-direct
dma-direct: provide generic support for uncached kernel segments
au1100fb: fix DMA API abuse
...
This commit is contained in:
@@ -260,6 +260,14 @@ config ARCH_HAS_SET_MEMORY
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config ARCH_HAS_SET_DIRECT_MAP
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bool
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#
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# Select if arch has an uncached kernel segment and provides the
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# uncached_kernel_address / cached_kernel_address symbols to use it
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#
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config ARCH_HAS_UNCACHED_SEGMENT
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select ARCH_HAS_DMA_PREP_COHERENT
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bool
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# Select if arch init_task must go in the __init_task_data section
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config ARCH_TASK_STRUCT_ON_STACK
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bool
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@@ -7,6 +7,7 @@ config ARC
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def_bool y
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select ARC_TIMERS
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select ARCH_HAS_DMA_COHERENT_TO_PFN
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select ARCH_HAS_DMA_PREP_COHERENT
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_SETUP_DMA_OPS
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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@@ -16,6 +17,7 @@ config ARC
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_DIRECT_REMAP
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select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
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select GENERIC_CLOCKEVENTS
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select GENERIC_FIND_FIRST_BIT
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+10
-61
@@ -8,51 +8,15 @@
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#include <asm/cacheflush.h>
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/*
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* ARCH specific callbacks for generic noncoherent DMA ops (dma/noncoherent.c)
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* ARCH specific callbacks for generic noncoherent DMA ops
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* - hardware IOC not available (or "dma-coherent" not set for device in DT)
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* - But still handle both coherent and non-coherent requests from caller
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*
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* For DMA coherent hardware (IOC) generic code suffices
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*/
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs)
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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unsigned long order = get_order(size);
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struct page *page;
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phys_addr_t paddr;
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void *kvaddr;
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bool need_coh = !(attrs & DMA_ATTR_NON_CONSISTENT);
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/*
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* __GFP_HIGHMEM flag is cleared by upper layer functions
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* (in include/linux/dma-mapping.h) so we should never get a
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* __GFP_HIGHMEM here.
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*/
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BUG_ON(gfp & __GFP_HIGHMEM);
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page = alloc_pages(gfp | __GFP_ZERO, order);
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if (!page)
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return NULL;
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/* This is linear addr (0x8000_0000 based) */
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paddr = page_to_phys(page);
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*dma_handle = paddr;
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/*
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* A coherent buffer needs MMU mapping to enforce non-cachability.
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* kvaddr is kernel Virtual address (0x7000_0000 based).
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*/
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if (need_coh) {
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kvaddr = ioremap_nocache(paddr, size);
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if (kvaddr == NULL) {
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__free_pages(page, order);
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return NULL;
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}
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} else {
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kvaddr = (void *)(u32)paddr;
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}
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/*
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* Evict any existing L1 and/or L2 lines for the backing page
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* in case it was used earlier as a normal "cached" page.
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@@ -63,28 +27,7 @@ void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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* Currently flush_cache_vmap nukes the L1 cache completely which
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* will be optimized as a separate commit
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*/
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if (need_coh)
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dma_cache_wback_inv(paddr, size);
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return kvaddr;
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}
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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phys_addr_t paddr = dma_handle;
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struct page *page = virt_to_page(paddr);
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if (!(attrs & DMA_ATTR_NON_CONSISTENT))
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iounmap((void __force __iomem *)vaddr);
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__free_pages(page, get_order(size));
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}
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long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
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dma_addr_t dma_addr)
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{
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return __phys_to_pfn(dma_addr);
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dma_cache_wback_inv(page_to_phys(page), size);
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}
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/*
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@@ -161,3 +104,9 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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dev_info(dev, "use %sncoherent DMA ops\n",
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dev->dma_coherent ? "" : "non");
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}
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static int __init atomic_pool_init(void)
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{
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return dma_atomic_pool_init(GFP_KERNEL, pgprot_noncached(PAGE_KERNEL));
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}
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postcore_initcall(atomic_pool_init);
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@@ -35,18 +35,7 @@ static void *arm_nommu_dma_alloc(struct device *dev, size_t size,
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unsigned long attrs)
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{
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void *ret;
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/*
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* Try generic allocator first if we are advertised that
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* consistency is not required.
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*/
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if (attrs & DMA_ATTR_NON_CONSISTENT)
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return dma_direct_alloc_pages(dev, size, dma_handle, gfp,
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attrs);
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ret = dma_alloc_from_global_coherent(size, dma_handle);
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void *ret = dma_alloc_from_global_coherent(size, dma_handle);
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/*
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* dma_alloc_from_global_coherent() may fail because:
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@@ -66,16 +55,9 @@ static void arm_nommu_dma_free(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_addr,
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unsigned long attrs)
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{
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if (attrs & DMA_ATTR_NON_CONSISTENT) {
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dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
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} else {
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int ret = dma_release_from_global_coherent(get_order(size),
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cpu_addr);
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int ret = dma_release_from_global_coherent(get_order(size), cpu_addr);
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WARN_ON_ONCE(ret == 0);
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}
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return;
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WARN_ON_ONCE(ret == 0);
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}
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static int arm_nommu_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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@@ -216,25 +216,7 @@ EXPORT_SYMBOL(arm_coherent_dma_ops);
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static int __dma_supported(struct device *dev, u64 mask, bool warn)
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{
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unsigned long max_dma_pfn;
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/*
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* If the mask allows for more memory than we can address,
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* and we actually have that much memory, then we must
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* indicate that DMA to this device is not supported.
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*/
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if (sizeof(mask) != sizeof(dma_addr_t) &&
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mask > (dma_addr_t)~0 &&
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dma_to_pfn(dev, ~0) < max_pfn - 1) {
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if (warn) {
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dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
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mask);
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dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
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}
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return 0;
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}
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max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
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unsigned long max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
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/*
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* Translate the device's DMA mask to a PFN limit. This
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@@ -1121,6 +1121,7 @@ config DMA_NONCOHERENT
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bool
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select ARCH_HAS_DMA_MMAP_PGPROT
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_HAS_UNCACHED_SEGMENT
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select NEED_DMA_MAP_STATE
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select ARCH_HAS_DMA_COHERENT_TO_PFN
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select DMA_NONCOHERENT_CACHE_SYNC
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@@ -258,9 +258,6 @@ extern bool __virt_addr_valid(const volatile void *kaddr);
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((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
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VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
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#define UNCAC_ADDR(addr) (UNCAC_BASE + __pa(addr))
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#define CAC_ADDR(addr) ((unsigned long)__va((addr) - UNCAC_BASE))
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#include <asm-generic/memory_model.h>
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#include <asm-generic/getorder.h>
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@@ -575,10 +575,6 @@ static void *jazz_dma_alloc(struct device *dev, size_t size,
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return NULL;
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}
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if (!(attrs & DMA_ATTR_NON_CONSISTENT)) {
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dma_cache_wback_inv((unsigned long)ret, size);
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ret = (void *)UNCAC_ADDR(ret);
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}
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return ret;
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}
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@@ -586,8 +582,6 @@ static void jazz_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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vdma_free(dma_handle);
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if (!(attrs & DMA_ATTR_NON_CONSISTENT))
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vaddr = (void *)CAC_ADDR((unsigned long)vaddr);
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dma_direct_free_pages(dev, size, vaddr, dma_handle, attrs);
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}
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@@ -62,8 +62,6 @@ void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
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void (*_dma_cache_wback)(unsigned long start, unsigned long size);
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void (*_dma_cache_inv)(unsigned long start, unsigned long size);
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EXPORT_SYMBOL(_dma_cache_wback_inv);
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#endif /* CONFIG_DMA_NONCOHERENT */
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/*
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@@ -44,33 +44,25 @@ static inline bool cpu_needs_post_dma_flush(struct device *dev)
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}
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}
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void *arch_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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void *ret;
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ret = dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
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if (ret && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
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dma_cache_wback_inv((unsigned long) ret, size);
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ret = (void *)UNCAC_ADDR(ret);
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}
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return ret;
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dma_cache_wback_inv((unsigned long)page_address(page), size);
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}
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void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
|
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dma_addr_t dma_addr, unsigned long attrs)
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void *uncached_kernel_address(void *addr)
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{
|
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if (!(attrs & DMA_ATTR_NON_CONSISTENT))
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cpu_addr = (void *)CAC_ADDR((unsigned long)cpu_addr);
|
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dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
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return (void *)(__pa(addr) + UNCAC_BASE);
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}
|
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|
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void *cached_kernel_address(void *addr)
|
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{
|
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return __va(addr) - UNCAC_BASE;
|
||||
}
|
||||
|
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long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
|
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dma_addr_t dma_addr)
|
||||
{
|
||||
unsigned long addr = CAC_ADDR((unsigned long)cpu_addr);
|
||||
return page_to_pfn(virt_to_page((void *)addr));
|
||||
return page_to_pfn(virt_to_page(cached_kernel_address(cpu_addr)));
|
||||
}
|
||||
|
||||
pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
|
||||
|
||||
@@ -7,12 +7,14 @@
|
||||
config NDS32
|
||||
def_bool y
|
||||
select ARCH_32BIT_OFF_T
|
||||
select ARCH_HAS_DMA_PREP_COHERENT
|
||||
select ARCH_HAS_SYNC_DMA_FOR_CPU
|
||||
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
|
||||
select ARCH_WANT_FRAME_POINTERS if FTRACE
|
||||
select CLKSRC_MMIO
|
||||
select CLONE_BACKWARDS
|
||||
select COMMON_CLK
|
||||
select DMA_DIRECT_REMAP
|
||||
select GENERIC_ATOMIC64
|
||||
select GENERIC_CPU_DEVICES
|
||||
select GENERIC_CLOCKEVENTS
|
||||
|
||||
+11
-314
@@ -3,327 +3,13 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/dma-noncoherent.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/slab.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/proc-fns.h>
|
||||
|
||||
/*
|
||||
* This is the page table (2MB) covering uncached, DMA consistent allocations
|
||||
*/
|
||||
static pte_t *consistent_pte;
|
||||
static DEFINE_RAW_SPINLOCK(consistent_lock);
|
||||
|
||||
/*
|
||||
* VM region handling support.
|
||||
*
|
||||
* This should become something generic, handling VM region allocations for
|
||||
* vmalloc and similar (ioremap, module space, etc).
|
||||
*
|
||||
* I envisage vmalloc()'s supporting vm_struct becoming:
|
||||
*
|
||||
* struct vm_struct {
|
||||
* struct vm_region region;
|
||||
* unsigned long flags;
|
||||
* struct page **pages;
|
||||
* unsigned int nr_pages;
|
||||
* unsigned long phys_addr;
|
||||
* };
|
||||
*
|
||||
* get_vm_area() would then call vm_region_alloc with an appropriate
|
||||
* struct vm_region head (eg):
|
||||
*
|
||||
* struct vm_region vmalloc_head = {
|
||||
* .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
|
||||
* .vm_start = VMALLOC_START,
|
||||
* .vm_end = VMALLOC_END,
|
||||
* };
|
||||
*
|
||||
* However, vmalloc_head.vm_start is variable (typically, it is dependent on
|
||||
* the amount of RAM found at boot time.) I would imagine that get_vm_area()
|
||||
* would have to initialise this each time prior to calling vm_region_alloc().
|
||||
*/
|
||||
struct arch_vm_region {
|
||||
struct list_head vm_list;
|
||||
unsigned long vm_start;
|
||||
unsigned long vm_end;
|
||||
struct page *vm_pages;
|
||||
};
|
||||
|
||||
static struct arch_vm_region consistent_head = {
|
||||
.vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
|
||||
.vm_start = CONSISTENT_BASE,
|
||||
.vm_end = CONSISTENT_END,
|
||||
};
|
||||
|
||||
static struct arch_vm_region *vm_region_alloc(struct arch_vm_region *head,
|
||||
size_t size, int gfp)
|
||||
{
|
||||
unsigned long addr = head->vm_start, end = head->vm_end - size;
|
||||
unsigned long flags;
|
||||
struct arch_vm_region *c, *new;
|
||||
|
||||
new = kmalloc(sizeof(struct arch_vm_region), gfp);
|
||||
if (!new)
|
||||
goto out;
|
||||
|
||||
raw_spin_lock_irqsave(&consistent_lock, flags);
|
||||
|
||||
list_for_each_entry(c, &head->vm_list, vm_list) {
|
||||
if ((addr + size) < addr)
|
||||
goto nospc;
|
||||
if ((addr + size) <= c->vm_start)
|
||||
goto found;
|
||||
addr = c->vm_end;
|
||||
if (addr > end)
|
||||
goto nospc;
|
||||
}
|
||||
|
||||
found:
|
||||
/*
|
||||
* Insert this entry _before_ the one we found.
|
||||
*/
|
||||
list_add_tail(&new->vm_list, &c->vm_list);
|
||||
new->vm_start = addr;
|
||||
new->vm_end = addr + size;
|
||||
|
||||
raw_spin_unlock_irqrestore(&consistent_lock, flags);
|
||||
return new;
|
||||
|
||||
nospc:
|
||||
raw_spin_unlock_irqrestore(&consistent_lock, flags);
|
||||
kfree(new);
|
||||
out:
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static struct arch_vm_region *vm_region_find(struct arch_vm_region *head,
|
||||
unsigned long addr)
|
||||
{
|
||||
struct arch_vm_region *c;
|
||||
|
||||
list_for_each_entry(c, &head->vm_list, vm_list) {
|
||||
if (c->vm_start == addr)
|
||||
goto out;
|
||||
}
|
||||
c = NULL;
|
||||
out:
|
||||
return c;
|
||||
}
|
||||
|
||||
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
|
||||
gfp_t gfp, unsigned long attrs)
|
||||
{
|
||||
struct page *page;
|
||||
struct arch_vm_region *c;
|
||||
unsigned long order;
|
||||
u64 mask = ~0ULL, limit;
|
||||
pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
|
||||
|
||||
if (!consistent_pte) {
|
||||
pr_err("%s: not initialized\n", __func__);
|
||||
dump_stack();
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (dev) {
|
||||
mask = dev->coherent_dma_mask;
|
||||
|
||||
/*
|
||||
* Sanity check the DMA mask - it must be non-zero, and
|
||||
* must be able to be satisfied by a DMA allocation.
|
||||
*/
|
||||
if (mask == 0) {
|
||||
dev_warn(dev, "coherent DMA mask is unset\n");
|
||||
goto no_page;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Sanity check the allocation size.
|
||||
*/
|
||||
size = PAGE_ALIGN(size);
|
||||
limit = (mask + 1) & ~mask;
|
||||
if ((limit && size >= limit) ||
|
||||
size >= (CONSISTENT_END - CONSISTENT_BASE)) {
|
||||
pr_warn("coherent allocation too big "
|
||||
"(requested %#x mask %#llx)\n", size, mask);
|
||||
goto no_page;
|
||||
}
|
||||
|
||||
order = get_order(size);
|
||||
|
||||
if (mask != 0xffffffff)
|
||||
gfp |= GFP_DMA;
|
||||
|
||||
page = alloc_pages(gfp, order);
|
||||
if (!page)
|
||||
goto no_page;
|
||||
|
||||
/*
|
||||
* Invalidate any data that might be lurking in the
|
||||
* kernel direct-mapped region for device DMA.
|
||||
*/
|
||||
{
|
||||
unsigned long kaddr = (unsigned long)page_address(page);
|
||||
memset(page_address(page), 0, size);
|
||||
cpu_dma_wbinval_range(kaddr, kaddr + size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate a virtual address in the consistent mapping region.
|
||||
*/
|
||||
c = vm_region_alloc(&consistent_head, size,
|
||||
gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
|
||||
if (c) {
|
||||
pte_t *pte = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
|
||||
struct page *end = page + (1 << order);
|
||||
|
||||
c->vm_pages = page;
|
||||
|
||||
/*
|
||||
* Set the "dma handle"
|
||||
*/
|
||||
*handle = page_to_phys(page);
|
||||
|
||||
do {
|
||||
BUG_ON(!pte_none(*pte));
|
||||
|
||||
/*
|
||||
* x86 does not mark the pages reserved...
|
||||
*/
|
||||
SetPageReserved(page);
|
||||
set_pte(pte, mk_pte(page, prot));
|
||||
page++;
|
||||
pte++;
|
||||
} while (size -= PAGE_SIZE);
|
||||
|
||||
/*
|
||||
* Free the otherwise unused pages.
|
||||
*/
|
||||
while (page < end) {
|
||||
__free_page(page);
|
||||
page++;
|
||||
}
|
||||
|
||||
return (void *)c->vm_start;
|
||||
}
|
||||
|
||||
if (page)
|
||||
__free_pages(page, order);
|
||||
no_page:
|
||||
*handle = ~0;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
|
||||
dma_addr_t handle, unsigned long attrs)
|
||||
{
|
||||
struct arch_vm_region *c;
|
||||
unsigned long flags, addr;
|
||||
pte_t *ptep;
|
||||
|
||||
size = PAGE_ALIGN(size);
|
||||
|
||||
raw_spin_lock_irqsave(&consistent_lock, flags);
|
||||
|
||||
c = vm_region_find(&consistent_head, (unsigned long)cpu_addr);
|
||||
if (!c)
|
||||
goto no_area;
|
||||
|
||||
if ((c->vm_end - c->vm_start) != size) {
|
||||
pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
|
||||
__func__, c->vm_end - c->vm_start, size);
|
||||
dump_stack();
|
||||
size = c->vm_end - c->vm_start;
|
||||
}
|
||||
|
||||
ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
|
||||
addr = c->vm_start;
|
||||
do {
|
||||
pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
|
||||
unsigned long pfn;
|
||||
|
||||
ptep++;
|
||||
addr += PAGE_SIZE;
|
||||
|
||||
if (!pte_none(pte) && pte_present(pte)) {
|
||||
pfn = pte_pfn(pte);
|
||||
|
||||
if (pfn_valid(pfn)) {
|
||||
struct page *page = pfn_to_page(pfn);
|
||||
|
||||
/*
|
||||
* x86 does not mark the pages reserved...
|
||||
*/
|
||||
ClearPageReserved(page);
|
||||
|
||||
__free_page(page);
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
pr_crit("%s: bad page in kernel page table\n", __func__);
|
||||
} while (size -= PAGE_SIZE);
|
||||
|
||||
flush_tlb_kernel_range(c->vm_start, c->vm_end);
|
||||
|
||||
list_del(&c->vm_list);
|
||||
|
||||
raw_spin_unlock_irqrestore(&consistent_lock, flags);
|
||||
|
||||
kfree(c);
|
||||
return;
|
||||
|
||||
no_area:
|
||||
raw_spin_unlock_irqrestore(&consistent_lock, flags);
|
||||
pr_err("%s: trying to free invalid coherent area: %p\n",
|
||||
__func__, cpu_addr);
|
||||
dump_stack();
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialise the consistent memory allocation.
|
||||
*/
|
||||
static int __init consistent_init(void)
|
||||
{
|
||||
pgd_t *pgd;
|
||||
pmd_t *pmd;
|
||||
pte_t *pte;
|
||||
int ret = 0;
|
||||
|
||||
do {
|
||||
pgd = pgd_offset(&init_mm, CONSISTENT_BASE);
|
||||
pmd = pmd_alloc(&init_mm, pgd, CONSISTENT_BASE);
|
||||
if (!pmd) {
|
||||
pr_err("%s: no pmd tables\n", __func__);
|
||||
ret = -ENOMEM;
|
||||
break;
|
||||
}
|
||||
/* The first level mapping may be created in somewhere.
|
||||
* It's not necessary to warn here. */
|
||||
/* WARN_ON(!pmd_none(*pmd)); */
|
||||
|
||||
pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
|
||||
if (!pte) {
|
||||
ret = -ENOMEM;
|
||||
break;
|
||||
}
|
||||
|
||||
consistent_pte = pte;
|
||||
} while (0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
core_initcall(consistent_init);
|
||||
|
||||
static inline void cache_op(phys_addr_t paddr, size_t size,
|
||||
void (*fn)(unsigned long start, unsigned long end))
|
||||
{
|
||||
@@ -389,3 +75,14 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
|
||||
BUG();
|
||||
}
|
||||
}
|
||||
|
||||
void arch_dma_prep_coherent(struct page *page, size_t size)
|
||||
{
|
||||
cache_op(page_to_phys(page), size, cpu_dma_wbinval_range);
|
||||
}
|
||||
|
||||
static int __init atomic_pool_init(void)
|
||||
{
|
||||
return dma_atomic_pool_init(GFP_KERNEL, pgprot_noncached(PAGE_KERNEL));
|
||||
}
|
||||
postcore_initcall(atomic_pool_init);
|
||||
|
||||
@@ -4,6 +4,7 @@ config NIOS2
|
||||
select ARCH_32BIT_OFF_T
|
||||
select ARCH_HAS_SYNC_DMA_FOR_CPU
|
||||
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
|
||||
select ARCH_HAS_UNCACHED_SEGMENT
|
||||
select ARCH_NO_SWAP
|
||||
select TIMER_OF
|
||||
select GENERIC_ATOMIC64
|
||||
|
||||
@@ -101,12 +101,6 @@ static inline bool pfn_valid(unsigned long pfn)
|
||||
# define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
|
||||
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
||||
# define UNCAC_ADDR(addr) \
|
||||
((void *)((unsigned)(addr) | CONFIG_NIOS2_IO_REGION_BASE))
|
||||
# define CAC_ADDR(addr) \
|
||||
((void *)(((unsigned)(addr) & ~CONFIG_NIOS2_IO_REGION_BASE) | \
|
||||
CONFIG_NIOS2_KERNEL_REGION_BASE))
|
||||
|
||||
#include <asm-generic/memory_model.h>
|
||||
|
||||
#include <asm-generic/getorder.h>
|
||||
|
||||
+18
-22
@@ -60,32 +60,28 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
|
||||
}
|
||||
}
|
||||
|
||||
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
gfp_t gfp, unsigned long attrs)
|
||||
void arch_dma_prep_coherent(struct page *page, size_t size)
|
||||
{
|
||||
void *ret;
|
||||
unsigned long start = (unsigned long)page_address(page);
|
||||
|
||||
/* optimized page clearing */
|
||||
gfp |= __GFP_ZERO;
|
||||
|
||||
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
|
||||
gfp |= GFP_DMA;
|
||||
|
||||
ret = (void *) __get_free_pages(gfp, get_order(size));
|
||||
if (ret != NULL) {
|
||||
*dma_handle = virt_to_phys(ret);
|
||||
flush_dcache_range((unsigned long) ret,
|
||||
(unsigned long) ret + size);
|
||||
ret = UNCAC_ADDR(ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
flush_dcache_range(start, start + size);
|
||||
}
|
||||
|
||||
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle, unsigned long attrs)
|
||||
void *uncached_kernel_address(void *ptr)
|
||||
{
|
||||
unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
|
||||
unsigned long addr = (unsigned long)ptr;
|
||||
|
||||
free_pages(addr, get_order(size));
|
||||
addr |= CONFIG_NIOS2_IO_REGION_BASE;
|
||||
|
||||
return (void *)ptr;
|
||||
}
|
||||
|
||||
void *cached_kernel_address(void *ptr)
|
||||
{
|
||||
unsigned long addr = (unsigned long)ptr;
|
||||
|
||||
addr &= ~CONFIG_NIOS2_IO_REGION_BASE;
|
||||
addr |= CONFIG_NIOS2_KERNEL_REGION_BASE;
|
||||
|
||||
return (void *)ptr;
|
||||
}
|
||||
|
||||
@@ -94,15 +94,13 @@ arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
||||
|
||||
va = (unsigned long)page;
|
||||
|
||||
if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {
|
||||
/*
|
||||
* We need to iterate through the pages, clearing the dcache for
|
||||
* them and setting the cache-inhibit bit.
|
||||
*/
|
||||
if (walk_page_range(va, va + size, &walk)) {
|
||||
free_pages_exact(page, size);
|
||||
return NULL;
|
||||
}
|
||||
/*
|
||||
* We need to iterate through the pages, clearing the dcache for
|
||||
* them and setting the cache-inhibit bit.
|
||||
*/
|
||||
if (walk_page_range(va, va + size, &walk)) {
|
||||
free_pages_exact(page, size);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return (void *)va;
|
||||
@@ -118,10 +116,8 @@ arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
.mm = &init_mm
|
||||
};
|
||||
|
||||
if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) {
|
||||
/* walk_page_range shouldn't be able to fail here */
|
||||
WARN_ON(walk_page_range(va, va + size, &walk));
|
||||
}
|
||||
/* walk_page_range shouldn't be able to fail here */
|
||||
WARN_ON(walk_page_range(va, va + size, &walk));
|
||||
|
||||
free_pages_exact(vaddr, size);
|
||||
}
|
||||
|
||||
@@ -394,17 +394,20 @@ pcxl_dma_init(void)
|
||||
|
||||
__initcall(pcxl_dma_init);
|
||||
|
||||
static void *pcxl_dma_alloc(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
|
||||
void *arch_dma_alloc(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
|
||||
{
|
||||
unsigned long vaddr;
|
||||
unsigned long paddr;
|
||||
int order;
|
||||
|
||||
if (boot_cpu_data.cpu_type != pcxl2 && boot_cpu_data.cpu_type != pcxl)
|
||||
return NULL;
|
||||
|
||||
order = get_order(size);
|
||||
size = 1 << (order + PAGE_SHIFT);
|
||||
vaddr = pcxl_alloc_range(size);
|
||||
paddr = __get_free_pages(flag | __GFP_ZERO, order);
|
||||
paddr = __get_free_pages(gfp | __GFP_ZERO, order);
|
||||
flush_kernel_dcache_range(paddr, size);
|
||||
paddr = __pa(paddr);
|
||||
map_uncached_pages(vaddr, size, paddr);
|
||||
@@ -421,44 +424,19 @@ static void *pcxl_dma_alloc(struct device *dev, size_t size,
|
||||
return (void *)vaddr;
|
||||
}
|
||||
|
||||
static void *pcx_dma_alloc(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
|
||||
{
|
||||
void *addr;
|
||||
|
||||
if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0)
|
||||
return NULL;
|
||||
|
||||
addr = (void *)__get_free_pages(flag | __GFP_ZERO, get_order(size));
|
||||
if (addr)
|
||||
*dma_handle = (dma_addr_t)virt_to_phys(addr);
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
void *arch_dma_alloc(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
|
||||
{
|
||||
|
||||
if (boot_cpu_data.cpu_type == pcxl2 || boot_cpu_data.cpu_type == pcxl)
|
||||
return pcxl_dma_alloc(dev, size, dma_handle, gfp, attrs);
|
||||
else
|
||||
return pcx_dma_alloc(dev, size, dma_handle, gfp, attrs);
|
||||
}
|
||||
|
||||
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle, unsigned long attrs)
|
||||
{
|
||||
int order = get_order(size);
|
||||
|
||||
if (boot_cpu_data.cpu_type == pcxl2 || boot_cpu_data.cpu_type == pcxl) {
|
||||
size = 1 << (order + PAGE_SHIFT);
|
||||
unmap_uncached_pages((unsigned long)vaddr, size);
|
||||
pcxl_free_range((unsigned long)vaddr, size);
|
||||
WARN_ON_ONCE(boot_cpu_data.cpu_type != pcxl2 &&
|
||||
boot_cpu_data.cpu_type != pcxl);
|
||||
|
||||
vaddr = __va(dma_handle);
|
||||
}
|
||||
free_pages((unsigned long)vaddr, get_order(size));
|
||||
size = 1 << (order + PAGE_SHIFT);
|
||||
unmap_uncached_pages((unsigned long)vaddr, size);
|
||||
pcxl_free_range((unsigned long)vaddr, size);
|
||||
|
||||
free_pages((unsigned long)__va(dma_handle), order);
|
||||
}
|
||||
|
||||
void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
|
||||
|
||||
@@ -163,10 +163,6 @@ void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
|
||||
|
||||
*handle = phys_to_dma(dev, page_to_phys(page));
|
||||
|
||||
if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
|
||||
return page;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
if (PageHighMem(page)) {
|
||||
void *p;
|
||||
@@ -192,9 +188,7 @@ void arch_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
||||
struct page *page;
|
||||
|
||||
if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
|
||||
page = vaddr;
|
||||
} else if (platform_vaddr_uncached(vaddr)) {
|
||||
if (platform_vaddr_uncached(vaddr)) {
|
||||
page = virt_to_page(platform_vaddr_to_cached(vaddr));
|
||||
} else {
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
@@ -951,8 +951,8 @@ static void __iommu_dma_free(struct device *dev, size_t size, void *cpu_addr)
|
||||
|
||||
if (pages)
|
||||
__iommu_dma_free_pages(pages, count);
|
||||
if (page && !dma_release_from_contiguous(dev, page, count))
|
||||
__free_pages(page, get_order(alloc_size));
|
||||
if (page)
|
||||
dma_free_contiguous(dev, page, alloc_size);
|
||||
}
|
||||
|
||||
static void iommu_dma_free(struct device *dev, size_t size, void *cpu_addr,
|
||||
@@ -970,12 +970,7 @@ static void *iommu_dma_alloc_pages(struct device *dev, size_t size,
|
||||
struct page *page = NULL;
|
||||
void *cpu_addr;
|
||||
|
||||
if (gfpflags_allow_blocking(gfp))
|
||||
page = dma_alloc_from_contiguous(dev, alloc_size >> PAGE_SHIFT,
|
||||
get_order(alloc_size),
|
||||
gfp & __GFP_NOWARN);
|
||||
if (!page)
|
||||
page = alloc_pages(gfp, get_order(alloc_size));
|
||||
page = dma_alloc_contiguous(dev, alloc_size, gfp);
|
||||
if (!page)
|
||||
return NULL;
|
||||
|
||||
@@ -997,8 +992,7 @@ static void *iommu_dma_alloc_pages(struct device *dev, size_t size,
|
||||
memset(cpu_addr, 0, alloc_size);
|
||||
return cpu_addr;
|
||||
out_free_pages:
|
||||
if (!dma_release_from_contiguous(dev, page, alloc_size >> PAGE_SHIFT))
|
||||
__free_pages(page, get_order(alloc_size));
|
||||
dma_free_contiguous(dev, page, alloc_size);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
@@ -45,6 +45,7 @@ config USB_ARCH_HAS_HCD
|
||||
config USB
|
||||
tristate "Support for Host-side USB"
|
||||
depends on USB_ARCH_HAS_HCD
|
||||
select GENERIC_ALLOCATOR
|
||||
select USB_COMMON
|
||||
select NLS # for UTF-8 strings
|
||||
---help---
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user