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PCI: epf-mhi: Implement mhi_cntrl->flush_async() to flush DMA read/write

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The MHI core needs to make sure that all the current DMA transactions are
completed before removing the channels. So implement the
mhi_cntrl->flush_async() callback by first making sure all the in-flight
DMA operations are completed and then flushing the DMA workqueue.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
This commit is contained in:
Manivannan Sadhasivam
2026-07-30 07:19:51 +02:00
parent 5993e10b82
commit 9656bcd4c3
1 changed files with 10 additions and 0 deletions
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drivers/pci/endpoint/functions/pci-epf-mhi.c
+10
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@@ -644,6 +644,15 @@ err_unlock:
return ret;
}
static void pci_epf_mhi_edma_flush_async(struct mhi_ep_cntrl *mhi_cntrl)
{
struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl);
dmaengine_synchronize(epf_mhi->dma_chan_rx);
dmaengine_synchronize(epf_mhi->dma_chan_tx);
flush_workqueue(epf_mhi->dma_wq);
}
struct epf_dma_filter {
struct device *dev;
u32 dma_mask;
@@ -812,6 +821,7 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf)
mhi_cntrl->write_sync = pci_epf_mhi_edma_write;
mhi_cntrl->read_async = pci_epf_mhi_edma_read_async;
mhi_cntrl->write_async = pci_epf_mhi_edma_write_async;
mhi_cntrl->flush_async = pci_epf_mhi_edma_flush_async;
}
/* Register the MHI EP controller */