mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge branch 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc: (125 commits)
ARM: mach-mxs: fix machines' initializers order
mmc: mxcmmc: explicitly includes mach/hardware.h
arm/imx: explicitly includes mach/hardware.h in pm-imx27.c
arm/imx: remove mx27_setup_weimcs() from mx27.h
arm/imx: explicitly includes mach/hardware.h in mach-kzm_arm11_01.c
arm/imx: remove mx31_setup_weimcs() from mx31.h
ARM: tegra: devices.c should include devices.h
ARM: tegra: cpu-tegra: unexport two functions
ARM: tegra: cpu-tegra: sparse type fix
ARM: tegra: dma: staticify some tables and functions
ARM: tegra: tegra2_clocks: don't export some tables
ARM: tegra: tegra_powergate_is_powered should be static
ARM: tegra: tegra_rtc_read_ms should be static
ARM: tegra: tegra_init_cache should be static
ARM: tegra: pcie: 0 -> NULL changes
ARM: tegra: pcie: include board.h
ARM: tegra: pcie: don't cast __iomem pointers
ARM: tegra: tegra2_clocks: 0 -> NULL changes
ARM: tegra: tegra2_clocks: don't cast __iomem pointers
ARM: tegra: timer: don't cast __iomem pointers
...
Fix up trivial conflicts in
arch/arm/mach-omap2/Makefile,
arch/arm/mach-u300/{Makefile.boot,core.c}
arch/arm/plat-{mxc,omap}/devices.c
This commit is contained in:
commit
952414505f
224 files changed
+5275
-8862
No files matched your search
@@ -861,6 +861,7 @@ config ARCH_U300
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||||
select HAVE_SCHED_CLOCK
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select HAVE_TCM
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select ARM_AMBA
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select ARM_PATCH_PHYS_VIRT
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select ARM_VIC
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select GENERIC_CLOCKEVENTS
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select CLKDEV_LOOKUP
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@@ -3,7 +3,6 @@ CONFIG_SYSVIPC=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_EXPERT=y
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CONFIG_SLAB=y
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CONFIG_MODULES=y
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@@ -13,20 +12,21 @@ CONFIG_MODVERSIONS=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_MXC=y
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CONFIG_MACH_MX31ADS_WM1133_EV1=y
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CONFIG_MACH_MX31LILLY=y
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CONFIG_MACH_MX31LITE=y
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CONFIG_MACH_PCM037=y
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CONFIG_MACH_PCM037_EET=y
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CONFIG_MACH_MX31LITE=y
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CONFIG_MACH_MX31_3DS=y
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CONFIG_MACH_MX31MOBOARD=y
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CONFIG_MACH_MX31LILLY=y
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CONFIG_MACH_QONG=y
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CONFIG_MACH_PCM043=y
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CONFIG_MACH_ARMADILLO5X0=y
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CONFIG_MACH_MX35_3DS=y
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CONFIG_MACH_KZM_ARM11_01=y
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CONFIG_MACH_PCM043=y
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CONFIG_MACH_MX35_3DS=y
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CONFIG_MACH_EUKREA_CPUIMX35=y
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CONFIG_MXC_IRQ_PRIOR=y
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CONFIG_MXC_PWM=y
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CONFIG_ARM_ERRATA_411920=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_PREEMPT=y
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@@ -35,7 +35,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
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CONFIG_ZBOOT_ROM_BSS=0x0
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CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
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CONFIG_VFP=y
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CONFIG_PM=y
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CONFIG_PM_DEBUG=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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@@ -52,7 +51,6 @@ CONFIG_IP_PNP_DHCP=y
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_FW_LOADER=m
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CONFIG_MTD=y
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CONFIG_MTD_PARTITIONS=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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@@ -62,24 +60,27 @@ CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_MXC=y
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CONFIG_MTD_UBI=y
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# CONFIG_BLK_DEV is not set
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CONFIG_MISC_DEVICES=y
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CONFIG_EEPROM_AT24=y
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CONFIG_NETDEVICES=y
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CONFIG_SMSC_PHY=y
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CONFIG_NET_ETHERNET=y
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CONFIG_SMSC911X=y
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CONFIG_DNET=y
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CONFIG_FEC=y
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# CONFIG_NETDEV_1000 is not set
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# CONFIG_NETDEV_10000 is not set
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# CONFIG_INPUT is not set
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# CONFIG_INPUT_MOUSEDEV is not set
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# CONFIG_KEYBOARD_ATKBD is not set
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CONFIG_KEYBOARD_IMX=y
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# CONFIG_INPUT_MOUSE is not set
|
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# CONFIG_SERIO is not set
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# CONFIG_VT is not set
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# CONFIG_LEGACY_PTYS is not set
|
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CONFIG_SERIAL_8250=m
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CONFIG_SERIAL_8250_EXTENDED=y
|
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CONFIG_SERIAL_8250_SHARE_IRQ=y
|
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CONFIG_SERIAL_IMX=y
|
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CONFIG_SERIAL_IMX_CONSOLE=y
|
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# CONFIG_LEGACY_PTYS is not set
|
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# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
@@ -89,12 +90,15 @@ CONFIG_W1=y
|
||||
CONFIG_W1_MASTER_MXC=y
|
||||
CONFIG_W1_SLAVE_THERM=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_IMX2_WDT=y
|
||||
CONFIG_MFD_WM8350_I2C=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_WM8350=y
|
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CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_VIDEO_DEV=y
|
||||
# CONFIG_VIDEO_ALLOW_V4L1 is not set
|
||||
# CONFIG_RC_CORE is not set
|
||||
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
|
||||
CONFIG_SOC_CAMERA=y
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CONFIG_SOC_CAMERA_MT9M001=y
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CONFIG_SOC_CAMERA_MT9M111=y
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@@ -105,9 +109,26 @@ CONFIG_SOC_CAMERA_OV772X=y
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CONFIG_VIDEO_MX3=y
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# CONFIG_RADIO_ADAPTERS is not set
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CONFIG_FB=y
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# CONFIG_USB_SUPPORT is not set
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CONFIG_SOUND=y
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CONFIG_SND=y
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# CONFIG_SND_ARM is not set
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# CONFIG_SND_SPI is not set
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CONFIG_SND_SOC=y
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CONFIG_SND_IMX_SOC=y
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CONFIG_SND_MXC_SOC_WM1133_EV1=y
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CONFIG_SND_SOC_PHYCORE_AC97=y
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CONFIG_SND_SOC_EUKREA_TLV320=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_MXC=y
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CONFIG_USB_GADGET=m
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CONFIG_USB_FSL_USB2=m
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CONFIG_USB_G_SERIAL=m
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CONFIG_USB_ULPI=y
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CONFIG_MMC=y
|
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CONFIG_MMC_MXC=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_MXC=y
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CONFIG_DMADEVICES=y
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# CONFIG_DNOTIFY is not set
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CONFIG_TMPFS=y
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@@ -119,6 +140,5 @@ CONFIG_NFS_V4=y
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CONFIG_ROOT_NFS=y
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# CONFIG_ENABLE_WARN_DEPRECATED is not set
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# CONFIG_ENABLE_MUST_CHECK is not set
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# CONFIG_RCU_CPU_STALL_DETECTOR is not set
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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# CONFIG_CRYPTO_ANSI_CPRNG is not set
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@@ -15,7 +15,12 @@ struct dev_archdata {
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#endif
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};
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|
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struct omap_device;
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|
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struct pdev_archdata {
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#ifdef CONFIG_ARCH_OMAP
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struct omap_device *od;
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#endif
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};
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#endif
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@@ -136,6 +136,7 @@ static struct edma_soc_info da830_edma_cc0_info = {
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.n_cc = 1,
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.queue_tc_mapping = da8xx_queue_tc_mapping,
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.queue_priority_mapping = da8xx_queue_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
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@@ -151,6 +152,7 @@ static struct edma_soc_info da850_edma_cc_info[] = {
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.n_cc = 1,
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.queue_tc_mapping = da8xx_queue_tc_mapping,
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.queue_priority_mapping = da8xx_queue_priority_mapping,
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.default_queue = EVENTQ_1,
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},
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{
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.n_channel = 32,
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@@ -160,6 +162,7 @@ static struct edma_soc_info da850_edma_cc_info[] = {
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.n_cc = 1,
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.queue_tc_mapping = da850_queue_tc_mapping,
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.queue_priority_mapping = da850_queue_priority_mapping,
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.default_queue = EVENTQ_0,
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},
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};
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@@ -80,6 +80,7 @@ static struct edma_soc_info edma_cc0_info = {
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.n_cc = 1,
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.queue_tc_mapping = edma_tc_mapping,
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.queue_priority_mapping = edma_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
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@@ -591,6 +591,7 @@ static struct edma_soc_info edma_cc0_info = {
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.n_cc = 1,
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.queue_tc_mapping = queue_tc_mapping,
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.queue_priority_mapping = queue_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = {
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@@ -514,6 +514,7 @@ static struct edma_soc_info edma_cc0_info = {
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.n_cc = 1,
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.queue_tc_mapping = queue_tc_mapping,
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.queue_priority_mapping = queue_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {
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@@ -555,6 +555,7 @@ static struct edma_soc_info edma_cc0_info = {
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.n_cc = 1,
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.queue_tc_mapping = dm646x_queue_tc_mapping,
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.queue_priority_mapping = dm646x_queue_priority_mapping,
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.default_queue = EVENTQ_1,
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};
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static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = {
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@@ -1435,12 +1435,11 @@ static int __init edma_probe(struct platform_device *pdev)
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goto fail1;
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}
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edma_cc[j] = kmalloc(sizeof(struct edma), GFP_KERNEL);
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edma_cc[j] = kzalloc(sizeof(struct edma), GFP_KERNEL);
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if (!edma_cc[j]) {
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status = -ENOMEM;
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goto fail1;
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}
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memset(edma_cc[j], 0, sizeof(struct edma));
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|
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edma_cc[j]->num_channels = min_t(unsigned, info[j]->n_channel,
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EDMA_MAX_DMACH);
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@@ -1450,8 +1449,6 @@ static int __init edma_probe(struct platform_device *pdev)
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EDMA_MAX_CC);
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edma_cc[j]->default_queue = info[j]->default_queue;
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if (!edma_cc[j]->default_queue)
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edma_cc[j]->default_queue = EVENTQ_1;
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dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
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||||
edmacc_regs_base[j]);
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||||
|
||||
@@ -114,22 +114,7 @@ menu "EXYNOS4 Machines"
|
||||
|
||||
config MACH_SMDKC210
|
||||
bool "SMDKC210"
|
||||
select CPU_EXYNOS4210
|
||||
select S5P_DEV_FIMD0
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select EXYNOS4_DEV_PD
|
||||
select EXYNOS4_DEV_SYSMMU
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select MACH_SMDKV310
|
||||
help
|
||||
Machine support for Samsung SMDKC210
|
||||
|
||||
|
||||
@@ -25,7 +25,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
||||
|
||||
# machine support
|
||||
|
||||
obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o
|
||||
obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o
|
||||
obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
|
||||
obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
|
||||
obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
|
||||
|
||||
@@ -1,309 +0,0 @@
|
||||
/* linux/arch/arm/mach-exynos4/mach-smdkc210.c
|
||||
*
|
||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/lcd.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <video/platform_lcd.h>
|
||||
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/regs-srom.h>
|
||||
#include <plat/regs-fb-v4.h>
|
||||
#include <plat/exynos4.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <plat/iic.h>
|
||||
#include <plat/pd.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/backlight.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
/* Following are default values for UCON, ULCON and UFCON UART registers */
|
||||
#define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
|
||||
S3C2410_UCON_RXILEVEL | \
|
||||
S3C2410_UCON_TXIRQMODE | \
|
||||
S3C2410_UCON_RXIRQMODE | \
|
||||
S3C2410_UCON_RXFIFO_TOI | \
|
||||
S3C2443_UCON_RXERR_IRQEN)
|
||||
|
||||
#define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8
|
||||
|
||||
#define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
|
||||
S5PV210_UFCON_TXTRIG4 | \
|
||||
S5PV210_UFCON_RXTRIG4)
|
||||
|
||||
static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
|
||||
[0] = {
|
||||
.hwport = 0,
|
||||
.flags = 0,
|
||||
.ucon = SMDKC210_UCON_DEFAULT,
|
||||
.ulcon = SMDKC210_ULCON_DEFAULT,
|
||||
.ufcon = SMDKC210_UFCON_DEFAULT,
|
||||
},
|
||||
[1] = {
|
||||
.hwport = 1,
|
||||
.flags = 0,
|
||||
.ucon = SMDKC210_UCON_DEFAULT,
|
||||
.ulcon = SMDKC210_ULCON_DEFAULT,
|
||||
.ufcon = SMDKC210_UFCON_DEFAULT,
|
||||
},
|
||||
[2] = {
|
||||
.hwport = 2,
|
||||
.flags = 0,
|
||||
.ucon = SMDKC210_UCON_DEFAULT,
|
||||
.ulcon = SMDKC210_ULCON_DEFAULT,
|
||||
.ufcon = SMDKC210_UFCON_DEFAULT,
|
||||
},
|
||||
[3] = {
|
||||
.hwport = 3,
|
||||
.flags = 0,
|
||||
.ucon = SMDKC210_UCON_DEFAULT,
|
||||
.ulcon = SMDKC210_ULCON_DEFAULT,
|
||||
.ufcon = SMDKC210_UFCON_DEFAULT,
|
||||
},
|
||||
};
|
||||
|
||||
static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
|
||||
.cd_type = S3C_SDHCI_CD_GPIO,
|
||||
.ext_cd_gpio = EXYNOS4_GPK0(2),
|
||||
.ext_cd_gpio_invert = 1,
|
||||
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
|
||||
#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
|
||||
.max_width = 8,
|
||||
.host_caps = MMC_CAP_8_BIT_DATA,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
|
||||
.cd_type = S3C_SDHCI_CD_GPIO,
|
||||
.ext_cd_gpio = EXYNOS4_GPK0(2),
|
||||
.ext_cd_gpio_invert = 1,
|
||||
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
|
||||
};
|
||||
|
||||
static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
|
||||
.cd_type = S3C_SDHCI_CD_GPIO,
|
||||
.ext_cd_gpio = EXYNOS4_GPK2(2),
|
||||
.ext_cd_gpio_invert = 1,
|
||||
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
|
||||
#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
|
||||
.max_width = 8,
|
||||
.host_caps = MMC_CAP_8_BIT_DATA,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
|
||||
.cd_type = S3C_SDHCI_CD_GPIO,
|
||||
.ext_cd_gpio = EXYNOS4_GPK2(2),
|
||||
.ext_cd_gpio_invert = 1,
|
||||
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
|
||||
};
|
||||
|
||||
static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
|
||||
unsigned int power)
|
||||
{
|
||||
if (power) {
|
||||
#if !defined(CONFIG_BACKLIGHT_PWM)
|
||||
gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
|
||||
gpio_free(EXYNOS4_GPD0(1));
|
||||
#endif
|
||||
/* fire nRESET on power up */
|
||||
gpio_request(EXYNOS4_GPX0(6), "GPX0");
|
||||
|
||||
gpio_direction_output(EXYNOS4_GPX0(6), 1);
|
||||
mdelay(100);
|
||||
|
||||
gpio_set_value(EXYNOS4_GPX0(6), 0);
|
||||
mdelay(10);
|
||||
|
||||
gpio_set_value(EXYNOS4_GPX0(6), 1);
|
||||
mdelay(10);
|
||||
|
||||
gpio_free(EXYNOS4_GPX0(6));
|
||||
} else {
|
||||
#if !defined(CONFIG_BACKLIGHT_PWM)
|
||||
gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
|
||||
gpio_free(EXYNOS4_GPD0(1));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
|
||||
.set_power = lcd_lte480wv_set_power,
|
||||
};
|
||||
|
||||
static struct platform_device smdkc210_lcd_lte480wv = {
|
||||
.name = "platform-lcd",
|
||||
.dev.parent = &s5p_device_fimd0.dev,
|
||||
.dev.platform_data = &smdkc210_lcd_lte480wv_data,
|
||||
};
|
||||
|
||||
static struct s3c_fb_pd_win smdkc210_fb_win0 = {
|
||||
.win_mode = {
|
||||
.left_margin = 13,
|
||||
.right_margin = 8,
|
||||
.upper_margin = 7,
|
||||
.lower_margin = 5,
|
||||
.hsync_len = 3,
|
||||
.vsync_len = 1,
|
||||
.xres = 800,
|
||||
.yres = 480,
|
||||
},
|
||||
.max_bpp = 32,
|
||||
.default_bpp = 24,
|
||||
};
|
||||
|
||||
static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
|
||||
.win[0] = &smdkc210_fb_win0,
|
||||
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
|
||||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
|
||||
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
|
||||
};
|
||||
|
||||
static struct resource smdkc210_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
.start = EXYNOS4_PA_SROM_BANK(1),
|
||||
.end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_EINT(5),
|
||||
.end = IRQ_EINT(5),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config smsc9215_config = {
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||
.flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
.mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
|
||||
};
|
||||
|
||||
static struct platform_device smdkc210_smsc911x = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources),
|
||||
.resource = smdkc210_smsc911x_resources,
|
||||
.dev = {
|
||||
.platform_data = &smsc9215_config,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c_devs1[] __initdata = {
|
||||
{I2C_BOARD_INFO("wm8994", 0x1a),},
|
||||
};
|
||||
|
||||
static struct platform_device *smdkc210_devices[] __initdata = {
|
||||
&s3c_device_hsmmc0,
|
||||
&s3c_device_hsmmc1,
|
||||
&s3c_device_hsmmc2,
|
||||
&s3c_device_hsmmc3,
|
||||
&s3c_device_i2c1,
|
||||
&s3c_device_rtc,
|
||||
&s3c_device_wdt,
|
||||
&exynos4_device_ac97,
|
||||
&exynos4_device_i2s0,
|
||||
&exynos4_device_pd[PD_MFC],
|
||||
&exynos4_device_pd[PD_G3D],
|
||||
&exynos4_device_pd[PD_LCD0],
|
||||
&exynos4_device_pd[PD_LCD1],
|
||||
&exynos4_device_pd[PD_CAM],
|
||||
&exynos4_device_pd[PD_TV],
|
||||
&exynos4_device_pd[PD_GPS],
|
||||
&exynos4_device_sysmmu,
|
||||
&samsung_asoc_dma,
|
||||
&s5p_device_fimd0,
|
||||
&smdkc210_lcd_lte480wv,
|
||||
&smdkc210_smsc911x,
|
||||
};
|
||||
|
||||
static void __init smdkc210_smsc911x_init(void)
|
||||
{
|
||||
u32 cs1;
|
||||
|
||||
/* configure nCS1 width to 16 bits */
|
||||
cs1 = __raw_readl(S5P_SROM_BW) &
|
||||
~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
|
||||
cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
|
||||
(1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
|
||||
(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
|
||||
S5P_SROM_BW__NCS1__SHIFT;
|
||||
__raw_writel(cs1, S5P_SROM_BW);
|
||||
|
||||
/* set timing for nCS1 suitable for ethernet chip */
|
||||
__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
|
||||
(0x9 << S5P_SROM_BCX__TACP__SHIFT) |
|
||||
(0xc << S5P_SROM_BCX__TCAH__SHIFT) |
|
||||
(0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
|
||||
(0x6 << S5P_SROM_BCX__TACC__SHIFT) |
|
||||
(0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
|
||||
(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
|
||||
}
|
||||
|
||||
/* LCD Backlight data */
|
||||
static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
|
||||
.no = EXYNOS4_GPD0(1),
|
||||
.func = S3C_GPIO_SFN(2),
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data smdkc210_bl_data = {
|
||||
.pwm_id = 1,
|
||||
.pwm_period_ns = 1000,
|
||||
};
|
||||
|
||||
static void __init smdkc210_map_io(void)
|
||||
{
|
||||
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
|
||||
}
|
||||
|
||||
static void __init smdkc210_machine_init(void)
|
||||
{
|
||||
s3c_i2c1_set_platdata(NULL);
|
||||
i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
|
||||
|
||||
smdkc210_smsc911x_init();
|
||||
|
||||
s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
|
||||
s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
|
||||
s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
|
||||
s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
|
||||
|
||||
samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
|
||||
s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
|
||||
|
||||
platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
|
||||
}
|
||||
|
||||
MACHINE_START(SMDKC210, "SMDKC210")
|
||||
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
|
||||
.atag_offset = 0x100,
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = smdkc210_map_io,
|
||||
.init_machine = smdkc210_machine_init,
|
||||
.timer = &exynos4_timer,
|
||||
MACHINE_END
|
||||
@@ -9,7 +9,9 @@
|
||||
*/
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/lcd.h>
|
||||
#include <linux/mmc/host.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smsc911x.h>
|
||||
@@ -21,11 +23,14 @@
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
#include <video/platform_lcd.h>
|
||||
#include <plat/regs-serial.h>
|
||||
#include <plat/regs-srom.h>
|
||||
#include <plat/regs-fb-v4.h>
|
||||
#include <plat/exynos4.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/keypad.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <plat/iic.h>
|
||||
@@ -112,6 +117,67 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
|
||||
.clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
|
||||
};
|
||||
|
||||
static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
|
||||
unsigned int power)
|
||||
{
|
||||
if (power) {
|
||||
#if !defined(CONFIG_BACKLIGHT_PWM)
|
||||
gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
|
||||
gpio_free(EXYNOS4_GPD0(1));
|
||||
#endif
|
||||
/* fire nRESET on power up */
|
||||
gpio_request(EXYNOS4_GPX0(6), "GPX0");
|
||||
|
||||
gpio_direction_output(EXYNOS4_GPX0(6), 1);
|
||||
mdelay(100);
|
||||
|
||||
gpio_set_value(EXYNOS4_GPX0(6), 0);
|
||||
mdelay(10);
|
||||
|
||||
gpio_set_value(EXYNOS4_GPX0(6), 1);
|
||||
mdelay(10);
|
||||
|
||||
gpio_free(EXYNOS4_GPX0(6));
|
||||
} else {
|
||||
#if !defined(CONFIG_BACKLIGHT_PWM)
|
||||
gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
|
||||
gpio_free(EXYNOS4_GPD0(1));
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
|
||||
.set_power = lcd_lte480wv_set_power,
|
||||
};
|
||||
|
||||
static struct platform_device smdkv310_lcd_lte480wv = {
|
||||
.name = "platform-lcd",
|
||||
.dev.parent = &s5p_device_fimd0.dev,
|
||||
.dev.platform_data = &smdkv310_lcd_lte480wv_data,
|
||||
};
|
||||
|
||||
static struct s3c_fb_pd_win smdkv310_fb_win0 = {
|
||||
.win_mode = {
|
||||
.left_margin = 13,
|
||||
.right_margin = 8,
|
||||
.upper_margin = 7,
|
||||
.lower_margin = 5,
|
||||
.hsync_len = 3,
|
||||
.vsync_len = 1,
|
||||
.xres = 800,
|
||||
.yres = 480,
|
||||
},
|
||||
.max_bpp = 32,
|
||||
.default_bpp = 24,
|
||||
};
|
||||
|
||||
static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
|
||||
.win[0] = &smdkv310_fb_win0,
|
||||
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
|
||||
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
|
||||
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
|
||||
};
|
||||
|
||||
static struct resource smdkv310_smsc911x_resources[] = {
|
||||
[0] = {
|
||||
.start = EXYNOS4_PA_SROM_BANK(1),
|
||||
@@ -188,6 +254,8 @@ static struct platform_device *smdkv310_devices[] __initdata = {
|
||||
&exynos4_device_sysmmu,
|
||||
&samsung_asoc_dma,
|
||||
&samsung_asoc_idma,
|
||||
&s5p_device_fimd0,
|
||||
&smdkv310_lcd_lte480wv,
|
||||
&smdkv310_smsc911x,
|
||||
&exynos4_device_ahci,
|
||||
};
|
||||
@@ -248,6 +316,7 @@ static void __init smdkv310_machine_init(void)
|
||||
samsung_keypad_set_platdata(&smdkv310_keypad_data);
|
||||
|
||||
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
|
||||
s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
|
||||
|
||||
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
|
||||
}
|
||||
@@ -261,3 +330,12 @@ MACHINE_START(SMDKV310, "SMDKV310")
|
||||
.init_machine = smdkv310_machine_init,
|
||||
.timer = &exynos4_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(SMDKC210, "SMDKC210")
|
||||
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
|
||||
.atag_offset = 0x100,
|
||||
.init_irq = exynos4_init_irq,
|
||||
.map_io = smdkv310_map_io,
|
||||
.init_machine = smdkv310_machine_init,
|
||||
.timer = &exynos4_timer,
|
||||
MACHINE_END
|
||||
@@ -1,16 +1,15 @@
|
||||
obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
|
||||
|
||||
obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
|
||||
obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
|
||||
obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o
|
||||
obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o
|
||||
|
||||
obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o
|
||||
obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o
|
||||
|
||||
obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
|
||||
obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
|
||||
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o
|
||||
obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o
|
||||
|
||||
obj-$(CONFIG_SOC_IMX31) += mm-imx31.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
|
||||
obj-$(CONFIG_SOC_IMX35) += mm-imx35.o cpu-imx35.o clock-imx35.o ehci-imx35.o
|
||||
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
|
||||
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clock-imx31.o iomux-imx31.o ehci-imx31.o
|
||||
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
|
||||
@@ -1,56 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2010 Pengutronix
|
||||
* Sascha Hauer <s.hauer@pengutronix.de>
|
||||
* Juergen Beisert <j.beisert@pengutronix.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it under
|
||||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
static int mxc_init_l2x0(void)
|
||||
{
|
||||
void __iomem *l2x0_base;
|
||||
void __iomem *clkctl_base;
|
||||
|
||||
if (!cpu_is_mx31() && !cpu_is_mx35())
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* First of all, we must repair broken chip settings. There are some
|
||||
* i.MX35 CPUs in the wild, comming with bogus L2 cache settings. These
|
||||
* misconfigured CPUs will run amok immediately when the L2 cache gets enabled.
|
||||
* Workaraound is to setup the correct register setting prior enabling the
|
||||
* L2 cache. This should not hurt already working CPUs, as they are using the
|
||||
* same value.
|
||||
*/
|
||||
#define L2_MEM_VAL 0x10
|
||||
|
||||
clkctl_base = ioremap(MX35_CLKCTL_BASE_ADDR, 4096);
|
||||
if (clkctl_base != NULL) {
|
||||
writel(0x00000515, clkctl_base + L2_MEM_VAL);
|
||||
iounmap(clkctl_base);
|
||||
} else {
|
||||
pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
|
||||
}
|
||||
|
||||
l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
|
||||
if (IS_ERR(l2x0_base)) {
|
||||
printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
|
||||
PTR_ERR(l2x0_base));
|
||||
return 0;
|
||||
}
|
||||
|
||||
l2x0_init(l2x0_base, 0x00030024, 0x00000000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(mxc_init_l2x0);
|
||||
@@ -314,25 +314,19 @@ static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
|
||||
static const struct physmap_flash_data
|
||||
armadillo5x0_nor_flash_pdata __initconst = {
|
||||
.width = 2,
|
||||
.parts = armadillo5x0_nor_flash_partitions,
|
||||
.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
|
||||
};
|
||||
|
||||
static struct resource armadillo5x0_nor_flash_resource = {
|
||||
static const struct resource armadillo5x0_nor_flash_resource __initconst = {
|
||||
.flags = IORESOURCE_MEM,
|
||||
.start = MX31_CS0_BASE_ADDR,
|
||||
.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
|
||||
};
|
||||
|
||||
static struct platform_device armadillo5x0_nor_flash = {
|
||||
.name = "physmap-flash",
|
||||
.id = -1,
|
||||
.num_resources = 1,
|
||||
.resource = &armadillo5x0_nor_flash_resource,
|
||||
};
|
||||
|
||||
/*
|
||||
* FB support
|
||||
*/
|
||||
@@ -514,8 +508,10 @@ static void __init armadillo5x0_init(void)
|
||||
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
|
||||
|
||||
/* Register NOR Flash */
|
||||
mxc_register_device(&armadillo5x0_nor_flash,
|
||||
&armadillo5x0_nor_flash_pdata);
|
||||
platform_device_register_resndata(NULL, "physmap-flash", -1,
|
||||
&armadillo5x0_nor_flash_resource, 1,
|
||||
&armadillo5x0_nor_flash_pdata,
|
||||
sizeof(armadillo5x0_nor_flash_pdata));
|
||||
|
||||
/* Register NAND Flash */
|
||||
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
|
||||
|
||||
@@ -66,7 +66,7 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
|
||||
I2C_BOARD_INFO("tsc2007", 0x48),
|
||||
.type = "tsc2007",
|
||||
.platform_data = &tsc2007_info,
|
||||
.irq = gpio_to_irq(TSC2007_IRQGPIO),
|
||||
.irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
@@ -36,6 +36,7 @@
|
||||
|
||||
#include <mach/clock.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iomux-mx3.h>
|
||||
|
||||
#include "devices-imx31.h"
|
||||
|
||||
@@ -68,23 +68,16 @@ static const struct imxuart_platform_data uart1_pdata __initconst = {
|
||||
* Physmap flash
|
||||
*/
|
||||
|
||||
static struct physmap_flash_data mx1ads_flash_data = {
|
||||
static const struct physmap_flash_data mx1ads_flash_data __initconst = {
|
||||
.width = 4, /* bankwidth in bytes */
|
||||
};
|
||||
|
||||
static struct resource flash_resource = {
|
||||
static const struct resource flash_resource __initconst = {
|
||||
.start = MX1_CS0_PHYS,
|
||||
.end = MX1_CS0_PHYS + SZ_32M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device flash_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.resource = &flash_resource,
|
||||
.num_resources = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
@@ -125,7 +118,9 @@ static void __init mx1ads_init(void)
|
||||
imx1_add_imx_uart1(&uart1_pdata);
|
||||
|
||||
/* Physmap flash */
|
||||
mxc_register_device(&flash_device, &mx1ads_flash_data);
|
||||
platform_device_register_resndata(NULL, "physmap-flash", 0,
|
||||
&flash_resource, 1,
|
||||
&mx1ads_flash_data, sizeof(mx1ads_flash_data));
|
||||
|
||||
/* I2C */
|
||||
i2c_register_board_info(0, mx1ads_i2c_devices,
|
||||
|
||||
@@ -357,7 +357,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
|
||||
.bus_num = 1,
|
||||
.chip_select = 0, /* SS0 */
|
||||
.platform_data = &mc13783_pdata,
|
||||
.irq = gpio_to_irq(PMIC_INT),
|
||||
.irq = IMX_GPIO_TO_IRQ(PMIC_INT),
|
||||
.mode = SPI_CS_HIGH,
|
||||
}, {
|
||||
.modalias = "l4f00242t03",
|
||||
|
||||
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