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isci: Intel(R) C600 Series Chipset Storage Control Unit Driver
Support for the up to 2x4-port 6Gb/s SAS controllers embedded in the chipset. This is a snapshot of the first publicly available version of the driver, commit 4c1db2d0 in the 'historical' branch. git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git historical Signed-off-by: Maciej Trela <maciej.trela@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@@ -830,6 +830,40 @@ config SCSI_GDTH
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To compile this driver as a module, choose M here: the
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module will be called gdth.
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config SCSI_ISCI
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tristate "Intel(R) C600 Series Chipset SAS Controller"
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depends on PCI && SCSI
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# little endian host assumptions
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depends on X86
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# (temporary): dma api misuse
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depends on !DMAR
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# (temporary): known alpha quality driver
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depends on EXPERIMENTAL
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select SCSI_SAS_LIBSAS
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---help---
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This driver supports the 6Gb/s SAS capabilities of the storage
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control unit found in the Intel(R) C600 series chipset.
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The experimental tag will be removed after the driver exits alpha
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choice
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prompt "Default Silicon Revision"
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depends on SCSI_ISCI
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default PBG_HBA_A2
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# temporary A-step silicon is pre-production
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config PBG_HBA_BETA
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bool "B0"
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config PBG_HBA_A2
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bool "A2"
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config PBG_HBA_A0
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bool "A0"
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endchoice
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config SCSI_GENERIC_NCR5380
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tristate "Generic NCR5380/53c400 SCSI PIO support"
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depends on ISA && SCSI
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@@ -73,6 +73,7 @@ obj-$(CONFIG_SCSI_AACRAID) += aacraid/
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obj-$(CONFIG_SCSI_AIC7XXX_OLD) += aic7xxx_old.o
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obj-$(CONFIG_SCSI_AIC94XX) += aic94xx/
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obj-$(CONFIG_SCSI_PM8001) += pm8001/
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obj-$(CONFIG_SCSI_ISCI) += isci/
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obj-$(CONFIG_SCSI_IPS) += ips.o
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obj-$(CONFIG_SCSI_FD_MCS) += fd_mcs.o
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obj-$(CONFIG_SCSI_FUTURE_DOMAIN)+= fdomain.o
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@@ -0,0 +1,30 @@
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#TODO kill SCIC_SDS_4_ENABLED it is always true for this
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#generation of silicon
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EXTRA_CFLAGS += -DSCIC_SDS_4_ENABLED
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#temporary until atapi support ready
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EXTRA_CFLAGS += -DDISABLE_ATAPI
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EXTRA_CFLAGS += -Idrivers/scsi/isci/core/ -Idrivers/scsi/isci/
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obj-$(CONFIG_SCSI_ISCI) += isci.o
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isci-objs := init.o phy.o request.o sata.o \
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remote_device.o port.o timers.o deprecated.o \
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host.o task.o events.o \
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core/scic_sds_controller.o \
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core/scic_sds_remote_device.o \
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core/scic_sds_request.o \
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core/scic_sds_stp_request.o \
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core/scic_sds_stp_packet_request.o \
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core/scic_sds_stp_remote_device.o \
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core/scic_sds_port.o \
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core/scic_sds_port_configuration_agent.o \
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core/scic_sds_phy.o \
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core/scic_sds_ssp_request.o \
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core/scic_sds_remote_node_context.o \
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core/scic_sds_smp_request.o \
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core/scic_sds_smp_remote_device.o \
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core/scic_sds_remote_node_table.o \
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core/scic_sds_unsolicited_frame_control.o \
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core/sci_base_memory_descriptor_list.o \
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core/sci_base_state_machine.o \
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core/sci_util.o
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File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,95 @@
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
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||||
* This program is distributed in the hope that it will be useful, but
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||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
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||||
*
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* BSD LICENSE
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||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SAT_H_
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#define _SAT_H_
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/**
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* This file contains constants and constructs defined in the SCSI to ATA
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* Translation (SAT) T10 standard. For more information please refer to
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* www.t10.org.
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*
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*
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*/
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/**
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*
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*
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* SAT_PROTOCOLS These constants indicate the various protocol values that can
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* be supported in a SAT translator.
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*/
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#define SAT_PROTOCOL_ATA_HARD_RESET 0
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#define SAT_PROTOCOL_SOFT_RESET 1
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#define SAT_PROTOCOL_NON_DATA 3
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#define SAT_PROTOCOL_PIO_DATA_IN 4
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#define SAT_PROTOCOL_PIO_DATA_OUT 5
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#define SAT_PROTOCOL_DMA 6
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#define SAT_PROTOCOL_DMA_QUEUED 7
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#define SAT_PROTOCOL_DEVICE_DIAGNOSTIC 8
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#define SAT_PROTOCOL_DEVICE_RESET 9
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#define SAT_PROTOCOL_UDMA_DATA_IN 10
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#define SAT_PROTOCOL_UDMA_DATA_OUT 11
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#define SAT_PROTOCOL_FPDMA 12
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#define SAT_PROTOCOL_RETURN_RESPONSE_INFO 15
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#define SAT_PROTOCOL_PACKET 0x10
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#define SAT_PROTOCOL_PACKET_NON_DATA (SAT_PROTOCOL_PACKET | 0x0)
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#define SAT_PROTOCOL_PACKET_DMA_DATA_IN (SAT_PROTOCOL_PACKET | 0x1)
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#define SAT_PROTOCOL_PACKET_DMA_DATA_OUT (SAT_PROTOCOL_PACKET | 0x2)
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#define SAT_PROTOCOL_PACKET_PIO_DATA_IN (SAT_PROTOCOL_PACKET | 0x3)
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#define SAT_PROTOCOL_PACKET_PIO_DATA_OUT (SAT_PROTOCOL_PACKET | 0x4)
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#endif /* _SAT_H_ */
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@@ -0,0 +1,280 @@
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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||||
* redistributing this file, you may do so under either license.
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||||
*
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||||
* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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||||
*
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||||
* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
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#ifndef _SATA_H_
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#define _SATA_H_
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#include <linux/types.h>
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/**
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* This file defines all of the SATA releated constants, enumerations, and
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* types. Please note that this file does not necessarily contain an
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* exhaustive list of all contants and commands.
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*
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*
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*/
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/**
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*
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*
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* SATA FIS Types These constants depict the various SATA FIS types devined in
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* the serial ATA specification.
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*/
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#define SATA_FIS_TYPE_REGH2D 0x27
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#define SATA_FIS_TYPE_REGD2H 0x34
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#define SATA_FIS_TYPE_SETDEVBITS 0xA1
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#define SATA_FIS_TYPE_DMA_ACTIVATE 0x39
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#define SATA_FIS_TYPE_DMA_SETUP 0x41
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#define SATA_FIS_TYPE_BIST_ACTIVATE 0x58
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#define SATA_FIS_TYPE_PIO_SETUP 0x5F
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#define SATA_FIS_TYPE_DATA 0x46
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#define SATA_REGISTER_FIS_SIZE 0x20
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/**
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* struct sata_fis_header - This is the common definition for a SATA FIS Header
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* word. A different header word is defined for any FIS type that does not
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* use the standard header.
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*
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*
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*/
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struct sata_fis_header {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved:1;
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u32 direction_flag:1; /* direction */
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u32 interrupt_flag:1;
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u32 command_flag:1; /* command, auto_activate, or notification */
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u32 status:8;
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u32 error:8;
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};
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/**
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* struct sata_fis_reg_h2d - This is the definition for a SATA Host to Device
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* Register FIS.
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*
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*
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*/
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struct sata_fis_reg_h2d {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:3;
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u32 command_flag:1;
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u32 command:8;
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u32 features:8;
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u32 lba_low:8; /* word 1 */
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u32 lba_mid:8;
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u32 lba_high:8;
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u32 device:8;
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u32 lba_low_exp:8; /* word 2 */
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u32 lba_mid_exp:8;
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u32 lba_high_exp:8;
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u32 features_exp:8;
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u32 sector_count:8; /* word 3 */
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u32 sector_count_exp:8;
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u32 reserved1:8;
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u32 control:8;
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u32 reserved2; /* word 4 */
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};
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/**
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* struct sata_fis_reg_d2h - SATA Device To Host FIS
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||||
*
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||||
*
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||||
*/
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struct sata_fis_reg_d2h {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:2;
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u32 irq:1;
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u32 reserved1:1;
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u32 status:8;
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u32 error:8;
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u8 lba_low; /* word 1 */
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u8 lba_mid;
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u8 lba_high;
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u8 device;
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u8 lba_low_exp; /* word 2 */
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u8 lba_mid_exp;
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u8 lba_high_exp;
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||||
u8 reserved;
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||||
u8 sector_count; /* word 3 */
|
||||
u8 sector_count_exp;
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||||
u16 reserved2;
|
||||
u32 reserved3;
|
||||
};
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||||
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||||
/**
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||||
*
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||||
*
|
||||
* Status field bit definitions
|
||||
*/
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||||
#define SATA_FIS_STATUS_DEVBITS_MASK (0x77)
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||||
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||||
/**
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||||
* struct sata_fis_set_dev_bits - SATA Set Device Bits FIS
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sata_fis_set_dev_bits {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 pm_port:4;
|
||||
u32 reserved0:2;
|
||||
u32 irq:1;
|
||||
u32 notification:1;
|
||||
u32 status_low:4;
|
||||
u32 status_high:4;
|
||||
u32 error:8;
|
||||
u32 s_active; /* word 1 */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sata_fis_dma_activate - SATA DMA Activate FIS
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sata_fis_dma_activate {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 pm_port:4;
|
||||
u32 reserved0:24;
|
||||
};
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* The lower 5 bits in the DMA Buffer ID Low field of the DMA Setup are used to
|
||||
* communicate the command tag.
|
||||
*/
|
||||
#define SATA_DMA_SETUP_TAG_ENABLE 0x1F
|
||||
|
||||
#define SATA_DMA_SETUP_AUTO_ACT_ENABLE 0x80
|
||||
|
||||
/**
|
||||
* struct sata_fis_dma_setup - SATA DMA Setup FIS
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sata_fis_dma_setup {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 pm_port:4;
|
||||
u32 reserved_00:1;
|
||||
u32 direction:1;
|
||||
u32 irq:1;
|
||||
u32 auto_activate:1;
|
||||
u32 reserved_01:16;
|
||||
u32 dma_buffer_id_low; /* word 1 */
|
||||
u32 dma_buffer_id_high; /* word 2 */
|
||||
u32 reserved0; /* word 3 */
|
||||
u32 dma_buffer_offset; /* word 4 */
|
||||
u32 dma_transfer_count; /* word 5 */
|
||||
u32 reserved1; /* word 6 */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sata_fis_bist_activate - SATA BIST Activate FIS
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sata_fis_bist_activate {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 reserved0:8;
|
||||
u32 pattern_definition:8;
|
||||
u32 reserved1:8;
|
||||
u32 data1; /* word 1 */
|
||||
u32 data2; /* word 1 */
|
||||
};
|
||||
|
||||
/*
|
||||
* SATA PIO Setup FIS
|
||||
*/
|
||||
struct sata_fis_pio_setup {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 pm_port:4;
|
||||
u32 reserved_00:1;
|
||||
u32 direction:1;
|
||||
u32 irq:1;
|
||||
u32 reserved_01:1;
|
||||
u32 status:8;
|
||||
u32 error:8;
|
||||
u32 lba_low:8; /* word 1 */
|
||||
u32 lba_mid:8;
|
||||
u32 lba_high:8;
|
||||
u32 device:8;
|
||||
u32 lba_low_exp:8; /* word 2 */
|
||||
u32 lba_mid_exp:8;
|
||||
u32 lba_high_exp:8;
|
||||
u32 reserved:8;
|
||||
u32 sector_count:8; /* word 3 */
|
||||
u32 sector_count_exp:8;
|
||||
u32 reserved1:8;
|
||||
u32 ending_status:8;
|
||||
u32 transfter_count:16; /* word 4 */
|
||||
u32 reserved3:16;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sata_fis_data - SATA Data FIS
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sata_fis_data {
|
||||
u32 fis_type:8; /* word 0 */
|
||||
u32 pm_port:4;
|
||||
u32 reserved0:24;
|
||||
u8 data[4]; /* word 1 */
|
||||
};
|
||||
|
||||
#endif /* _SATA_H_ */
|
||||
@@ -0,0 +1,474 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* This file defines all of the SCSI related constants, enumerations, and
|
||||
* types. Please note that this file does not necessarily contain an
|
||||
* exhaustive list of all constants, commands, sub-commands, etc.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SCSI_H__
|
||||
#define _SCSI_H__
|
||||
|
||||
|
||||
/*
|
||||
* ******************************************************************************
|
||||
* * C O N S T A N T S A N D M A C R O S
|
||||
* ****************************************************************************** */
|
||||
|
||||
/**
|
||||
* enum _SCSI_TASK_MGMT_REQUEST_CODES - This enumberation contains the
|
||||
* constants to be used for SCSI task management request codes. SAM does
|
||||
* not specify any particular values for these codes so constants used here
|
||||
* are the same as those specified in SAS.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum scsi_task_mgmt_request_codes {
|
||||
SCSI_TASK_REQUEST_ABORT_TASK = 0x01,
|
||||
SCSI_TASK_REQUEST_ABORT_TASK_SET = 0x02,
|
||||
SCSI_TASK_REQUEST_CLEAR_TASK_SET = 0x04,
|
||||
SCSI_TASK_REQUEST_LOGICAL_UNIT_RESET = 0x08,
|
||||
SCSI_TASK_REQUEST_I_T_NEXUS_RESET = 0x10,
|
||||
SCSI_TASK_REQUEST_CLEAR_ACA = 0x40,
|
||||
SCSI_TASK_REQUEST_QUERY_TASK = 0x80,
|
||||
SCSI_TASK_REQUEST_QUERY_TASK_SET = 0x81,
|
||||
SCSI_TASK_REQUEST_QUERY_UNIT_ATTENTION = 0x82,
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* enum _SCSI_TASK_MGMT_RESPONSE_CODES - This enumeration contains all of the
|
||||
* SCSI task management response codes.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum scsi_task_mgmt_response_codes {
|
||||
SCSI_TASK_MGMT_FUNC_COMPLETE = 0,
|
||||
SCSI_INVALID_FRAME = 2,
|
||||
SCSI_TASK_MGMT_FUNC_NOT_SUPPORTED = 4,
|
||||
SCSI_TASK_MGMT_FUNC_FAILED = 5,
|
||||
SCSI_TASK_MGMT_FUNC_SUCCEEDED = 8,
|
||||
SCSI_INVALID_LUN = 9
|
||||
};
|
||||
|
||||
/**
|
||||
* enum _SCSI_SENSE_RESPONSE_CODE - this enumeration depicts the types of sense
|
||||
* data responses as per SPC-3.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum scsi_sense_response_code {
|
||||
SCSI_FIXED_CURRENT_RESPONSE_CODE = 0x70,
|
||||
SCSI_FIXED_DEFERRED_RESPONSE_CODE = 0x71,
|
||||
SCSI_DESCRIPTOR_CURRENT_RESPONSE_CODE = 0x72,
|
||||
SCSI_DESCRIPTOR_DEFERRED_RESPONSE_CODE = 0x73
|
||||
|
||||
};
|
||||
|
||||
/*
|
||||
* This constant represents the valid bit located in byte 0 of a FIXED
|
||||
* format sense data. */
|
||||
#define SCSI_FIXED_SENSE_DATA_VALID_BIT 0x80
|
||||
|
||||
#define SCSI_FIXED_SENSE_DATA_BASE_LENGTH 18
|
||||
|
||||
/* This value is used in the DATAPRES field of the SCSI Response IU. */
|
||||
#define SCSI_RESPONSE_DATA_PRES_SENSE_DATA 0x02
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_SENSE_KEYS These constants delineate all of the SCSI protocol sense key
|
||||
* constants
|
||||
*/
|
||||
#define SCSI_SENSE_NO_SENSE 0x00
|
||||
#define SCSI_SENSE_RECOVERED_ERROR 0x01
|
||||
#define SCSI_SENSE_NOT_READY 0x02
|
||||
#define SCSI_SENSE_MEDIUM_ERROR 0x03
|
||||
#define SCSI_SENSE_HARDWARE_ERROR 0x04
|
||||
#define SCSI_SENSE_ILLEGAL_REQUEST 0x05
|
||||
#define SCSI_SENSE_UNIT_ATTENTION 0x06
|
||||
#define SCSI_SENSE_DATA_PROTECT 0x07
|
||||
#define SCSI_SENSE_BLANK_CHECK 0x08
|
||||
#define SCSI_SENSE_VENDOR_SPECIFIC 0x09
|
||||
#define SCSI_SENSE_COPY_ABORTED 0x0A
|
||||
#define SCSI_SENSE_ABORTED_COMMAND 0x0B
|
||||
#define SCSI_SENSE_VOLUME_OVERFLOW 0x0D
|
||||
#define SCSI_SENSE_MISCOMPARE 0x0E
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_ADDITIONAL_SENSE_CODES These constants delineate all of the SCSI
|
||||
* protocol additional sense code constants.
|
||||
*/
|
||||
#define SCSI_ASC_NO_ADDITIONAL_SENSE 0x00
|
||||
#define SCSI_ASC_INITIALIZING_COMMAND_REQUIRED 0x04
|
||||
#define SCSI_ASC_LUN_SELF_TEST_IN_PROGRESS 0x04
|
||||
#define SCSI_ASC_LUN_FORMAT_IN_PROGRESS 0x04
|
||||
#define SCSI_ASC_LUN_NOT_RESPOND_TO_SELECTION 0x05
|
||||
#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
|
||||
#define SCSI_ASC_INVALID_COMMAND_OPERATION_CODE 0x20
|
||||
#define SCSI_ASC_LBA_OUT_OF_RANGE 0x21
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_CDB 0x24
|
||||
#define SCSI_ASC_INVALID_FIELD_IN_PARM_LIST 0x26
|
||||
#define SCSI_ASC_WRITE_PROTECTED 0x27
|
||||
#define SCSI_ASC_NOT_READY_TO_READY_CHANGE 0x28
|
||||
#define SCSI_ASC_SAVING_PARMS_NOT_SUPPORTED 0x39
|
||||
#define SCSI_ASC_MEDIUM_NOT_PRESENT 0x3A
|
||||
#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
|
||||
#define SCSI_ASC_IU_CRC_ERROR_DETECTED 0x47
|
||||
#define SCSI_ASC_MEDIUM_REMOVAL_REQUEST 0x5A
|
||||
#define SCSI_ASC_COMMAND_SEQUENCE_ERROR 0x2C
|
||||
#define SCSI_ASC_MEDIA_LOAD_OR_EJECT_FAILED 0x53
|
||||
#define SCSI_ASC_HARDWARE_IMPENDING_FAILURE 0x5D
|
||||
#define SCSI_ASC_POWER_STATE_CHANGE 0x5E
|
||||
#define SCSI_DIAGNOSTIC_FAILURE_ON_COMPONENT 0x40
|
||||
#define SCSI_ASC_ATA_DEVICE_FEATURE_NOT_ENABLED 0x67
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_ADDITIONAL_SENSE_CODE_QUALIFIERS This enumeration contains all of the
|
||||
* used SCSI protocol additional sense code qualifier constants.
|
||||
*/
|
||||
#define SCSI_ASCQ_NO_ADDITIONAL_SENSE 0x00
|
||||
#define SCSI_ASCQ_INVALID_FIELD_IN_CDB 0x00
|
||||
#define SCSI_ASCQ_INVALID_FIELD_IN_PARM_LIST 0x00
|
||||
#define SCSI_ASCQ_LUN_NOT_RESPOND_TO_SELECTION 0x00
|
||||
#define SCSI_ASCQ_INTERNAL_TARGET_FAILURE 0x00
|
||||
#define SCSI_ASCQ_LBA_OUT_OF_RANGE 0x00
|
||||
#define SCSI_ASCQ_MEDIUM_NOT_PRESENT 0x00
|
||||
#define SCSI_ASCQ_NOT_READY_TO_READY_CHANGE 0x00
|
||||
#define SCSI_ASCQ_WRITE_PROTECTED 0x00
|
||||
#define SCSI_ASCQ_UNRECOVERED_READ_ERROR 0x00
|
||||
#define SCSI_ASCQ_SAVING_PARMS_NOT_SUPPORTED 0x00
|
||||
#define SCSI_ASCQ_INVALID_COMMAND_OPERATION_CODE 0x00
|
||||
#define SCSI_ASCQ_MEDIUM_REMOVAL_REQUEST 0x01
|
||||
#define SCSI_ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02
|
||||
#define SCSI_ASCQ_IU_CRC_ERROR_DETECTED 0x03
|
||||
#define SCSI_ASCQ_LUN_FORMAT_IN_PROGRESS 0x04
|
||||
#define SCSI_ASCQ_LUN_SELF_TEST_IN_PROGRESS 0x09
|
||||
#define SCSI_ASCQ_GENERAL_HARD_DRIVE_FAILURE 0x10
|
||||
#define SCSI_ASCQ_IDLE_CONDITION_ACTIVATE_BY_COMMAND 0x03
|
||||
#define SCSI_ASCQ_STANDBY_CONDITION_ACTIVATE_BY_COMMAND 0x04
|
||||
#define SCSI_ASCQ_POWER_STATE_CHANGE_TO_IDLE 0x42
|
||||
#define SCSI_ASCQ_POWER_STATE_CHANGE_TO_STANDBY 0x43
|
||||
#define SCSI_ASCQ_ATA_DEVICE_FEATURE_NOT_ENABLED 0x0B
|
||||
#define SCSI_ASCQ_UNRECOVERED_READ_ERROR_AUTO_REALLOCATE_FAIL 0x04
|
||||
|
||||
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_STATUS_CODES These constants define all of the used SCSI status values.
|
||||
*/
|
||||
#define SCSI_STATUS_GOOD 0x00
|
||||
#define SCSI_STATUS_CHECK_CONDITION 0x02
|
||||
#define SCSI_STATUS_CONDITION_MET 0x04
|
||||
#define SCSI_STATUS_BUSY 0x08
|
||||
#define SCSI_STATUS_TASKFULL 0x28
|
||||
#define SCSI_STATUS_ACA 0x30
|
||||
#define SCSI_STATUS_ABORT 0x40
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_OPERATION_CODES These constants delineate all of the SCSI
|
||||
* command/operation codes.
|
||||
*/
|
||||
#define SCSI_INQUIRY 0x12
|
||||
#define SCSI_READ_CAPACITY_10 0x25
|
||||
#define SCSI_SERVICE_ACTION_IN_16 0x9E
|
||||
#define SCSI_TEST_UNIT_READY 0x00
|
||||
#define SCSI_START_STOP_UNIT 0x1B
|
||||
#define SCSI_SYNCHRONIZE_CACHE_10 0x35
|
||||
#define SCSI_SYNCHRONIZE_CACHE_16 0x91
|
||||
#define SCSI_REQUEST_SENSE 0x03
|
||||
#define SCSI_REPORT_LUNS 0xA0
|
||||
#define SCSI_REASSIGN_BLOCKS 0x07
|
||||
#define SCSI_READ_6 0x08
|
||||
#define SCSI_READ_10 0x28
|
||||
#define SCSI_READ_12 0xA8
|
||||
#define SCSI_READ_16 0x88
|
||||
#define SCSI_WRITE_6 0x0A
|
||||
#define SCSI_WRITE_10 0x2A
|
||||
#define SCSI_WRITE_12 0xAA
|
||||
#define SCSI_WRITE_16 0x8A
|
||||
#define SCSI_VERIFY_10 0x2F
|
||||
#define SCSI_VERIFY_12 0xAF
|
||||
#define SCSI_VERIFY_16 0x8F
|
||||
#define SCSI_SEEK_6 0x01
|
||||
#define SCSI_SEEK_10 0x02
|
||||
#define SCSI_WRITE_VERIFY 0x2E
|
||||
#define SCSI_FORMAT_UNIT 0x04
|
||||
#define SCSI_READ_BUFFER 0x3C
|
||||
#define SCSI_WRITE_BUFFER 0x3B
|
||||
#define SCSI_SEND_DIAGNOSTIC 0x1D
|
||||
#define SCSI_RECEIVE_DIAGNOSTIC 0x1C
|
||||
#define SCSI_MODE_SENSE_6 0x1A
|
||||
#define SCSI_MODE_SENSE_10 0x5A
|
||||
#define SCSI_MODE_SELECT_6 0x15
|
||||
#define SCSI_MODE_SELECT_10 0x55
|
||||
#define SCSI_MAINTENANCE_IN 0xA3
|
||||
#define SCSI_LOG_SENSE 0x4D
|
||||
#define SCSI_LOG_SELECT 0x4C
|
||||
#define SCSI_RESERVE_6 0x16
|
||||
#define SCSI_RESERVE_10 0x56
|
||||
#define SCSI_RELEASE_6 0x17
|
||||
#define SCSI_RELEASE_10 0x57
|
||||
#define SCSI_ATA_PASSTHRU_12 0xA1
|
||||
#define SCSI_ATA_PASSTHRU_16 0x85
|
||||
#define SCSI_WRITE_LONG_10 0x3F
|
||||
#define SCSI_WRITE_LONG_16 0x9F
|
||||
#define SCSI_PERSISTENT_RESERVE_IN 0x5E
|
||||
#define SCSI_PERSISTENT_RESERVE_OUT 0x5F
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_SERVICE_ACTION_IN_CODES Service action in operations.
|
||||
*/
|
||||
#define SCSI_SERVICE_ACTION_IN_CODES_READ_CAPACITY_16 0x10
|
||||
|
||||
#define SCSI_SERVICE_ACTION_MASK 0x1f
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_MAINTENANCE_IN_SERVICE_ACTION_CODES MAINTENANCE IN service action codes.
|
||||
*/
|
||||
#define SCSI_REPORT_TASK_MGMT 0x0D
|
||||
#define SCSI_REPORT_OP_CODES 0x0C
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_MODE_PAGE_CONTROLS These constants delineate all of the used SCSI Mode
|
||||
* Page control values.
|
||||
*/
|
||||
#define SCSI_MODE_SENSE_PC_CURRENT 0x0
|
||||
#define SCSI_MODE_SENSE_PC_CHANGEABLE 0x1
|
||||
#define SCSI_MODE_SENSE_PC_DEFAULT 0x2
|
||||
#define SCSI_MODE_SENSE_PC_SAVED 0x3
|
||||
|
||||
#define SCSI_MODE_SENSE_PC_SHIFT 0x06
|
||||
#define SCSI_MODE_SENSE_PAGE_CODE_ENABLE 0x3F
|
||||
#define SCSI_MODE_SENSE_DBD_ENABLE 0x08
|
||||
#define SCSI_MODE_SENSE_LLBAA_ENABLE 0x10
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_MODE_PAGE_CODES These constants delineate all of the used SCSI Mode
|
||||
* Page codes.
|
||||
*/
|
||||
#define SCSI_MODE_PAGE_READ_WRITE_ERROR 0x01
|
||||
#define SCSI_MODE_PAGE_DISCONNECT_RECONNECT 0x02
|
||||
#define SCSI_MODE_PAGE_CACHING 0x08
|
||||
#define SCSI_MODE_PAGE_CONTROL 0x0A
|
||||
#define SCSI_MODE_PAGE_PROTOCOL_SPECIFIC_PORT 0x19
|
||||
#define SCSI_MODE_PAGE_POWER_CONDITION 0x1A
|
||||
#define SCSI_MODE_PAGE_INFORMATIONAL_EXCP_CONTROL 0x1C
|
||||
#define SCSI_MODE_PAGE_ALL_PAGES 0x3F
|
||||
|
||||
#define SCSI_MODE_SENSE_ALL_SUB_PAGES_CODE 0xFF
|
||||
#define SCSI_MODE_SENSE_NO_SUB_PAGES_CODE 0x0
|
||||
#define SCSI_MODE_SENSE_PROTOCOL_PORT_NUM_SUBPAGES 0x1
|
||||
#define SCSI_MODE_PAGE_CACHE_PAGE_WCE_BIT 0x04
|
||||
#define SCSI_MODE_PAGE_CACHE_PAGE_DRA_BIT 0x20
|
||||
#define SCSI_MODE_PAGE_DEXCPT_ENABLE 0x08
|
||||
#define SCSI_MODE_SENSE_HEADER_FUA_ENABLE 0x10
|
||||
#define SCSI_MODE_PAGE_POWER_CONDITION_STANDBY 0x1
|
||||
#define SCSI_MODE_PAGE_POWER_CONDITION_IDLE 0x2
|
||||
|
||||
#define SCSI_MODE_SENSE_6_HEADER_LENGTH 4
|
||||
#define SCSI_MODE_SENSE_10_HEADER_LENGTH 8
|
||||
#define SCSI_MODE_SENSE_STD_BLOCK_DESCRIPTOR_LENGTH 8
|
||||
#define SCSI_MODE_SENSE_LLBA_BLOCK_DESCRIPTOR_LENGTH 16
|
||||
|
||||
#define SCSI_MODE_PAGE_INFORMATIONAL_EXCP_DXCPT_ENABLE 0x08
|
||||
#define SCSI_MODE_PAGE_19_SAS_ID 0x6
|
||||
#define SCSI_MODE_PAGE_19_SUB1_PAGE_NUM 0x1
|
||||
#define SCSI_MODE_PAGE_19_SUB1_PC 0x59
|
||||
|
||||
#define SCSI_MODE_HEADER_MEDIUM_TYPE_SBC 0x00
|
||||
|
||||
/* Mode Select constrains related masks value */
|
||||
#define SCSI_MODE_SELECT_PF_BIT 0x1
|
||||
#define SCSI_MODE_SELECT_PF_MASK 0x10
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_MRIE_BYTE 0x6
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_MRIE_MASK 0x0F
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_SPF_MASK 0x40
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_01_AWRE_MASK 0x80
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_01_ARRE_MASK 0x40
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_01_RC_ERBITS_MASK 0x1F
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_08_FSW_LBCSS_NVDIS 0xC1
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_1C_PERF_TEST 0x84
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_0A_TST_TMF_RLEC 0xF1
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_0A_MODIFIER 0xF0
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_0A_UA_SWP 0x38
|
||||
#define SCSI_MODE_SELECT_MODE_PAGE_0A_TAS_AUTO 0x47
|
||||
|
||||
|
||||
#define SCSI_CONTROL_BYTE_NACA_BIT_ENABLE 0x04
|
||||
#define SCSI_MOVE_FUA_BIT_ENABLE 0x08
|
||||
#define SCSI_READ_CAPACITY_PMI_BIT_ENABLE 0x01
|
||||
#define SCSI_READ_CAPACITY_10_DATA_LENGTH 8
|
||||
#define SCSI_READ_CAPACITY_16_DATA_LENGTH 32
|
||||
|
||||
/* Inquiry constants */
|
||||
#define SCSI_INQUIRY_EVPD_ENABLE 0x01
|
||||
#define SCSI_INQUIRY_PAGE_CODE_OFFSET 0x02
|
||||
#define SCSI_INQUIRY_SUPPORTED_PAGES_PAGE 0x00
|
||||
#define SCSI_INQUIRY_UNIT_SERIAL_NUM_PAGE 0x80
|
||||
#define SCSI_INQUIRY_DEVICE_ID_PAGE 0x83
|
||||
#define SCSI_INQUIRY_ATA_INFORMATION_PAGE 0x89
|
||||
#define SCSI_INQUIRY_BLOCK_DEVICE_PAGE 0xB1
|
||||
#define SCSI_INQUIRY_BLOCK_DEVICE_LENGTH 0x3C
|
||||
#define SCSI_INQUIRY_STANDARD_ALLOCATION_LENGTH 0x24 /* 36 */
|
||||
|
||||
#define SCSI_REQUEST_SENSE_ALLOCATION_LENGTH 0xFC /* 252 */
|
||||
|
||||
/** Defines the log page codes that are use in gathing Smart data
|
||||
*/
|
||||
#define SCSI_LOG_PAGE_SUPPORTED_PAGES 0x00
|
||||
#define SCSI_LOG_PAGE_INFORMATION_EXCEPTION 0x2F
|
||||
#define SCSI_LOG_PAGE_SELF_TEST 0x10
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_INQUIRY_VPD The following are constants used with vital product data
|
||||
* inquiry pages. Values are already shifted into the proper nibble location.
|
||||
*/
|
||||
#define SCSI_PIV_ENABLE 0x80
|
||||
#define SCSI_LUN_ASSOCIATION 0x00
|
||||
#define SCSI_TARGET_PORT_ASSOCIATION 0x10
|
||||
|
||||
#define SCSI_VEN_UNIQUE_IDENTIFIER_TYPE 0x00
|
||||
#define SCSI_NAA_IDENTIFIER_TYPE 0x03
|
||||
|
||||
#define SCSI_T10_IDENTIFIER_TYPE 0x01
|
||||
#define SCSI_BINARY_CODE_SET 0x01
|
||||
#define SCSI_ASCII_CODE_SET 0x02
|
||||
#define SCSI_FC_PROTOCOL_IDENTIFIER 0x00
|
||||
#define SCSI_SAS_PROTOCOL_IDENTIFIER 0x60
|
||||
|
||||
#define SCSI_VERIFY_BYTCHK_ENABLED 0x02
|
||||
|
||||
#define SCSI_SYNCHRONIZE_CACHE_IMMED_ENABLED 0x02
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SCSI_START_STOP_UNIT_POWER_CONDITION_CODES The following are SCSI Start Stop
|
||||
* Unit command Power Condition codes.
|
||||
*/
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_START_VALID 0x0
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_ACTIVE 0x1
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_IDLE 0x2
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_STANDBY 0x3
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_LU_CONTROL 0x7
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_FORCE_S_CONTROL 0xB
|
||||
|
||||
#define SCSI_START_STOP_UNIT_IMMED_MASK 0x1
|
||||
#define SCSI_START_STOP_UNIT_IMMED_SHIFT 0
|
||||
|
||||
#define SCSI_START_STOP_UNIT_START_BIT_MASK 0x1
|
||||
#define SCSI_START_STOP_UNIT_START_BIT_SHIFT 0
|
||||
|
||||
#define SCSI_START_STOP_UNIT_LOEJ_BIT_MASK 0x2
|
||||
#define SCSI_START_STOP_UNIT_LOEJ_BIT_SHIFT 1
|
||||
|
||||
#define SCSI_START_STOP_UNIT_NO_FLUSH_MASK 0x4
|
||||
#define SCSI_START_STOP_UNIT_NO_FLUSH_SHIFT 2
|
||||
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_MODIFIER_MASK 0xF
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_MODIFIER_SHIFT 0
|
||||
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_MASK 0xF0
|
||||
#define SCSI_START_STOP_UNIT_POWER_CONDITION_SHIFT 4
|
||||
|
||||
#define SCSI_LOG_SENSE_PC_FIELD_MASK 0xC0
|
||||
#define SCSI_LOG_SENSE_PC_FIELD_SHIFT 6
|
||||
|
||||
#define SCSI_LOG_SENSE_PAGE_CODE_FIELD_MASK 0x3F
|
||||
#define SCSI_LOG_SENSE_PAGE_CODE_FIELD_SHIFT 0
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* MRIE - Method of reporting informational exceptions codes
|
||||
*/
|
||||
#define NO_REPORTING_INFO_EXCEPTION_CONDITION 0x0
|
||||
#define ASYNCHRONOUS_EVENT_REPORTING 0x1
|
||||
#define ESTABLISH_UNIT_ATTENTION_CONDITION 0x2
|
||||
#define CONDITIONALLY_GENERATE_RECOVERED_ERROR 0x3
|
||||
#define UNCONDITIONALLY_GENERATE_RECOVERED_ERROR 0x4
|
||||
#define GENERATE_NO_SENSE 0x5
|
||||
#define REPORT_INFO_EXCEPTION_CONDITION_ON_REQUEST 0x6
|
||||
|
||||
#define SCSI_INFORMATION_EXCEPTION_DEXCPT_BIT 0x08
|
||||
|
||||
/* Reassign Blocks masks */
|
||||
#define SCSI_REASSIGN_BLOCKS_LONGLBA_BIT 0x02
|
||||
#define SCSI_REASSIGN_BLOCKS_LONGLIST_BIT 0x01
|
||||
|
||||
#endif /* _SCSI_H_ */
|
||||
|
||||
@@ -0,0 +1,156 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SATI_DEVICE_H_
|
||||
#define _SATI_DEVICE_H_
|
||||
|
||||
/**
|
||||
* This file contains all of the defintions for the SATI remote device object.
|
||||
* Some translations require information to be remembered on a per device
|
||||
* basis. This information is stored in the object defined in this file.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sati_types.h"
|
||||
#include "intel_ata.h"
|
||||
|
||||
/**
|
||||
* enum _SATI_DEVICE_STATE - This enumeration depicts the various states
|
||||
* possible for the a translation remote device object.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sati_device_state {
|
||||
SATI_DEVICE_STATE_OPERATIONAL,
|
||||
SATI_DEVICE_STATE_STOPPED,
|
||||
SATI_DEVICE_STATE_STANDBY,
|
||||
SATI_DEVICE_STATE_IDLE,
|
||||
SATI_DEVICE_STATE_DEVICE_FAULT_OCCURRED,
|
||||
SATI_DEVICE_STATE_FORMAT_UNIT_IN_PROGRESS,
|
||||
SATI_DEVICE_STATE_SELF_TEST_IN_PROGRESS,
|
||||
SATI_DEVICE_STATE_SEQUENCE_INCOMPLETE,
|
||||
SATI_DEVICE_STATE_UNIT_ATTENTION_CONDITION
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SATI_DEVICE_CAPABILITIES These constants define the various capabilities
|
||||
* that a remote device may support for which there is an impact on translation.
|
||||
*/
|
||||
#define SATI_DEVICE_CAP_UDMA_ENABLE 0x00000001
|
||||
#define SATI_DEVICE_CAP_NCQ_REQUESTED_ENABLE 0x00000002
|
||||
#define SATI_DEVICE_CAP_NCQ_SUPPORTED_ENABLE 0x00000004
|
||||
#define SATI_DEVICE_CAP_48BIT_ENABLE 0x00000008
|
||||
#define SATI_DEVICE_CAP_DMA_FUA_ENABLE 0x00000010
|
||||
#define SATI_DEVICE_CAP_SMART_SUPPORT 0x00000020
|
||||
#define SATI_DEVICE_CAP_REMOVABLE_MEDIA 0x00000040
|
||||
#define SATI_DEVICE_CAP_SMART_ENABLE 0x00000080
|
||||
#define SATI_DEVICE_CAP_WRITE_UNCORRECTABLE_ENABLE 0x00000100
|
||||
#define SATI_DEVICE_CAP_MULTIPLE_SECTORS_PER_PHYSCIAL_SECTOR 0x00000200
|
||||
#define SATI_DEVICE_CAP_SMART_SELF_TEST_SUPPORT 0x00000400
|
||||
|
||||
|
||||
/**
|
||||
* struct sati_device - The SATI_DEVICE structure define the state of the
|
||||
* remote device with respect to translation.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sati_device {
|
||||
/**
|
||||
* This field simply dictates the state of the SATI device.
|
||||
*/
|
||||
enum sati_device_state state;
|
||||
|
||||
/**
|
||||
* This field indicates features supported by the remote device that
|
||||
* impact translation execution.
|
||||
*/
|
||||
u16 capabilities;
|
||||
|
||||
/**
|
||||
* This field indicates the depth of the native command queue supported
|
||||
* by the device.
|
||||
*/
|
||||
u8 ncq_depth;
|
||||
|
||||
/**
|
||||
* This field stores the additional sense code for a unit attention
|
||||
* condition.
|
||||
*/
|
||||
u8 unit_attention_asc;
|
||||
|
||||
/**
|
||||
* This field indicates the additional sense code qualifier for a unit
|
||||
* attention condition.
|
||||
*/
|
||||
u8 unit_attention_ascq;
|
||||
|
||||
};
|
||||
|
||||
void sati_device_construct(
|
||||
struct sati_device *device,
|
||||
bool is_ncq_enabled,
|
||||
u8 max_ncq_depth);
|
||||
|
||||
void sati_device_update_capabilities(
|
||||
struct sati_device *device,
|
||||
struct ata_identify_device_data *identify);
|
||||
|
||||
#endif /* _SATI_TRANSLATOR_SEQUENCE_H_ */
|
||||
|
||||
@@ -0,0 +1,304 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SATI_TRANSLATOR_SEQUENCE_H_
|
||||
#define _SATI_TRANSLATOR_SEQUENCE_H_
|
||||
|
||||
/**
|
||||
* This file contains all of the defintions for the SATI translator sequence.
|
||||
* A translator sequence is simply a defintion for the various sequences of
|
||||
* commands that occur in this translator.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sati_device.h"
|
||||
|
||||
/**
|
||||
* enum _SATI_TRANSLATOR_SEQUENCE_TYPE - This enumeration defines the possible
|
||||
* sequence types for the translator.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sati_translator_sequence_type {
|
||||
/* SCSI Primary Command (SPC) sequences. */
|
||||
SATI_SEQUENCE_REPORT_LUNS,
|
||||
SATI_SEQUENCE_TEST_UNIT_READY,
|
||||
SATI_SEQUENCE_INQUIRY_STANDARD,
|
||||
SATI_SEQUENCE_INQUIRY_SUPPORTED_PAGES,
|
||||
SATI_SEQUENCE_INQUIRY_SERIAL_NUMBER,
|
||||
SATI_SEQUENCE_INQUIRY_DEVICE_ID,
|
||||
SATI_SEQUENCE_INQUIRY_BLOCK_DEVICE,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_CACHING,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_INFORMATIONAL_EXCP_CONTROL,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_READ_WRITE_ERROR,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_DISCONNECT_RECONNECT,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_CONTROL,
|
||||
SATI_SEQUENCE_MODE_SENSE_6_ALL_PAGES,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_CACHING,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_INFORMATIONAL_EXCP_CONTROL,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_READ_WRITE_ERROR,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_DISCONNECT_RECONNECT,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_CONTROL,
|
||||
SATI_SEQUENCE_MODE_SENSE_10_ALL_PAGES,
|
||||
SATI_SEQUENCE_MODE_SELECT_MODE_PAGE_CACHING,
|
||||
SATI_SEQUENCE_MODE_SELECT_MODE_POWER_CONDITION,
|
||||
SATI_SEQUENCE_MODE_SELECT_MODE_INFORMATION_EXCEPT_CONTROL,
|
||||
|
||||
/* Log Sense Sequences */
|
||||
SATI_SEQUENCE_LOG_SENSE_SELF_TEST_LOG_PAGE,
|
||||
SATI_SEQUENCE_LOG_SENSE_EXTENDED_SELF_TEST_LOG_PAGE,
|
||||
SATI_SEQUENCE_LOG_SENSE_SUPPORTED_LOG_PAGE,
|
||||
SATI_SEQUENCE_LOG_SENSE_INFO_EXCEPTION_LOG_PAGE,
|
||||
|
||||
/* SCSI Block Command (SBC) sequences. */
|
||||
|
||||
SATI_SEQUENCE_READ_6,
|
||||
SATI_SEQUENCE_READ_10,
|
||||
SATI_SEQUENCE_READ_12,
|
||||
SATI_SEQUENCE_READ_16,
|
||||
|
||||
SATI_SEQUENCE_READ_CAPACITY_10,
|
||||
SATI_SEQUENCE_READ_CAPACITY_16,
|
||||
|
||||
SATI_SEQUENCE_SYNCHRONIZE_CACHE,
|
||||
|
||||
SATI_SEQUENCE_VERIFY_10,
|
||||
SATI_SEQUENCE_VERIFY_12,
|
||||
SATI_SEQUENCE_VERIFY_16,
|
||||
|
||||
SATI_SEQUENCE_WRITE_6,
|
||||
SATI_SEQUENCE_WRITE_10,
|
||||
SATI_SEQUENCE_WRITE_12,
|
||||
SATI_SEQUENCE_WRITE_16,
|
||||
|
||||
SATI_SEQUENCE_START_STOP_UNIT,
|
||||
|
||||
SATI_SEQUENCE_REASSIGN_BLOCKS,
|
||||
|
||||
/* SCSI Task Requests sequences */
|
||||
|
||||
SATI_SEQUENCE_LUN_RESET,
|
||||
|
||||
SATI_SEQUENCE_REQUEST_SENSE_SMART_RETURN_STATUS,
|
||||
SATI_SEQUENCE_REQUEST_SENSE_CHECK_POWER_MODE,
|
||||
|
||||
SATI_SEQUENCE_WRITE_LONG
|
||||
|
||||
};
|
||||
|
||||
#define SATI_SEQUENCE_TYPE_READ_MIN SATI_SEQUENCE_READ_6
|
||||
#define SATI_SEQUENCE_TYPE_READ_MAX SATI_SEQUENCE_READ_16
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SATI_SEQUENCE_STATES These constants depict the various state values
|
||||
* associated with a translation sequence.
|
||||
*/
|
||||
#define SATI_SEQUENCE_STATE_INITIAL 0
|
||||
#define SATI_SEQUENCE_STATE_TRANSLATE_DATA 1
|
||||
#define SATI_SEQUENCE_STATE_AWAIT_RESPONSE 2
|
||||
#define SATI_SEQUENCE_STATE_FINAL 3
|
||||
#define SATI_SEQUENCE_STATE_INCOMPLETE 4
|
||||
|
||||
/**
|
||||
*
|
||||
*
|
||||
* SATI_DATA_DIRECTIONS These constants depict the various types of data
|
||||
* directions for a translation sequence. Data can flow in/out (read/write) or
|
||||
* no data at all.
|
||||
*/
|
||||
#define SATI_DATA_DIRECTION_NONE 0
|
||||
#define SATI_DATA_DIRECTION_IN 1
|
||||
#define SATI_DATA_DIRECTION_OUT 2
|
||||
|
||||
/**
|
||||
* struct SATI_MODE_SELECT_PROCESSING_STATE - This structure contains all of
|
||||
* the current processing states for processing mode select 6 and 10
|
||||
* commands' parameter fields.
|
||||
*
|
||||
*
|
||||
*/
|
||||
typedef struct SATI_MODE_SELECT_PROCESSING_STATE {
|
||||
u8 *mode_pages;
|
||||
u32 mode_page_offset;
|
||||
u32 mode_pages_size;
|
||||
u32 size_of_data_processed;
|
||||
u32 total_ata_command_sent;
|
||||
u32 ata_command_sent_for_cmp; /* cmp: current mode page */
|
||||
bool current_mode_page_processed;
|
||||
|
||||
} SATI_MODE_SELECT_PROCESSING_STATE_T;
|
||||
|
||||
|
||||
enum SATI_REASSIGN_BLOCKS_ATA_COMMAND_STATUS {
|
||||
SATI_REASSIGN_BLOCKS_READY_TO_SEND,
|
||||
SATI_REASSIGN_BLOCKS_COMMAND_FAIL,
|
||||
SATI_REASSIGN_BLOCKS_COMMAND_SUCCESS,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sati_reassign_blocks_processing_state - This structure contains all
|
||||
* of the current processing states for processing reassign block command's
|
||||
* parameter fields.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sati_reassign_blocks_processing_state {
|
||||
u32 lba_offset;
|
||||
u32 block_lists_size;
|
||||
u8 lba_size;
|
||||
u32 size_of_data_processed;
|
||||
u32 ata_command_sent_for_current_lba;
|
||||
bool current_lba_processed;
|
||||
enum SATI_REASSIGN_BLOCKS_ATA_COMMAND_STATUS ata_command_status;
|
||||
|
||||
};
|
||||
|
||||
#define SATI_ATAPI_REQUEST_SENSE_CDB_LENGTH 12
|
||||
|
||||
/**
|
||||
* struct sati_atapi_data - The SATI_ATAPI_DATA structure is for sati atapi IO
|
||||
* specific data.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sati_atapi_data {
|
||||
u8 request_sense_cdb[SATI_ATAPI_REQUEST_SENSE_CDB_LENGTH];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sati_translator_sequence - This structure contains all of the
|
||||
* translation information associated with a particular request.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sati_translator_sequence {
|
||||
/**
|
||||
* This field contains the sequence type determined by the SATI.
|
||||
*/
|
||||
u8 type;
|
||||
|
||||
/**
|
||||
* This field indicates the current state for the sequence.
|
||||
*/
|
||||
u8 state;
|
||||
|
||||
/**
|
||||
* This field indicates the data direction (none, read, or write) for
|
||||
* the translated request.
|
||||
*/
|
||||
u8 data_direction;
|
||||
|
||||
/**
|
||||
* This field contains the SATA/ATA protocol to be utilized during
|
||||
* the IO transfer.
|
||||
*/
|
||||
u8 protocol;
|
||||
|
||||
/**
|
||||
* This field is utilized for sequences requiring data translation.
|
||||
* It specifies the amount of data requested by the caller from the
|
||||
* operation. It's necessary, because at times the user requests less
|
||||
* data than is available. Thus, we need to avoid overrunning the
|
||||
* buffer.
|
||||
*/
|
||||
u32 allocation_length;
|
||||
|
||||
/**
|
||||
* This field specifies the amount of data that will actually be
|
||||
* transfered across the wire for this ATA request.
|
||||
*/
|
||||
u32 ata_transfer_length;
|
||||
|
||||
/**
|
||||
* This field specifies the amount of data bytes that have been
|
||||
* set in a translation sequence. It will be incremented every time
|
||||
* a data byte has been set by a sati translation.
|
||||
*/
|
||||
u16 number_data_bytes_set;
|
||||
|
||||
/**
|
||||
* This field indicates whether or not the sense response has been set
|
||||
* by the translation sequence.
|
||||
*/
|
||||
bool is_sense_response_set;
|
||||
|
||||
/**
|
||||
* This field specifies the remote device context for which this
|
||||
* translator sequence is destined.
|
||||
*/
|
||||
struct sati_device *device;
|
||||
|
||||
/**
|
||||
* This field is utilized to provide the translator with memory space
|
||||
* required for translations that utilize multiple requests.
|
||||
*/
|
||||
union {
|
||||
u32 translated_command;
|
||||
u32 move_sector_count;
|
||||
u32 scratch;
|
||||
struct sati_reassign_blocks_processing_state reassign_blocks_process_state;
|
||||
SATI_MODE_SELECT_PROCESSING_STATE_T process_state;
|
||||
struct sati_atapi_data sati_atapi_data;
|
||||
} command_specific_data;
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
#endif /* _SATI_TRANSLATOR_SEQUENCE_H_ */
|
||||
|
||||
@@ -0,0 +1,145 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SATI_TYPES_H_
|
||||
#define _SATI_TYPES_H_
|
||||
|
||||
/**
|
||||
* This file contains various type definitions to be utilized with SCSI to ATA
|
||||
* Translation Implementation.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* enum _SATI_STATUS - This enumeration defines the possible return values from
|
||||
* the SATI translation methods.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sati_status {
|
||||
/**
|
||||
* This indicates that the translation was supported and occurred
|
||||
* without error.
|
||||
*/
|
||||
SATI_SUCCESS,
|
||||
|
||||
/**
|
||||
* This indicates that the translation was supported, occurred without
|
||||
* error, and no additional translation is necessary. This is done in
|
||||
* conditions where the SCSI command doesn't require any interaction with
|
||||
* the remote device.
|
||||
*/
|
||||
SATI_COMPLETE,
|
||||
|
||||
/**
|
||||
* This indicated everything SATI_COMPLETE does in addition to the response data
|
||||
* not using all the memory allocated by the OS.
|
||||
*/
|
||||
SATI_COMPLETE_IO_DONE_EARLY,
|
||||
|
||||
/**
|
||||
* This indicates that translator sequence has finished some specific
|
||||
* command in the sequence, but additional commands are necessary.
|
||||
*/
|
||||
SATI_SEQUENCE_INCOMPLETE,
|
||||
|
||||
/**
|
||||
* This indicates a general failure has occurred for which no further
|
||||
* specification information is available.
|
||||
*/
|
||||
SATI_FAILURE,
|
||||
|
||||
/**
|
||||
* This indicates that the result of the IO request indicates a
|
||||
* failure. The caller should reference the corresponding response
|
||||
* data for further details.
|
||||
*/
|
||||
SATI_FAILURE_CHECK_RESPONSE_DATA,
|
||||
|
||||
/**
|
||||
* This status indicates that the supplied sequence type doesn't map
|
||||
* to an existing definition.
|
||||
*/
|
||||
SATI_FAILURE_INVALID_SEQUENCE_TYPE,
|
||||
|
||||
/**
|
||||
* This status indicates that the supplied sequence state doesn't match
|
||||
* the operation being requested by the user.
|
||||
*/
|
||||
SATI_FAILURE_INVALID_STATE
|
||||
|
||||
};
|
||||
|
||||
#if (!defined(DISABLE_SATI_MODE_SENSE) \
|
||||
|| !defined(DISABLE_SATI_MODE_SELECT) \
|
||||
|| !defined(DISABLE_SATI_REQUEST_SENSE)) \
|
||||
|
||||
#if !defined(ENABLE_SATI_MODE_PAGES)
|
||||
/**
|
||||
*
|
||||
*
|
||||
* This macro enables the common mode page data structures and code. Currently,
|
||||
* MODE SENSE, MODE SELECT, and REQUEST SENSE all make reference to this common
|
||||
* code. As a result, enable the common mode page code if any of these 3 are
|
||||
* being translated.
|
||||
*/
|
||||
#define ENABLE_SATI_MODE_PAGES
|
||||
#endif /* !defined(ENABLE_SATI_MODE_PAGES) */
|
||||
|
||||
#endif /* MODE_SENSE/SELECT/REQUEST_SENSE */
|
||||
|
||||
#endif /* _SATI_TYPES_H_ */
|
||||
|
||||
@@ -0,0 +1,306 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_CONTROLLER_H_
|
||||
#define _SCI_BASE_CONTROLLER_H_
|
||||
|
||||
#include "intel_sas.h"
|
||||
#include "sci_controller_constants.h"
|
||||
#include "sci_base_state.h"
|
||||
#include "sci_base_memory_descriptor_list.h"
|
||||
#include "sci_base_state_machine.h"
|
||||
#include "sci_object.h"
|
||||
|
||||
struct sci_base_memory_descriptor_list;
|
||||
|
||||
/**
|
||||
* enum sci_base_controller_states - This enumeration depicts all the states
|
||||
* for the common controller state machine.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sci_base_controller_states {
|
||||
/**
|
||||
* Simply the initial state for the base controller state machine.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_INITIAL = 0,
|
||||
|
||||
/**
|
||||
* This state indicates that the controller is reset. The memory for
|
||||
* the controller is in it's initial state, but the controller requires
|
||||
* initialization.
|
||||
* This state is entered from the INITIAL state.
|
||||
* This state is entered from the RESETTING state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_RESET,
|
||||
|
||||
/**
|
||||
* This state is typically an action state that indicates the controller
|
||||
* is in the process of initialization. In this state no new IO operations
|
||||
* are permitted.
|
||||
* This state is entered from the RESET state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_INITIALIZING,
|
||||
|
||||
/**
|
||||
* This state indicates that the controller has been successfully
|
||||
* initialized. In this state no new IO operations are permitted.
|
||||
* This state is entered from the INITIALIZING state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_INITIALIZED,
|
||||
|
||||
/**
|
||||
* This state indicates the the controller is in the process of becoming
|
||||
* ready (i.e. starting). In this state no new IO operations are permitted.
|
||||
* This state is entered from the INITIALIZED state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_STARTING,
|
||||
|
||||
/**
|
||||
* This state indicates the controller is now ready. Thus, the user
|
||||
* is able to perform IO operations on the controller.
|
||||
* This state is entered from the STARTING state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_READY,
|
||||
|
||||
/**
|
||||
* This state is typically an action state that indicates the controller
|
||||
* is in the process of resetting. Thus, the user is unable to perform
|
||||
* IO operations on the controller. A reset is considered destructive in
|
||||
* most cases.
|
||||
* This state is entered from the READY state.
|
||||
* This state is entered from the FAILED state.
|
||||
* This state is entered from the STOPPED state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_RESETTING,
|
||||
|
||||
/**
|
||||
* This state indicates that the controller is in the process of stopping.
|
||||
* In this state no new IO operations are permitted, but existing IO
|
||||
* operations are allowed to complete.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_STOPPING,
|
||||
|
||||
/**
|
||||
* This state indicates that the controller has successfully been stopped.
|
||||
* In this state no new IO operations are permitted.
|
||||
* This state is entered from the STOPPING state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_STOPPED,
|
||||
|
||||
/**
|
||||
* This state indicates that the controller could not successfully be
|
||||
* initialized. In this state no new IO operations are permitted.
|
||||
* This state is entered from the INITIALIZING state.
|
||||
* This state is entered from the STARTING state.
|
||||
* This state is entered from the STOPPING state.
|
||||
* This state is entered from the RESETTING state.
|
||||
*/
|
||||
SCI_BASE_CONTROLLER_STATE_FAILED,
|
||||
|
||||
SCI_BASE_CONTROLLER_MAX_STATES
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sci_base_controller - The base controller object abstracts the fields
|
||||
* common to all SCI controller objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_controller {
|
||||
/**
|
||||
* The field specifies that the parent object for the base controller
|
||||
* is the base object itself.
|
||||
*/
|
||||
struct sci_base_object parent;
|
||||
|
||||
/**
|
||||
* This field points to the memory descriptor list associated with this
|
||||
* controller. The MDL indicates the memory requirements necessary for
|
||||
* this controller object.
|
||||
*/
|
||||
struct sci_base_memory_descriptor_list mdl;
|
||||
|
||||
/**
|
||||
* This field contains the information for the base controller state
|
||||
* machine.
|
||||
*/
|
||||
struct sci_base_state_machine state_machine;
|
||||
};
|
||||
|
||||
/* Forward declarations */
|
||||
struct sci_base_remote_device;
|
||||
struct sci_base_request;
|
||||
|
||||
typedef enum sci_status
|
||||
(*sci_base_controller_handler_t)(struct sci_base_controller *);
|
||||
|
||||
typedef enum sci_status
|
||||
(*sci_base_controller_timed_handler_t)(struct sci_base_controller *, u32);
|
||||
|
||||
typedef enum sci_status
|
||||
(*sci_base_controller_request_handler_t)(struct sci_base_controller *,
|
||||
struct sci_base_remote_device *,
|
||||
struct sci_base_request *);
|
||||
|
||||
typedef enum sci_status
|
||||
(*sci_base_controller_start_request_handler_t)(struct sci_base_controller *,
|
||||
struct sci_base_remote_device *,
|
||||
struct sci_base_request *, u16);
|
||||
|
||||
/**
|
||||
* struct sci_base_controller_state_handler - This structure contains all of
|
||||
* the state handler methods common to base controller state machines.
|
||||
* Handler methods provide the ability to change the behavior for user
|
||||
* requests or transitions depending on the state the machine is in.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_controller_state_handler {
|
||||
/**
|
||||
* The start_handler specifies the method invoked when a user attempts to
|
||||
* start a controller.
|
||||
*/
|
||||
sci_base_controller_timed_handler_t start;
|
||||
|
||||
/**
|
||||
* The stop_handler specifies the method invoked when a user attempts to
|
||||
* stop a controller.
|
||||
*/
|
||||
sci_base_controller_timed_handler_t stop;
|
||||
|
||||
/**
|
||||
* The reset_handler specifies the method invoked when a user attempts to
|
||||
* reset a controller.
|
||||
*/
|
||||
sci_base_controller_handler_t reset;
|
||||
|
||||
/**
|
||||
* The initialize_handler specifies the method invoked when a user
|
||||
* attempts to initialize a controller.
|
||||
*/
|
||||
sci_base_controller_handler_t initialize;
|
||||
|
||||
/**
|
||||
* The start_io_handler specifies the method invoked when a user
|
||||
* attempts to start an IO request for a controller.
|
||||
*/
|
||||
sci_base_controller_start_request_handler_t start_io;
|
||||
|
||||
/**
|
||||
* The complete_io_handler specifies the method invoked when a user
|
||||
* attempts to complete an IO request for a controller.
|
||||
*/
|
||||
sci_base_controller_request_handler_t complete_io;
|
||||
|
||||
/**
|
||||
* The continue_io_handler specifies the method invoked when a user
|
||||
* attempts to continue an IO request for a controller.
|
||||
*/
|
||||
sci_base_controller_request_handler_t continue_io;
|
||||
|
||||
/**
|
||||
* The start_task_handler specifies the method invoked when a user
|
||||
* attempts to start a task management request for a controller.
|
||||
*/
|
||||
sci_base_controller_start_request_handler_t start_task;
|
||||
|
||||
/**
|
||||
* The complete_task_handler specifies the method invoked when a user
|
||||
* attempts to complete a task management request for a controller.
|
||||
*/
|
||||
sci_base_controller_request_handler_t complete_task;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_controller_construct() - Construct the base controller
|
||||
* @this_controller: This parameter specifies the base controller to be
|
||||
* constructed.
|
||||
* @state_table: This parameter specifies the table of state definitions to be
|
||||
* utilized for the controller state machine.
|
||||
* @mde_array: This parameter specifies the array of memory descriptor entries
|
||||
* to be managed by this list.
|
||||
* @mde_array_length: This parameter specifies the size of the array of entries.
|
||||
* @next_mdl: This parameter specifies a subsequent MDL object to be managed by
|
||||
* this MDL object.
|
||||
* @oem_parameters: This parameter specifies the original equipment
|
||||
* manufacturer parameters to be utilized by this controller object.
|
||||
*
|
||||
*/
|
||||
static inline void sci_base_controller_construct(
|
||||
struct sci_base_controller *scic_base,
|
||||
const struct sci_base_state *state_table,
|
||||
struct sci_physical_memory_descriptor *mdes,
|
||||
u32 mde_count,
|
||||
struct sci_base_memory_descriptor_list *next_mdl)
|
||||
{
|
||||
scic_base->parent.private = NULL;
|
||||
|
||||
sci_base_state_machine_construct(
|
||||
&scic_base->state_machine,
|
||||
&scic_base->parent,
|
||||
state_table,
|
||||
SCI_BASE_CONTROLLER_STATE_INITIAL
|
||||
);
|
||||
|
||||
sci_base_mdl_construct(&scic_base->mdl, mdes, mde_count, next_mdl);
|
||||
|
||||
sci_base_state_machine_start(&scic_base->state_machine);
|
||||
}
|
||||
|
||||
#endif /* _SCI_BASE_CONTROLLER_H_ */
|
||||
@@ -0,0 +1,159 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* This file contains the base implementation for the memory descriptor list.
|
||||
* This is currently comprised of MDL iterator methods.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sci_environment.h"
|
||||
#include "sci_base_memory_descriptor_list.h"
|
||||
|
||||
/*
|
||||
* ******************************************************************************
|
||||
* * P U B L I C M E T H O D S
|
||||
* ****************************************************************************** */
|
||||
|
||||
void sci_mdl_first_entry(
|
||||
struct sci_base_memory_descriptor_list *base_mdl)
|
||||
{
|
||||
base_mdl->next_index = 0;
|
||||
|
||||
/*
|
||||
* If this MDL is managing another MDL, then recursively rewind that MDL
|
||||
* object as well. */
|
||||
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
|
||||
sci_mdl_first_entry(base_mdl->next_mdl);
|
||||
}
|
||||
|
||||
|
||||
void sci_mdl_next_entry(
|
||||
struct sci_base_memory_descriptor_list *base_mdl)
|
||||
{
|
||||
/*
|
||||
* If there is at least one more entry left in the array, then change
|
||||
* the next pointer to it. */
|
||||
if (base_mdl->next_index < base_mdl->length)
|
||||
base_mdl->next_index++;
|
||||
else if (base_mdl->next_index == base_mdl->length) {
|
||||
/*
|
||||
* This MDL has exhausted it's set of entries. If this MDL is managing
|
||||
* another MDL, then start iterating through that MDL. */
|
||||
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
|
||||
sci_mdl_next_entry(base_mdl->next_mdl);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
struct sci_physical_memory_descriptor *sci_mdl_get_current_entry(
|
||||
struct sci_base_memory_descriptor_list *base_mdl)
|
||||
{
|
||||
if (base_mdl->next_index < base_mdl->length)
|
||||
return &base_mdl->mde_array[base_mdl->next_index];
|
||||
else if (base_mdl->next_index == base_mdl->length) {
|
||||
/*
|
||||
* This MDL has exhausted it's set of entries. If this MDL is managing
|
||||
* another MDL, then return it's current entry. */
|
||||
if (base_mdl->next_mdl != SCI_INVALID_HANDLE)
|
||||
return sci_mdl_get_current_entry(base_mdl->next_mdl);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* ******************************************************************************
|
||||
* * P R O T E C T E D M E T H O D S
|
||||
* ****************************************************************************** */
|
||||
|
||||
void sci_base_mdl_construct(
|
||||
struct sci_base_memory_descriptor_list *mdl,
|
||||
struct sci_physical_memory_descriptor *mde_array,
|
||||
u32 mde_array_length,
|
||||
struct sci_base_memory_descriptor_list *next_mdl)
|
||||
{
|
||||
mdl->length = mde_array_length;
|
||||
mdl->mde_array = mde_array;
|
||||
mdl->next_index = 0;
|
||||
mdl->next_mdl = next_mdl;
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------------- */
|
||||
|
||||
bool sci_base_mde_is_valid(
|
||||
struct sci_physical_memory_descriptor *mde,
|
||||
u32 alignment,
|
||||
u32 size,
|
||||
u16 attributes)
|
||||
{
|
||||
/* Only need the lower 32 bits to ensure alignment is met. */
|
||||
u32 physical_address = lower_32_bits(mde->physical_address);
|
||||
|
||||
if (
|
||||
((((unsigned long)mde->virtual_address) & (alignment - 1)) != 0)
|
||||
|| ((physical_address & (alignment - 1)) != 0)
|
||||
|| (mde->constant_memory_alignment != alignment)
|
||||
|| (mde->constant_memory_size != size)
|
||||
|| (mde->virtual_address == NULL)
|
||||
|| (mde->constant_memory_attributes != attributes)
|
||||
) {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,155 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_
|
||||
#define _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_
|
||||
|
||||
/**
|
||||
* This file contains the protected interface structures, constants and
|
||||
* interface methods for the struct sci_base_memory_descriptor_list object.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#include "sci_types.h"
|
||||
#include "sci_memory_descriptor_list.h"
|
||||
|
||||
|
||||
/**
|
||||
* struct sci_base_memory_descriptor_list - This structure contains all of the
|
||||
* fields necessary to implement a simple stack for managing the list of
|
||||
* available controller indices.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_memory_descriptor_list {
|
||||
/**
|
||||
* This field indicates the length of the memory descriptor entry array.
|
||||
*/
|
||||
u32 length;
|
||||
|
||||
/**
|
||||
* This field is utilized to provide iterator pattern functionality.
|
||||
* It indicates the index of the next memory descriptor in the iteration.
|
||||
*/
|
||||
u32 next_index;
|
||||
|
||||
/**
|
||||
* This field will point to the list of memory descriptors.
|
||||
*/
|
||||
struct sci_physical_memory_descriptor *mde_array;
|
||||
|
||||
/**
|
||||
* This field simply allows a user to chain memory descriptor lists
|
||||
* together if desired. This field will be initialized to
|
||||
* SCI_INVALID_HANDLE.
|
||||
*/
|
||||
struct sci_base_memory_descriptor_list *next_mdl;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_mdl_construct() - This method is invoked to construct an memory
|
||||
* descriptor list. It initializes the fields of the MDL.
|
||||
* @mdl: This parameter specifies the memory descriptor list to be constructed.
|
||||
* @mde_array: This parameter specifies the array of memory descriptor entries
|
||||
* to be managed by this list.
|
||||
* @mde_array_length: This parameter specifies the size of the array of entries.
|
||||
* @next_mdl: This parameter specifies a subsequent MDL object to be managed by
|
||||
* this MDL object.
|
||||
*
|
||||
* none.
|
||||
*/
|
||||
void sci_base_mdl_construct(
|
||||
struct sci_base_memory_descriptor_list *mdl,
|
||||
struct sci_physical_memory_descriptor *mde_array,
|
||||
u32 mde_array_length,
|
||||
struct sci_base_memory_descriptor_list *next_mdl);
|
||||
|
||||
/**
|
||||
* sci_base_mde_construct() -
|
||||
*
|
||||
* This macro constructs an memory descriptor entry with the given alignment
|
||||
* and size
|
||||
*/
|
||||
#define sci_base_mde_construct(mde, alignment, size, attributes) \
|
||||
{ \
|
||||
(mde)->constant_memory_alignment = (alignment); \
|
||||
(mde)->constant_memory_size = (size); \
|
||||
(mde)->constant_memory_attributes = (attributes); \
|
||||
}
|
||||
|
||||
/**
|
||||
* sci_base_mde_is_valid() - This method validates that the memory descriptor
|
||||
* is correctly filled out by the SCI User
|
||||
* @mde: This parameter is the mde entry to validate
|
||||
* @alignment: This parameter specifies the expected alignment of the memory
|
||||
* for the mde.
|
||||
* @size: This parameter specifies the memory size expected for the mde its
|
||||
* value should not have been changed by the SCI User.
|
||||
* @attributes: This parameter specifies the attributes for the memory
|
||||
* descriptor provided.
|
||||
*
|
||||
* bool This method returns an indication as to whether the supplied MDE is
|
||||
* valid or not. true The MDE is valid. false The MDE is not valid.
|
||||
*/
|
||||
bool sci_base_mde_is_valid(
|
||||
struct sci_physical_memory_descriptor *mde,
|
||||
u32 alignment,
|
||||
u32 size,
|
||||
u16 attributes);
|
||||
|
||||
#endif /* _SCI_BASE_MEMORY_DESCRIPTOR_LIST_H_ */
|
||||
@@ -0,0 +1,205 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_PHY_H_
|
||||
#define _SCI_BASE_PHY_H_
|
||||
|
||||
/**
|
||||
* This file contains all of the structures, constants, and methods common to
|
||||
* all phy object definitions.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sci_base_state_machine.h"
|
||||
|
||||
/**
|
||||
* enum sci_base_phy_states - This enumeration depicts the standard states
|
||||
* common to all phy state machine implementations.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sci_base_phy_states {
|
||||
/**
|
||||
* Simply the initial state for the base domain state machine.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_INITIAL,
|
||||
|
||||
/**
|
||||
* This state indicates that the phy has successfully been stopped.
|
||||
* In this state no new IO operations are permitted on this phy.
|
||||
* This state is entered from the INITIAL state.
|
||||
* This state is entered from the STARTING state.
|
||||
* This state is entered from the READY state.
|
||||
* This state is entered from the RESETTING state.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_STOPPED,
|
||||
|
||||
/**
|
||||
* This state indicates that the phy is in the process of becomming
|
||||
* ready. In this state no new IO operations are permitted on this phy.
|
||||
* This state is entered from the STOPPED state.
|
||||
* This state is entered from the READY state.
|
||||
* This state is entered from the RESETTING state.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_STARTING,
|
||||
|
||||
/**
|
||||
* This state indicates the the phy is now ready. Thus, the user
|
||||
* is able to perform IO operations utilizing this phy as long as it
|
||||
* is currently part of a valid port.
|
||||
* This state is entered from the STARTING state.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_READY,
|
||||
|
||||
/**
|
||||
* This state indicates that the phy is in the process of being reset.
|
||||
* In this state no new IO operations are permitted on this phy.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_RESETTING,
|
||||
|
||||
/**
|
||||
* Simply the final state for the base phy state machine.
|
||||
*/
|
||||
SCI_BASE_PHY_STATE_FINAL,
|
||||
|
||||
SCI_BASE_PHY_MAX_STATES
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sci_base_phy - This structure defines all of the fields common to PHY
|
||||
* objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_phy {
|
||||
/**
|
||||
* This field depicts the parent object (struct sci_base_object) for the phy.
|
||||
*/
|
||||
struct sci_base_object parent;
|
||||
|
||||
/**
|
||||
* This field contains the information for the base phy state machine.
|
||||
*/
|
||||
struct sci_base_state_machine state_machine;
|
||||
};
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_PHY_HANDLER_T)(
|
||||
struct sci_base_phy *
|
||||
);
|
||||
|
||||
/**
|
||||
* struct sci_base_phy_state_handler - This structure contains all of the state
|
||||
* handler methods common to base phy state machines. Handler methods
|
||||
* provide the ability to change the behavior for user requests or
|
||||
* transitions depending on the state the machine is in.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_phy_state_handler {
|
||||
/**
|
||||
* The start_handler specifies the method invoked when there is an
|
||||
* attempt to start a phy.
|
||||
*/
|
||||
SCI_BASE_PHY_HANDLER_T start_handler;
|
||||
|
||||
/**
|
||||
* The stop_handler specifies the method invoked when there is an
|
||||
* attempt to stop a phy.
|
||||
*/
|
||||
SCI_BASE_PHY_HANDLER_T stop_handler;
|
||||
|
||||
/**
|
||||
* The reset_handler specifies the method invoked when there is an
|
||||
* attempt to reset a phy.
|
||||
*/
|
||||
SCI_BASE_PHY_HANDLER_T reset_handler;
|
||||
|
||||
/**
|
||||
* The destruct_handler specifies the method invoked when attempting to
|
||||
* destruct a phy.
|
||||
*/
|
||||
SCI_BASE_PHY_HANDLER_T destruct_handler;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_phy_construct() - Construct the base phy
|
||||
* @this_phy: This parameter specifies the base phy to be constructed.
|
||||
* @state_table: This parameter specifies the table of state definitions to be
|
||||
* utilized for the phy state machine.
|
||||
*
|
||||
*/
|
||||
static inline void sci_base_phy_construct(
|
||||
struct sci_base_phy *base_phy,
|
||||
const struct sci_base_state *state_table)
|
||||
{
|
||||
base_phy->parent.private = NULL;
|
||||
sci_base_state_machine_construct(
|
||||
&base_phy->state_machine,
|
||||
&base_phy->parent,
|
||||
state_table,
|
||||
SCI_BASE_PHY_STATE_INITIAL
|
||||
);
|
||||
|
||||
sci_base_state_machine_start(
|
||||
&base_phy->state_machine
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
#endif /* _SCI_BASE_PHY_H_ */
|
||||
@@ -0,0 +1,203 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_PORT_H_
|
||||
#define _SCI_BASE_PORT_H_
|
||||
|
||||
#include "sci_base_state_machine.h"
|
||||
#include "sci_object.h"
|
||||
|
||||
/**
|
||||
* enum sci_base_port_states - This enumeration depicts all the states for the
|
||||
* common port state machine.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sci_base_port_states {
|
||||
/**
|
||||
* This state indicates that the port has successfully been stopped.
|
||||
* In this state no new IO operations are permitted.
|
||||
* This state is entered from the STOPPING state.
|
||||
*/
|
||||
SCI_BASE_PORT_STATE_STOPPED,
|
||||
|
||||
/**
|
||||
* This state indicates that the port is in the process of stopping.
|
||||
* In this state no new IO operations are permitted, but existing IO
|
||||
* operations are allowed to complete.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_PORT_STATE_STOPPING,
|
||||
|
||||
/**
|
||||
* This state indicates the port is now ready. Thus, the user is
|
||||
* able to perform IO operations on this port.
|
||||
* This state is entered from the STARTING state.
|
||||
*/
|
||||
SCI_BASE_PORT_STATE_READY,
|
||||
|
||||
/**
|
||||
* This state indicates the port is in the process of performing a hard
|
||||
* reset. Thus, the user is unable to perform IO operations on this
|
||||
* port.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_PORT_STATE_RESETTING,
|
||||
|
||||
/**
|
||||
* This state indicates the port has failed a reset request. This state
|
||||
* is entered when a port reset request times out.
|
||||
* This state is entered from the RESETTING state.
|
||||
*/
|
||||
SCI_BASE_PORT_STATE_FAILED,
|
||||
|
||||
SCI_BASE_PORT_MAX_STATES
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sci_base_port - The base port object abstracts the fields common to
|
||||
* all SCI port objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_port {
|
||||
/**
|
||||
* The field specifies that the parent object for the base controller
|
||||
* is the base object itself.
|
||||
*/
|
||||
struct sci_base_object parent;
|
||||
|
||||
/**
|
||||
* This field contains the information for the base port state machine.
|
||||
*/
|
||||
struct sci_base_state_machine state_machine;
|
||||
};
|
||||
|
||||
struct sci_base_phy;
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_PORT_HANDLER_T)(
|
||||
struct sci_base_port *
|
||||
);
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_PORT_PHY_HANDLER_T)(
|
||||
struct sci_base_port *,
|
||||
struct sci_base_phy *
|
||||
);
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_PORT_RESET_HANDLER_T)(
|
||||
struct sci_base_port *,
|
||||
u32 timeout
|
||||
);
|
||||
|
||||
/**
|
||||
* struct sci_base_port_state_handler - This structure contains all of the
|
||||
* state handler methods common to base port state machines. Handler
|
||||
* methods provide the ability to change the behavior for user requests or
|
||||
* transitions depending on the state the machine is in.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_port_state_handler {
|
||||
/**
|
||||
* The start_handler specifies the method invoked when a user attempts to
|
||||
* start a port.
|
||||
*/
|
||||
SCI_BASE_PORT_HANDLER_T start_handler;
|
||||
|
||||
/**
|
||||
* The stop_handler specifies the method invoked when a user attempts to
|
||||
* stop a port.
|
||||
*/
|
||||
SCI_BASE_PORT_HANDLER_T stop_handler;
|
||||
|
||||
/**
|
||||
* The destruct_handler specifies the method invoked when attempting to
|
||||
* destruct a port.
|
||||
*/
|
||||
SCI_BASE_PORT_HANDLER_T destruct_handler;
|
||||
|
||||
/**
|
||||
* The reset_handler specifies the method invoked when a user attempts to
|
||||
* hard reset a port.
|
||||
*/
|
||||
SCI_BASE_PORT_RESET_HANDLER_T reset_handler;
|
||||
|
||||
/**
|
||||
* The add_phy_handler specifies the method invoked when a user attempts to
|
||||
* add another phy into the port.
|
||||
*/
|
||||
SCI_BASE_PORT_PHY_HANDLER_T add_phy_handler;
|
||||
|
||||
/**
|
||||
* The remove_phy_handler specifies the method invoked when a user
|
||||
* attempts to remove a phy from the port.
|
||||
*/
|
||||
SCI_BASE_PORT_PHY_HANDLER_T remove_phy_handler;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_port_construct() - Construct the base port object
|
||||
* @this_port: This parameter specifies the base port to be constructed.
|
||||
* @state_table: This parameter specifies the table of state definitions to be
|
||||
* utilized for the domain state machine.
|
||||
*
|
||||
*/
|
||||
void sci_base_port_construct(
|
||||
struct sci_base_port *this_port,
|
||||
const struct sci_base_state *state_table);
|
||||
|
||||
#endif /* _SCI_BASE_PORT_H_ */
|
||||
@@ -0,0 +1,277 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_REMOTE_DEVICE_H_
|
||||
#define _SCI_BASE_REMOTE_DEVICE_H_
|
||||
|
||||
/**
|
||||
* This file contains all of the structures, constants, and methods common to
|
||||
* all remote device object definitions.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sci_base_state_machine.h"
|
||||
|
||||
struct sci_base_request;
|
||||
|
||||
/**
|
||||
* enum sci_base_remote_device_states - This enumeration depicts all the states
|
||||
* for the common remote device state machine.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sci_base_remote_device_states {
|
||||
/**
|
||||
* Simply the initial state for the base remote device state machine.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_INITIAL,
|
||||
|
||||
/**
|
||||
* This state indicates that the remote device has successfully been
|
||||
* stopped. In this state no new IO operations are permitted.
|
||||
* This state is entered from the INITIAL state.
|
||||
* This state is entered from the STOPPING state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_STOPPED,
|
||||
|
||||
/**
|
||||
* This state indicates the the remote device is in the process of
|
||||
* becoming ready (i.e. starting). In this state no new IO operations
|
||||
* are permitted.
|
||||
* This state is entered from the STOPPED state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_STARTING,
|
||||
|
||||
/**
|
||||
* This state indicates the remote device is now ready. Thus, the user
|
||||
* is able to perform IO operations on the remote device.
|
||||
* This state is entered from the STARTING state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_READY,
|
||||
|
||||
/**
|
||||
* This state indicates that the remote device is in the process of
|
||||
* stopping. In this state no new IO operations are permitted, but
|
||||
* existing IO operations are allowed to complete.
|
||||
* This state is entered from the READY state.
|
||||
* This state is entered from the FAILED state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_STOPPING,
|
||||
|
||||
/**
|
||||
* This state indicates that the remote device has failed.
|
||||
* In this state no new IO operations are permitted.
|
||||
* This state is entered from the INITIALIZING state.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_FAILED,
|
||||
|
||||
/**
|
||||
* This state indicates the device is being reset.
|
||||
* In this state no new IO operations are permitted.
|
||||
* This state is entered from the READY state.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_RESETTING,
|
||||
|
||||
/**
|
||||
* Simply the final state for the base remote device state machine.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_FINAL,
|
||||
|
||||
SCI_BASE_REMOTE_DEVICE_MAX_STATES
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sci_base_remote_device - The base remote device object abstracts the
|
||||
* fields common to all SCI remote device objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_remote_device {
|
||||
/**
|
||||
* The field specifies that the parent object for the base remote
|
||||
* device is the base object itself.
|
||||
*/
|
||||
struct sci_base_object parent;
|
||||
|
||||
/**
|
||||
* This field contains the information for the base remote device state
|
||||
* machine.
|
||||
*/
|
||||
struct sci_base_state_machine state_machine;
|
||||
};
|
||||
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_HANDLER_T)(
|
||||
struct sci_base_remote_device *
|
||||
);
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T)(
|
||||
struct sci_base_remote_device *,
|
||||
struct sci_base_request *
|
||||
);
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_REMOTE_DEVICE_HIGH_PRIORITY_REQUEST_COMPLETE_HANDLER_T)(
|
||||
struct sci_base_remote_device *,
|
||||
struct sci_base_request *,
|
||||
void *,
|
||||
enum sci_io_status
|
||||
);
|
||||
|
||||
/**
|
||||
* struct sci_base_remote_device_state_handler - This structure contains all of
|
||||
* the state handler methods common to base remote device state machines.
|
||||
* Handler methods provide the ability to change the behavior for user
|
||||
* requests or transitions depending on the state the machine is in.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_remote_device_state_handler {
|
||||
/**
|
||||
* The start_handler specifies the method invoked when a user attempts to
|
||||
* start a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T start_handler;
|
||||
|
||||
/**
|
||||
* The stop_handler specifies the method invoked when a user attempts to
|
||||
* stop a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T stop_handler;
|
||||
|
||||
/**
|
||||
* The fail_handler specifies the method invoked when a remote device
|
||||
* failure has occurred. A failure may be due to an inability to
|
||||
* initialize/configure the device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T fail_handler;
|
||||
|
||||
/**
|
||||
* The destruct_handler specifies the method invoked when attempting to
|
||||
* destruct a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T destruct_handler;
|
||||
|
||||
/**
|
||||
* The reset handler specifies the method invloked when requesting to reset a
|
||||
* remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T reset_handler;
|
||||
|
||||
/**
|
||||
* The reset complete handler specifies the method invloked when reporting
|
||||
* that a reset has completed to the remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_HANDLER_T reset_complete_handler;
|
||||
|
||||
/**
|
||||
* The start_io_handler specifies the method invoked when a user
|
||||
* attempts to start an IO request for a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T start_io_handler;
|
||||
|
||||
/**
|
||||
* The complete_io_handler specifies the method invoked when a user
|
||||
* attempts to complete an IO request for a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T complete_io_handler;
|
||||
|
||||
/**
|
||||
* The continue_io_handler specifies the method invoked when a user
|
||||
* attempts to continue an IO request for a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T continue_io_handler;
|
||||
|
||||
/**
|
||||
* The start_task_handler specifies the method invoked when a user
|
||||
* attempts to start a task management request for a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T start_task_handler;
|
||||
|
||||
/**
|
||||
* The complete_task_handler specifies the method invoked when a user
|
||||
* attempts to complete a task management request for a remote device.
|
||||
*/
|
||||
SCI_BASE_REMOTE_DEVICE_REQUEST_HANDLER_T complete_task_handler;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_remote_device_construct() - Construct the base remote device
|
||||
* @this_remote_device: This parameter specifies the base remote device to be
|
||||
* constructed.
|
||||
* @state_table: This parameter specifies the table of state definitions to be
|
||||
* utilized for the remote device state machine.
|
||||
*
|
||||
*/
|
||||
static inline void sci_base_remote_device_construct(
|
||||
struct sci_base_remote_device *base_dev,
|
||||
const struct sci_base_state *state_table)
|
||||
{
|
||||
base_dev->parent.private = NULL;
|
||||
sci_base_state_machine_construct(
|
||||
&base_dev->state_machine,
|
||||
&base_dev->parent,
|
||||
state_table,
|
||||
SCI_BASE_REMOTE_DEVICE_STATE_INITIAL
|
||||
);
|
||||
|
||||
sci_base_state_machine_start(
|
||||
&base_dev->state_machine
|
||||
);
|
||||
}
|
||||
#endif /* _SCI_BASE_REMOTE_DEVICE_H_ */
|
||||
@@ -0,0 +1,195 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_REQUST_H_
|
||||
#define _SCI_BASE_REQUST_H_
|
||||
|
||||
/**
|
||||
* This file contains all of the constants, types, and method declarations for
|
||||
* the SCI base IO and task request objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sci_base_state_machine.h"
|
||||
|
||||
/**
|
||||
* enum sci_base_request_states - This enumeration depicts all the states for
|
||||
* the common request state machine.
|
||||
*
|
||||
*
|
||||
*/
|
||||
enum sci_base_request_states {
|
||||
/**
|
||||
* Simply the initial state for the base request state machine.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_INITIAL,
|
||||
|
||||
/**
|
||||
* This state indicates that the request has been constructed. This state
|
||||
* is entered from the INITIAL state.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_CONSTRUCTED,
|
||||
|
||||
/**
|
||||
* This state indicates that the request has been started. This state is
|
||||
* entered from the CONSTRUCTED state.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_STARTED,
|
||||
|
||||
/**
|
||||
* This state indicates that the request has completed.
|
||||
* This state is entered from the STARTED state. This state is entered from
|
||||
* the ABORTING state.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_COMPLETED,
|
||||
|
||||
/**
|
||||
* This state indicates that the request is in the process of being
|
||||
* terminated/aborted.
|
||||
* This state is entered from the CONSTRUCTED state.
|
||||
* This state is entered from the STARTED state.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_ABORTING,
|
||||
|
||||
/**
|
||||
* Simply the final state for the base request state machine.
|
||||
*/
|
||||
SCI_BASE_REQUEST_STATE_FINAL,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct sci_base_request - The base request object abstracts the fields
|
||||
* common to all SCI IO and task request objects.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_request {
|
||||
/**
|
||||
* The field specifies that the parent object for the base request is the
|
||||
* base object itself.
|
||||
*/
|
||||
struct sci_base_object parent;
|
||||
|
||||
/**
|
||||
* This field contains the information for the base request state machine.
|
||||
*/
|
||||
struct sci_base_state_machine state_machine;
|
||||
};
|
||||
|
||||
typedef enum sci_status (*SCI_BASE_REQUEST_HANDLER_T)(
|
||||
struct sci_base_request *this_request
|
||||
);
|
||||
|
||||
/**
|
||||
* struct sci_base_request_state_handler - This structure contains all of the
|
||||
* state handler methods common to base IO and task request state machines.
|
||||
* Handler methods provide the ability to change the behavior for user
|
||||
* requests or transitions depending on the state the machine is in.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_request_state_handler {
|
||||
/**
|
||||
* The start_handler specifies the method invoked when a user attempts to
|
||||
* start a request.
|
||||
*/
|
||||
SCI_BASE_REQUEST_HANDLER_T start_handler;
|
||||
|
||||
/**
|
||||
* The abort_handler specifies the method invoked when a user attempts to
|
||||
* abort a request.
|
||||
*/
|
||||
SCI_BASE_REQUEST_HANDLER_T abort_handler;
|
||||
|
||||
/**
|
||||
* The complete_handler specifies the method invoked when a user attempts to
|
||||
* complete a request.
|
||||
*/
|
||||
SCI_BASE_REQUEST_HANDLER_T complete_handler;
|
||||
|
||||
/**
|
||||
* The destruct_handler specifies the method invoked when a user attempts to
|
||||
* destruct a request.
|
||||
*/
|
||||
SCI_BASE_REQUEST_HANDLER_T destruct_handler;
|
||||
|
||||
};
|
||||
|
||||
/**
|
||||
* sci_base_request_construct() - Construct the base request.
|
||||
* @this_request: This parameter specifies the base request to be constructed.
|
||||
* @state_table: This parameter specifies the table of state definitions to be
|
||||
* utilized for the request state machine.
|
||||
*
|
||||
*/
|
||||
static inline void sci_base_request_construct(
|
||||
struct sci_base_request *base_req,
|
||||
const struct sci_base_state *my_state_table)
|
||||
{
|
||||
base_req->parent.private = NULL;
|
||||
sci_base_state_machine_construct(
|
||||
&base_req->state_machine,
|
||||
&base_req->parent,
|
||||
my_state_table,
|
||||
SCI_BASE_REQUEST_STATE_INITIAL
|
||||
);
|
||||
|
||||
sci_base_state_machine_start(
|
||||
&base_req->state_machine
|
||||
);
|
||||
}
|
||||
|
||||
#endif /* _SCI_BASE_REQUST_H_ */
|
||||
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SCI_BASE_STATE_H_
|
||||
#define _SCI_BASE_STATE_H_
|
||||
|
||||
#include "sci_object.h"
|
||||
|
||||
typedef void (*SCI_BASE_STATE_HANDLER_T)(
|
||||
void
|
||||
);
|
||||
|
||||
typedef void (*SCI_STATE_TRANSITION_T)(
|
||||
struct sci_base_object *base_object
|
||||
);
|
||||
|
||||
/**
|
||||
* struct sci_base_state - The base state object abstracts the fields common to
|
||||
* all state objects defined in SCI.
|
||||
*
|
||||
*
|
||||
*/
|
||||
struct sci_base_state {
|
||||
/**
|
||||
* This field is a function pointer that defines the method to be
|
||||
* invoked when the state is entered.
|
||||
*/
|
||||
SCI_STATE_TRANSITION_T enter_state;
|
||||
|
||||
/**
|
||||
* This field is a function pointer that defines the method to be
|
||||
* invoked when the state is exited.
|
||||
*/
|
||||
SCI_STATE_TRANSITION_T exit_state;
|
||||
|
||||
};
|
||||
|
||||
#endif /* _SCI_BASE_STATE_H_ */
|
||||
@@ -0,0 +1,182 @@
|
||||
/*
|
||||
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||
* redistributing this file, you may do so under either license.
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of Intel Corporation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* This file contains all of the functionality common to all state machine
|
||||
* object implementations.
|
||||
*
|
||||
*
|
||||
*/
|
||||
|
||||
#include "sci_base_state_machine.h"
|
||||
|
||||
static void sci_state_machine_exit_state(struct sci_base_state_machine *sm)
|
||||
{
|
||||
u32 state = sm->current_state_id;
|
||||
SCI_STATE_TRANSITION_T exit = sm->state_table[state].exit_state;
|
||||
|
||||
if (exit)
|
||||
exit(sm->state_machine_owner);
|
||||
}
|
||||
|
||||
static void sci_state_machine_enter_state(struct sci_base_state_machine *sm)
|
||||
{
|
||||
u32 state = sm->current_state_id;
|
||||
SCI_STATE_TRANSITION_T enter = sm->state_table[state].enter_state;
|
||||
|
||||
if (enter)
|
||||
enter(sm->state_machine_owner);
|
||||
}
|
||||
|
||||
/*
|
||||
* ******************************************************************************
|
||||
* * P R O T E C T E D M E T H O D S
|
||||
* ****************************************************************************** */
|
||||
|
||||
/**
|
||||
* This method will set the initial state and state table for the state
|
||||
* machine. The caller should follow this request with the initialize
|
||||
* request to cause the state machine to start.
|
||||
* @sm: This parameter provides the state machine object to be
|
||||
* constructed.
|
||||
* @state_machine_owner: This parameter indicates the object that is owns the
|
||||
* state machine being constructed.
|
||||
* @state_table: This parameter specifies the table of state objects that is
|
||||
* managed by this state machine.
|
||||
* @initial_state: This parameter specifies the value of the initial state for
|
||||
* this state machine.
|
||||
*
|
||||
*/
|
||||
void sci_base_state_machine_construct(struct sci_base_state_machine *sm,
|
||||
struct sci_base_object *owner,
|
||||
const struct sci_base_state *state_table,
|
||||
u32 initial_state)
|
||||
{
|
||||
sm->state_machine_owner = owner;
|
||||
sm->initial_state_id = initial_state;
|
||||
sm->previous_state_id = initial_state;
|
||||
sm->current_state_id = initial_state;
|
||||
sm->state_table = state_table;
|
||||
}
|
||||
|
||||
/**
|
||||
* This method will cause the state machine to enter the initial state.
|
||||
* @sm: This parameter specifies the state machine that is to
|
||||
* be started.
|
||||
*
|
||||
* sci_base_state_machine_construct() for how to set the initial state none
|
||||
*/
|
||||
void sci_base_state_machine_start(struct sci_base_state_machine *sm)
|
||||
{
|
||||
sm->current_state_id = sm->initial_state_id;
|
||||
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
|
||||
sci_base_subject_notify(&sm->parent);
|
||||
#endif
|
||||
sci_state_machine_enter_state(sm);
|
||||
}
|
||||
|
||||
/**
|
||||
* This method will cause the state machine to exit it's current state only.
|
||||
* @sm: This parameter specifies the state machine that is to
|
||||
* be stopped.
|
||||
*
|
||||
*/
|
||||
void sci_base_state_machine_stop(
|
||||
struct sci_base_state_machine *sm)
|
||||
{
|
||||
sci_state_machine_exit_state(sm);
|
||||
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
|
||||
sci_base_subject_notify(&sm->parent);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* This method performs an update to the current state of the state machine.
|
||||
* @sm: This parameter specifies the state machine for which
|
||||
* the caller wishes to perform a state change.
|
||||
* @next_state: This parameter specifies the new state for the state machine.
|
||||
*
|
||||
*/
|
||||
void sci_base_state_machine_change_state(
|
||||
struct sci_base_state_machine *sm,
|
||||
u32 next_state)
|
||||
{
|
||||
sci_state_machine_exit_state(sm);
|
||||
|
||||
sm->previous_state_id = sm->current_state_id;
|
||||
sm->current_state_id = next_state;
|
||||
|
||||
#if defined(SCI_BASE_ENABLE_SUBJECT_NOTIFICATION)
|
||||
/* Notify of the state change prior to entering the state. */
|
||||
sci_base_subject_notify(&sm->parent);
|
||||
#endif
|
||||
|
||||
sci_state_machine_enter_state(sm);
|
||||
}
|
||||
|
||||
/**
|
||||
* This method simply returns the current state of the state machine to the
|
||||
* caller.
|
||||
* @sm: This parameter specifies the state machine for which to
|
||||
* retrieve the current state.
|
||||
*
|
||||
* This method returns a u32 value indicating the current state for the
|
||||
* supplied state machine.
|
||||
*/
|
||||
u32 sci_base_state_machine_get_state(struct sci_base_state_machine *sm)
|
||||
{
|
||||
return sm->current_state_id;
|
||||
}
|
||||
|
||||
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