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rust: io: rename Mmio to MmioOwned

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Most users would more commonly reach out to a view of `Mmio` rather than an
owned instance of `Mmio`. Only implementor of `Io` like `Bar` or `IoMem`
would need the owned version. Thus, rename `Mmio` to `MmioOwned` so that
the name `Mmio` can be used for the view type instead.

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Gary Guo <gary@garyguo.net>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Suggested-by: Danilo Krummrich <dakr@kernel.org>
Link: https://rust-for-linux.zulipchat.com/#narrow/channel/288089-General/topic/Generic.20I.2FO.20backends/near/571198078
Link: https://patch.msgid.link/20260706-io_projection-v6-6-72cd5d055d54@garyguo.net
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
This commit is contained in:
Gary Guo
2026-07-11 17:59:32 +02:00
committed by Danilo Krummrich
parent 9734e90511
commit 691c75967d
6 changed files with 65 additions and 64 deletions
Download Patch File Download Diff File Expand all files Collapse all files
rust/kernel/devres.rs
+3 -3
View File
@@ -68,7 +68,7 @@ struct Inner<T> {
/// devres::Devres,
/// io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// MmioRaw,
/// PhysAddr,
/// Region, //
@@ -105,11 +105,11 @@ struct Inner<T> {
/// }
///
/// impl<const SIZE: usize> Deref for IoMem<SIZE> {
/// type Target = Mmio<SIZE>;
/// type Target = MmioOwned<SIZE>;
///
/// fn deref(&self) -> &Self::Target {
/// // SAFETY: The memory range stored in `self` has been properly mapped in `Self::new`.
/// unsafe { Mmio::from_raw(&self.0) }
/// unsafe { MmioOwned::from_raw(&self.0) }
/// }
/// }
/// # fn no_run(dev: &Device<Bound>) -> Result<(), Error> {
rust/kernel/io.rs
+39 -38
View File
@@ -95,8 +95,8 @@ impl<const SIZE: usize> KnownSize for Region<SIZE> {
/// the represented MMIO region does exist or is properly mapped.
///
/// Instead, the bus specific MMIO implementation must convert this raw representation into an
/// `Mmio` instance providing the actual memory accessors. Only by the conversion into an `Mmio`
/// structure any guarantees are given.
/// `MmioOwned` instance providing the actual memory accessors. Only by the conversion into an
/// `MmioOwned` structure any guarantees are given.
pub struct MmioRaw<T: ?Sized> {
/// Pointer is in I/O address space.
///
@@ -171,7 +171,7 @@ impl<T: ?Sized + KnownSize> MmioRaw<T> {
/// ffi::c_void,
/// io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// MmioRaw,
/// PhysAddr,
/// Region,
@@ -207,11 +207,11 @@ impl<T: ?Sized + KnownSize> MmioRaw<T> {
/// }
///
/// impl<const SIZE: usize> Deref for IoMem<SIZE> {
/// type Target = Mmio<SIZE>;
/// type Target = MmioOwned<SIZE>;
///
/// fn deref(&self) -> &Self::Target {
/// // SAFETY: The memory range stored in `self` has been properly mapped in `Self::new`.
/// unsafe { Mmio::from_raw(&self.0) }
/// unsafe { MmioOwned::from_raw(&self.0) }
/// }
/// }
///
@@ -225,7 +225,7 @@ impl<T: ?Sized + KnownSize> MmioRaw<T> {
/// # }
/// ```
#[repr(transparent)]
pub struct Mmio<const SIZE: usize = 0>(MmioRaw<Region<SIZE>>);
pub struct MmioOwned<const SIZE: usize = 0>(MmioRaw<Region<SIZE>>);
/// Checks whether an access of type `U` at the given `base` and the given `offset`
/// is valid within this region.
@@ -538,10 +538,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_reads(io: &Mmio) -> Result {
/// fn do_reads(io: &MmioOwned) -> Result {
/// // 32-bit read from address `0x10`.
/// let v: u32 = io.try_read(0x10)?;
///
@@ -572,10 +572,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_writes(io: &Mmio) -> Result {
/// fn do_writes(io: &MmioOwned) -> Result {
/// // 32-bit write of value `1` at address `0x10`.
/// io.try_write(0x10, 1u32)?;
///
@@ -610,7 +610,7 @@ pub trait Io: Copy {
/// use kernel::io::{
/// register,
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// register! {
@@ -626,7 +626,7 @@ pub trait Io: Copy {
/// }
/// }
///
/// fn do_write_reg(io: &Mmio) -> Result {
/// fn do_write_reg(io: &MmioOwned) -> Result {
///
/// io.try_write_reg(VERSION::new(1, 0))
/// }
@@ -655,10 +655,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_update(io: &Mmio<0x1000>) -> Result {
/// fn do_update(io: &MmioOwned<0x1000>) -> Result {
/// io.try_update(0x10, |v: u32| {
/// v + 1
/// })
@@ -692,10 +692,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_reads(io: &Mmio<0x1000>) {
/// fn do_reads(io: &MmioOwned<0x1000>) {
/// // 32-bit read from address `0x10`.
/// let v: u32 = io.read(0x10);
///
@@ -724,10 +724,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_writes(io: &Mmio<0x1000>) {
/// fn do_writes(io: &MmioOwned<0x1000>) {
/// // 32-bit write of value `1` at address `0x10`.
/// io.write(0x10, 1u32);
///
@@ -758,7 +758,7 @@ pub trait Io: Copy {
/// use kernel::io::{
/// register,
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// register! {
@@ -774,7 +774,7 @@ pub trait Io: Copy {
/// }
/// }
///
/// fn do_write_reg(io: &Mmio<0x1000>) {
/// fn do_write_reg(io: &MmioOwned<0x1000>) {
/// io.write_reg(VERSION::new(1, 0));
/// }
/// ```
@@ -802,10 +802,10 @@ pub trait Io: Copy {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// };
///
/// fn do_update(io: &Mmio<0x1000>) {
/// fn do_update(io: &MmioOwned<0x1000>) {
/// io.update(0x10, |v: u32| {
/// v + 1
/// })
@@ -848,19 +848,19 @@ macro_rules! impl_mmio_io_capable {
}
// MMIO regions support 8, 16, and 32-bit accesses.
impl_mmio_io_capable!(Mmio, u8, readb, writeb);
impl_mmio_io_capable!(Mmio, u16, readw, writew);
impl_mmio_io_capable!(Mmio, u32, readl, writel);
impl_mmio_io_capable!(MmioOwned, u8, readb, writeb);
impl_mmio_io_capable!(MmioOwned, u16, readw, writew);
impl_mmio_io_capable!(MmioOwned, u32, readl, writel);
// MMIO regions on 64-bit systems also support 64-bit accesses.
impl_mmio_io_capable!(
Mmio,
MmioOwned,
#[cfg(CONFIG_64BIT)]
u64,
readq,
writeq
);
impl<'a, const SIZE: usize> Io for &'a Mmio<SIZE> {
impl<'a, const SIZE: usize> Io for &'a MmioOwned<SIZE> {
type Target = Region<SIZE>;
/// Returns the base address of this mapping.
@@ -876,27 +876,28 @@ impl<'a, const SIZE: usize> Io for &'a Mmio<SIZE> {
}
}
impl<const SIZE: usize> Mmio<SIZE> {
/// Converts an `MmioRaw` into an `Mmio` instance, providing the accessors to the MMIO mapping.
impl<const SIZE: usize> MmioOwned<SIZE> {
/// Converts an `MmioRaw` into an `MmioOwned` instance, providing the accessors to the MMIO
/// mapping.
///
/// # Safety
///
/// Callers must ensure that `addr` is the start of a valid I/O mapped memory region of size
/// `maxsize`.
pub unsafe fn from_raw(raw: &MmioRaw<Region<SIZE>>) -> &Self {
// SAFETY: `Mmio` is a transparent wrapper around `MmioRaw`.
// SAFETY: `MmioOwned` is a transparent wrapper around `MmioRaw`.
unsafe { &*core::ptr::from_ref(raw).cast() }
}
}
/// [`Mmio`] wrapper using relaxed accessors.
/// [`MmioOwned`] wrapper using relaxed accessors.
///
/// This type provides an implementation of [`Io`] that uses relaxed I/O MMIO operands instead of
/// the regular ones.
///
/// See [`Mmio::relaxed`] for a usage example.
/// See [`MmioOwned::relaxed`] for a usage example.
#[repr(transparent)]
pub struct RelaxedMmio<const SIZE: usize = 0>(Mmio<SIZE>);
pub struct RelaxedMmio<const SIZE: usize = 0>(MmioOwned<SIZE>);
impl<'a, const SIZE: usize> Io for &'a RelaxedMmio<SIZE> {
type Target = Region<SIZE>;
@@ -912,7 +913,7 @@ impl<'a, const SIZE: usize> Io for &'a RelaxedMmio<SIZE> {
}
}
impl<const SIZE: usize> Mmio<SIZE> {
impl<const SIZE: usize> MmioOwned<SIZE> {
/// Returns a [`RelaxedMmio`] reference that performs relaxed I/O operations.
///
/// Relaxed accessors do not provide ordering guarantees with respect to DMA or memory accesses
@@ -923,19 +924,19 @@ impl<const SIZE: usize> Mmio<SIZE> {
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// RelaxedMmio,
/// };
///
/// fn do_io(io: &Mmio<0x100>) {
/// fn do_io(io: &MmioOwned<0x100>) {
/// // The access is performed using `readl_relaxed` instead of `readl`.
/// let v = io.relaxed().read32(0x10);
/// }
///
/// ```
pub fn relaxed(&self) -> &RelaxedMmio<SIZE> {
// SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `Mmio`, so `Mmio<SIZE>` and
// `RelaxedMmio<SIZE>` have identical layout.
// SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `MmioOwned`, so `MmioOwned<SIZE>`
// and `RelaxedMmio<SIZE>` have identical layout.
unsafe { core::mem::transmute(self) }
}
}
rust/kernel/io/mem.rs
+4 -4
View File
@@ -16,7 +16,7 @@ use crate::{
Region,
Resource, //
},
Mmio,
MmioOwned,
MmioRaw, //
},
prelude::*,
@@ -211,7 +211,7 @@ impl<'a, const SIZE: usize> ExclusiveIoMem<'a, SIZE> {
}
impl<const SIZE: usize> Deref for ExclusiveIoMem<'_, SIZE> {
type Target = Mmio<SIZE>;
type Target = MmioOwned<SIZE>;
fn deref(&self) -> &Self::Target {
&self.iomem
@@ -291,10 +291,10 @@ impl<const SIZE: usize> Drop for IoMem<'_, SIZE> {
}
impl<const SIZE: usize> Deref for IoMem<'_, SIZE> {
type Target = Mmio<SIZE>;
type Target = MmioOwned<SIZE>;
fn deref(&self) -> &Self::Target {
// SAFETY: Safe as by the invariant of `IoMem`.
unsafe { Mmio::from_raw(&self.io) }
unsafe { MmioOwned::from_raw(&self.io) }
}
}
rust/kernel/io/poll.rs
+4 -4
View File
@@ -47,14 +47,14 @@ use crate::{
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// poll::read_poll_timeout, //
/// };
/// use kernel::time::Delta;
///
/// const HW_READY: u16 = 0x01;
///
/// fn wait_for_hardware<const SIZE: usize>(io: &Mmio<SIZE>) -> Result {
/// fn wait_for_hardware<const SIZE: usize>(io: &MmioOwned<SIZE>) -> Result {
/// read_poll_timeout(
/// // The `op` closure reads the value of a specific status register.
/// || io.try_read16(0x1000),
@@ -134,14 +134,14 @@ where
/// ```no_run
/// use kernel::io::{
/// Io,
/// Mmio,
/// MmioOwned,
/// poll::read_poll_timeout_atomic, //
/// };
/// use kernel::time::Delta;
///
/// const HW_READY: u16 = 0x01;
///
/// fn wait_for_hardware<const SIZE: usize>(io: &Mmio<SIZE>) -> Result {
/// fn wait_for_hardware<const SIZE: usize>(io: &MmioOwned<SIZE>) -> Result {
/// read_poll_timeout_atomic(
/// // The `op` closure reads the value of a specific status register.
/// || io.try_read16(0x1000),
rust/kernel/io/register.rs
+12 -12
View File
@@ -58,7 +58,7 @@
//! },
//! num::Bounded,
//! };
//! # use kernel::io::Mmio;
//! # use kernel::io::MmioOwned;
//! # register! {
//! # pub BOOT_0(u32) @ 0x00000100 {
//! # 15:8 vendor_id;
@@ -66,7 +66,7 @@
//! # 3:0 minor_revision;
//! # }
//! # }
//! # fn test(io: &Mmio<0x1000>) {
//! # fn test(io: &MmioOwned<0x1000>) {
//! # fn obtain_vendor_id() -> u8 { 0xff }
//!
//! // Read from the register's defined offset (0x100).
@@ -446,7 +446,7 @@ where
/// Io,
/// },
/// };
/// # use kernel::io::Mmio;
/// # use kernel::io::MmioOwned;
///
/// register! {
/// FIXED_REG(u32) @ 0x100 {
@@ -455,7 +455,7 @@ where
/// }
/// }
///
/// # fn test(io: &Mmio<0x1000>) {
/// # fn test(io: &MmioOwned<0x1000>) {
/// let val = io.read(FIXED_REG);
///
/// // Write from an already-existing value.
@@ -559,7 +559,7 @@ where
/// Io,
/// },
/// };
/// # use kernel::io::Mmio;
/// # use kernel::io::MmioOwned;
///
/// // Type used to identify the base.
/// pub struct CpuCtlBase;
@@ -584,7 +584,7 @@ where
/// }
/// }
///
/// # fn test(io: Mmio<0x1000>) {
/// # fn test(io: MmioOwned<0x1000>) {
/// // Read the status of `Cpu0`.
/// let cpu0_started = io.read(CPU_CTL::of::<Cpu0>());
///
@@ -601,7 +601,7 @@ where
/// }
/// }
///
/// # fn test2(io: Mmio<0x1000>) {
/// # fn test2(io: MmioOwned<0x1000>) {
/// // Start the aliased `CPU0`, leaving its other fields untouched.
/// io.update(CPU_CTL_ALIAS::of::<Cpu0>(), |r| r.with_alias_start(true));
/// # }
@@ -638,7 +638,7 @@ where
/// Io,
/// },
/// };
/// # use kernel::io::Mmio;
/// # use kernel::io::MmioOwned;
/// # fn get_scratch_idx() -> usize {
/// # 0x15
/// # }
@@ -651,7 +651,7 @@ where
/// }
/// }
///
/// # fn test(io: &Mmio<0x1000>)
/// # fn test(io: &MmioOwned<0x1000>)
/// # -> Result<(), Error>{
/// // Read scratch register 0, i.e. I/O address `0x80`.
/// let scratch_0 = io.read(SCRATCH::at(0)).value();
@@ -724,7 +724,7 @@ where
/// Io,
/// },
/// };
/// # use kernel::io::Mmio;
/// # use kernel::io::MmioOwned;
/// # fn get_scratch_idx() -> usize {
/// # 0x15
/// # }
@@ -752,7 +752,7 @@ where
/// }
/// }
///
/// # fn test(io: &Mmio<0x1000>) -> Result<(), Error> {
/// # fn test(io: &MmioOwned<0x1000>) -> Result<(), Error> {
/// // Read scratch register 0 of CPU0.
/// let scratch = io.read(CPU_SCRATCH::of::<Cpu0>().at(0));
///
@@ -794,7 +794,7 @@ where
/// }
/// }
///
/// # fn test2(io: &Mmio<0x1000>) -> Result<(), Error> {
/// # fn test2(io: &MmioOwned<0x1000>) -> Result<(), Error> {
/// let cpu0_status = io.read(CPU_FIRMWARE_STATUS::of::<Cpu0>()).status();
/// # Ok(())
/// # }
rust/kernel/pci/io.rs
+3 -3
View File
@@ -10,7 +10,7 @@ use crate::{
io::{
Io,
IoCapable,
Mmio,
MmioOwned,
MmioRaw,
Region, //
},
@@ -242,11 +242,11 @@ impl<const SIZE: usize> Drop for Bar<'_, SIZE> {
}
impl<const SIZE: usize> Deref for Bar<'_, SIZE> {
type Target = Mmio<SIZE>;
type Target = MmioOwned<SIZE>;
fn deref(&self) -> &Self::Target {
// SAFETY: By the type invariant of `Self`, the MMIO range in `self.io` is properly mapped.
unsafe { Mmio::from_raw(&self.io) }
unsafe { MmioOwned::from_raw(&self.io) }
}
}