mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
pinctrl: bcm: Add STB family pin controller driver
This driver provide pin muxing and configuration functionality for BCM2712 SoC used by RPi5. According to [1] this chip is an instance of the one used in Broadcom STB product line. [1] https://lore.kernel.org/lkml/f6601f73-cb22-4ba3-88c5-241be8421fc3@broadcom.com/ Cc: Jonathan Bell <jonathan@raspberrypi.com> Cc: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Reviewed-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Andrea della Porta <andrea.porta@suse.com> [linusw: Enable also for ARCH_BCM2835] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Ivan T. Ivanov
committed by
Linus Walleij
Linus Walleij
parent
0733389965
commit
657cbf9b24
@@ -106,6 +106,18 @@ config PINCTRL_BCM63268
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help
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Say Y here to enable the Broadcom BCM63268 GPIO driver.
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config PINCTRL_BRCMSTB
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tristate "Broadcom STB product line pin controller driver"
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depends on OF && (ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST)
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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Enable pin muxing and configuration functionality
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for Broadcom STB product line chipsets.
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source "drivers/pinctrl/bcm/Kconfig.stb"
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config PINCTRL_IPROC_GPIO
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bool "Broadcom iProc GPIO (with PINCONF) driver"
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depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
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@@ -0,0 +1,10 @@
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# SPDX-License-Identifier: GPL-2.0-only
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if PINCTRL_BRCMSTB
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config PINCTRL_BCM2712
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tristate "BCM2712 SoC pin controller driver"
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help
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Driver for BCM2712 integrated pin controller,
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commonly found on Raspberry Pi 5.
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endif
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@@ -11,6 +11,8 @@ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
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obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
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obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
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obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
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obj-$(CONFIG_PINCTRL_BRCMSTB) += pinctrl-brcmstb.o
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obj-$(CONFIG_PINCTRL_BCM2712) += pinctrl-brcmstb-bcm2712.o
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obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o
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obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o
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obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,442 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for Broadcom brcmstb GPIO units (pinctrl only)
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*
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* Copyright (C) 2024-2025 Ivan T. Ivanov, Andrea della Porta
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* Copyright (C) 2021-3 Raspberry Pi Ltd.
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* Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
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*
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* Based heavily on the BCM2835 GPIO & pinctrl driver, which was inspired by:
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* pinctrl-nomadik.c, please see original file for copyright information
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* pinctrl-tegra.c, please see original file for copyright information
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/cleanup.h>
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#include "pinctrl-brcmstb.h"
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#define BRCMSTB_PULL_NONE 0
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#define BRCMSTB_PULL_DOWN 1
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#define BRCMSTB_PULL_UP 2
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#define BRCMSTB_PULL_MASK 0x3
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#define BIT_TO_REG(b) (((b) >> 5) << 2)
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#define BIT_TO_SHIFT(b) ((b) & 0x1f)
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struct brcmstb_pinctrl {
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struct device *dev;
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void __iomem *base;
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struct pinctrl_dev *pctl_dev;
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struct pinctrl_desc pctl_desc;
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const struct pin_regs *pin_regs;
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const struct brcmstb_pin_funcs *pin_funcs;
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const char * const *func_names;
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unsigned int func_count;
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unsigned int func_gpio;
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const char *const *gpio_groups;
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struct pinctrl_gpio_range gpio_range;
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/* Protect FSEL registers */
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spinlock_t fsel_lock;
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};
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static unsigned int brcmstb_pinctrl_fsel_get(struct brcmstb_pinctrl *pc,
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unsigned int pin)
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{
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u32 bit = pc->pin_regs[pin].mux_bit;
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unsigned int func;
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int fsel;
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u32 val;
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if (!bit)
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return pc->func_gpio;
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bit &= ~MUX_BIT_VALID;
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val = readl(pc->base + BIT_TO_REG(bit));
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fsel = (val >> BIT_TO_SHIFT(bit)) & pc->pin_funcs[pin].func_mask;
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func = pc->pin_funcs[pin].funcs[fsel];
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if (func >= pc->func_count)
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func = fsel;
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dev_dbg(pc->dev, "get %04x: %08x (%u => %s)\n",
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BIT_TO_REG(bit), val, pin,
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pc->func_names[func]);
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return func;
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}
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static int brcmstb_pinctrl_fsel_set(struct brcmstb_pinctrl *pc,
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unsigned int pin, unsigned int func)
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{
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u32 bit = pc->pin_regs[pin].mux_bit, val, fsel_mask;
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const u8 *pin_funcs;
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int fsel;
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int cur;
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int i;
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if (!bit || func >= pc->func_count)
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return -EINVAL;
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bit &= ~MUX_BIT_VALID;
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fsel = pc->pin_funcs[pin].n_funcs + 1;
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fsel_mask = pc->pin_funcs[pin].func_mask;
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if (func >= fsel) {
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/* Convert to an fsel number */
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pin_funcs = pc->pin_funcs[pin].funcs;
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for (i = 1; i < fsel; i++) {
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if (pin_funcs[i - 1] == func) {
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fsel = i;
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break;
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}
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}
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} else {
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fsel = func;
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}
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if (fsel >= pc->pin_funcs[pin].n_funcs + 1)
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return -EINVAL;
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guard(spinlock_irqsave)(&pc->fsel_lock);
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val = readl(pc->base + BIT_TO_REG(bit));
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cur = (val >> BIT_TO_SHIFT(bit)) & fsel_mask;
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dev_dbg(pc->dev, "read %04x: %08x (%u => %s)\n",
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BIT_TO_REG(bit), val, pin,
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pc->func_names[cur]);
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if (cur != fsel) {
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val &= ~(fsel_mask << BIT_TO_SHIFT(bit));
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val |= fsel << BIT_TO_SHIFT(bit);
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dev_dbg(pc->dev, "write %04x: %08x (%u <= %s)\n",
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BIT_TO_REG(bit), val, pin,
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pc->func_names[fsel]);
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writel(val, pc->base + BIT_TO_REG(bit));
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}
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return 0;
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}
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static int brcmstb_pctl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return pc->pctl_desc.npins;
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}
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static const char *brcmstb_pctl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return pc->gpio_groups[selector];
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}
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static int brcmstb_pctl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pc->pctl_desc.pins[selector].number;
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*num_pins = 1;
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return 0;
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}
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static void brcmstb_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned int offset)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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unsigned int fsel = brcmstb_pinctrl_fsel_get(pc, offset);
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const char *fname = pc->func_names[fsel];
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seq_printf(s, "function %s", fname);
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}
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static void brcmstb_pctl_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *maps,
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unsigned int num_maps)
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{
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int i;
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for (i = 0; i < num_maps; i++)
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if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
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kfree(maps[i].data.configs.configs);
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kfree(maps);
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}
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static const struct pinctrl_ops brcmstb_pctl_ops = {
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.get_groups_count = brcmstb_pctl_get_groups_count,
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.get_group_name = brcmstb_pctl_get_group_name,
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.get_group_pins = brcmstb_pctl_get_group_pins,
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.pin_dbg_show = brcmstb_pctl_pin_dbg_show,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
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.dt_free_map = brcmstb_pctl_dt_free_map,
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};
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static int brcmstb_pmx_free(struct pinctrl_dev *pctldev, unsigned int offset)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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/* disable by setting to GPIO */
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return brcmstb_pinctrl_fsel_set(pc, offset, pc->func_gpio);
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}
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static int brcmstb_pmx_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return pc->func_count;
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}
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static const char *brcmstb_pmx_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return (selector < pc->func_count) ? pc->func_names[selector] : NULL;
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}
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static int brcmstb_pmx_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned int selector,
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const char *const **groups,
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unsigned *const num_groups)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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*groups = pc->gpio_groups;
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*num_groups = pc->pctl_desc.npins;
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return 0;
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}
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static int brcmstb_pmx_set(struct pinctrl_dev *pctldev,
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unsigned int func_selector,
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unsigned int group_selector)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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const struct pinctrl_desc *pctldesc = &pc->pctl_desc;
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const struct pinctrl_pin_desc *pindesc;
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if (group_selector >= pctldesc->npins)
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return -EINVAL;
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pindesc = &pctldesc->pins[group_selector];
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return brcmstb_pinctrl_fsel_set(pc, pindesc->number, func_selector);
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}
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static int brcmstb_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int pin)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return brcmstb_pinctrl_fsel_set(pc, pin, pc->func_gpio);
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}
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static void brcmstb_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int offset)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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/* disable by setting to GPIO */
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(void)brcmstb_pinctrl_fsel_set(pc, offset, pc->func_gpio);
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}
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static bool brcmstb_pmx_function_is_gpio(struct pinctrl_dev *pctldev,
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unsigned int selector)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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return pc->func_gpio == selector;
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}
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static const struct pinmux_ops brcmstb_pmx_ops = {
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.free = brcmstb_pmx_free,
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.get_functions_count = brcmstb_pmx_get_functions_count,
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.get_function_name = brcmstb_pmx_get_function_name,
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.get_function_groups = brcmstb_pmx_get_function_groups,
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.set_mux = brcmstb_pmx_set,
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.gpio_request_enable = brcmstb_pmx_gpio_request_enable,
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.gpio_disable_free = brcmstb_pmx_gpio_disable_free,
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.function_is_gpio = brcmstb_pmx_function_is_gpio,
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.strict = true,
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};
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static unsigned int brcmstb_pull_config_get(struct brcmstb_pinctrl *pc,
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unsigned int pin)
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{
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u32 bit = pc->pin_regs[pin].pad_bit, val;
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if (bit == PAD_BIT_INVALID)
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return BRCMSTB_PULL_NONE;
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val = readl(pc->base + BIT_TO_REG(bit));
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return (val >> BIT_TO_SHIFT(bit)) & BRCMSTB_PULL_MASK;
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}
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static int brcmstb_pull_config_set(struct brcmstb_pinctrl *pc,
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unsigned int pin, unsigned int arg)
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{
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u32 bit = pc->pin_regs[pin].pad_bit, val;
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if (bit == PAD_BIT_INVALID) {
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dev_warn(pc->dev, "Can't set pulls for %s\n",
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pc->gpio_groups[pin]);
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return -EINVAL;
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}
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guard(spinlock_irqsave)(&pc->fsel_lock);
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val = readl(pc->base + BIT_TO_REG(bit));
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val &= ~(BRCMSTB_PULL_MASK << BIT_TO_SHIFT(bit));
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val |= (arg << BIT_TO_SHIFT(bit));
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writel(val, pc->base + BIT_TO_REG(bit));
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return 0;
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}
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static int brcmstb_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *config)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param = pinconf_to_config_param(*config);
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u32 arg;
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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arg = (brcmstb_pull_config_get(pc, pin) == BRCMSTB_PULL_NONE);
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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arg = (brcmstb_pull_config_get(pc, pin) == BRCMSTB_PULL_DOWN);
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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arg = (brcmstb_pull_config_get(pc, pin) == BRCMSTB_PULL_UP);
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break;
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default:
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return -ENOTSUPP;
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}
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*config = pinconf_to_config_packed(param, arg);
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return 0;
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}
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static int brcmstb_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *configs,
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unsigned int num_configs)
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{
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struct brcmstb_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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int ret = 0;
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u32 param;
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int i;
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for (i = 0; i < num_configs; i++) {
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param = pinconf_to_config_param(configs[i]);
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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ret = brcmstb_pull_config_set(pc, pin, BRCMSTB_PULL_NONE);
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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ret = brcmstb_pull_config_set(pc, pin, BRCMSTB_PULL_DOWN);
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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ret = brcmstb_pull_config_set(pc, pin, BRCMSTB_PULL_UP);
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break;
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default:
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return -ENOTSUPP;
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}
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}
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return ret;
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}
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static const struct pinconf_ops brcmstb_pinconf_ops = {
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.is_generic = true,
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.pin_config_get = brcmstb_pinconf_get,
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.pin_config_set = brcmstb_pinconf_set,
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};
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int brcmstb_pinctrl_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
|
||||
const struct brcmstb_pdata *pdata;
|
||||
struct brcmstb_pinctrl *pc;
|
||||
const char **names;
|
||||
int num_pins, i;
|
||||
|
||||
pdata = of_device_get_match_data(dev);
|
||||
|
||||
pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
|
||||
if (!pc)
|
||||
return -ENOMEM;
|
||||
|
||||
platform_set_drvdata(pdev, pc);
|
||||
pc->dev = dev;
|
||||
spin_lock_init(&pc->fsel_lock);
|
||||
|
||||
pc->base = devm_of_iomap(dev, np, 0, NULL);
|
||||
if (IS_ERR(pc->base))
|
||||
return dev_err_probe(&pdev->dev, PTR_ERR(pc->base),
|
||||
"Could not get IO memory\n");
|
||||
|
||||
pc->pctl_desc = *pdata->pctl_desc;
|
||||
pc->pctl_desc.pctlops = &brcmstb_pctl_ops;
|
||||
pc->pctl_desc.pmxops = &brcmstb_pmx_ops;
|
||||
pc->pctl_desc.confops = &brcmstb_pinconf_ops;
|
||||
pc->pctl_desc.owner = THIS_MODULE;
|
||||
num_pins = pc->pctl_desc.npins;
|
||||
names = devm_kmalloc_array(dev, num_pins, sizeof(const char *),
|
||||
GFP_KERNEL);
|
||||
if (!names)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < num_pins; i++)
|
||||
names[i] = pc->pctl_desc.pins[i].name;
|
||||
|
||||
pc->gpio_groups = names;
|
||||
pc->pin_regs = pdata->pin_regs;
|
||||
pc->pin_funcs = pdata->pin_funcs;
|
||||
pc->func_count = pdata->func_count;
|
||||
pc->func_names = pdata->func_names;
|
||||
|
||||
pc->pctl_dev = devm_pinctrl_register(dev, &pc->pctl_desc, pc);
|
||||
if (IS_ERR(pc->pctl_dev))
|
||||
return dev_err_probe(&pdev->dev, PTR_ERR(pc->pctl_dev),
|
||||
"Failed to register pinctrl device\n");
|
||||
|
||||
pc->gpio_range = *pdata->gpio_range;
|
||||
pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(brcmstb_pinctrl_probe);
|
||||
|
||||
MODULE_AUTHOR("Phil Elwell");
|
||||
MODULE_AUTHOR("Jonathan Bell");
|
||||
MODULE_AUTHOR("Ivan T. Ivanov");
|
||||
MODULE_AUTHOR("Andrea della Porta");
|
||||
MODULE_DESCRIPTION("Broadcom brcmstb pinctrl driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -0,0 +1,93 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Header for Broadcom brcmstb GPIO based drivers
|
||||
*
|
||||
* Copyright (C) 2024-2025 Ivan T. Ivanov, Andrea della Porta
|
||||
* Copyright (C) 2021-3 Raspberry Pi Ltd.
|
||||
* Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
|
||||
*
|
||||
* Based heavily on the BCM2835 GPIO & pinctrl driver, which was inspired by:
|
||||
* pinctrl-nomadik.c, please see original file for copyright information
|
||||
* pinctrl-tegra.c, please see original file for copyright information
|
||||
*/
|
||||
|
||||
#ifndef __PINCTRL_BRCMSTB_H__
|
||||
#define __PINCTRL_BRCMSTB_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#define BRCMSTB_FUNC(f) \
|
||||
[func_##f] = #f
|
||||
|
||||
#define MUX_BIT_VALID 0x8000
|
||||
#define PAD_BIT_INVALID 0xffff
|
||||
|
||||
#define MUX_BIT(muxreg, muxshift) \
|
||||
(MUX_BIT_VALID + ((muxreg) << 5) + ((muxshift) << 2))
|
||||
#define PAD_BIT(padreg, padshift) \
|
||||
(((padreg) << 5) + ((padshift) << 1))
|
||||
|
||||
#define GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
|
||||
[n] = { MUX_BIT(muxreg, muxshift), PAD_BIT(padreg, padshift) }
|
||||
|
||||
#define EMMC_REGS(n, padreg, padshift) \
|
||||
[n] = { 0, PAD_BIT(padreg, padshift) }
|
||||
|
||||
#define AON_GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
|
||||
GPIO_REGS(n, muxreg, muxshift, padreg, padshift)
|
||||
|
||||
#define AON_SGPIO_REGS(n, muxreg, muxshift) \
|
||||
[(n) + 32] = { MUX_BIT(muxreg, muxshift), PAD_BIT_INVALID }
|
||||
|
||||
#define GPIO_PIN(n) PINCTRL_PIN(n, "gpio" #n)
|
||||
/**
|
||||
* AON pins are in the Always-On power domain. SGPIOs are also 'Safe'
|
||||
* being 5V tolerant (necessary for the HDMI I2C pins), and can be driven
|
||||
* while the power is off.
|
||||
*/
|
||||
#define AON_GPIO_PIN(n) PINCTRL_PIN(n, "aon_gpio" #n)
|
||||
#define AON_SGPIO_PIN(n) PINCTRL_PIN((n) + 32, "aon_sgpio" #n)
|
||||
|
||||
struct pin_regs {
|
||||
u16 mux_bit;
|
||||
u16 pad_bit;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct brcmstb_pin_funcs - pins provide their primary/alternate
|
||||
* functions in this struct
|
||||
* @func_mask: mask representing valid bits of the function selector
|
||||
* in the registers
|
||||
* @funcs: array of function identifiers
|
||||
* @n_funcs: number of identifiers of the @funcs array above
|
||||
*/
|
||||
struct brcmstb_pin_funcs {
|
||||
const u32 func_mask;
|
||||
const u8 *funcs;
|
||||
const unsigned int n_funcs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct brcmstb_pdata - specific data for a pinctrl chip implementation
|
||||
* @pctl_desc: pin controller descriptor for this implementation
|
||||
* @gpio_range: range of GPIOs served by this controller
|
||||
* @pin_regs: array of register descriptors for each pin
|
||||
* @pin_funcs: array of all possible assignable function for each pin
|
||||
* @func_count: total number of functions
|
||||
* @func_gpio: which function number is GPIO (usually 0)
|
||||
* @func_names: an array listing all function names
|
||||
*/
|
||||
struct brcmstb_pdata {
|
||||
const struct pinctrl_desc *pctl_desc;
|
||||
const struct pinctrl_gpio_range *gpio_range;
|
||||
const struct pin_regs *pin_regs;
|
||||
const struct brcmstb_pin_funcs *pin_funcs;
|
||||
const unsigned int func_count;
|
||||
const unsigned int func_gpio;
|
||||
const char * const *func_names;
|
||||
};
|
||||
|
||||
int brcmstb_pinctrl_probe(struct platform_device *pdev);
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user