mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge commit '71f0dd5a3293d75d26d405ffbaedfdda4836af32' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next into for-6.15/io_uring-rx-zc
Merge networking zerocopy receive tree, to get the prep patches for the io_uring rx zc support. * git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (63 commits) net: add helpers for setting a memory provider on an rx queue net: page_pool: add memory provider helpers net: prepare for non devmem TCP memory providers net: page_pool: add a mp hook to unregister_netdevice* net: page_pool: add callback for mp info printing netdev: add io_uring memory provider info net: page_pool: create hooks for custom memory providers net: generalise net_iov chunk owners net: prefix devmem specific helpers net: page_pool: don't cast mp param to devmem tools: ynl: add all headers to makefile deps eth: fbnic: set IFF_UNICAST_FLT to avoid enabling promiscuous mode when adding unicast addrs eth: fbnic: add MAC address TCAM to debugfs tools: ynl-gen: support limits using definitions tools: ynl-gen: don't output external constants net/mlx5e: Avoid WARN_ON when configuring MQPRIO with HTB offload enabled net/mlx5e: Remove unused mlx5e_tc_flow_action struct net/mlx5: Remove stray semicolon in LAG port selection table creation net/mlx5e: Support FEC settings for 200G per lane link modes net/mlx5: Add support for 200Gbps per lane link modes ...
This commit is contained in:
@@ -244,7 +244,7 @@ information about the interrupt from the irb parameter.
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--------------------
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The ccwgroup mechanism is designed to handle devices consisting of multiple ccw
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devices, like lcs or ctc.
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devices, like qeth or ctc.
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The ccw driver provides a 'group' attribute. Piping bus ids of ccw devices to
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this attributes creates a ccwgroup device consisting of these ccw devices (if
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@@ -44,6 +44,9 @@ properties:
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phy-mode:
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enum:
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- rgmii
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- rgmii-id
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- rgmii-rxid
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- rgmii-txid
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- rmii
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phy-handle: true
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@@ -14,9 +14,10 @@ $defs:
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pattern: ^[0-9A-Za-z_-]+( - 1)?$
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minimum: 0
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len-or-limit:
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# literal int or limit based on fixed-width type e.g. u8-min, u16-max, etc.
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# literal int, const name, or limit based on fixed-width type
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# e.g. u8-min, u16-max, etc.
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type: [ string, integer ]
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pattern: ^[su](8|16|32|64)-(min|max)$
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pattern: ^[0-9A-Za-z_-]+$
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minimum: 0
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# Schema for specs
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@@ -14,9 +14,10 @@ $defs:
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pattern: ^[0-9A-Za-z_-]+( - 1)?$
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minimum: 0
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len-or-limit:
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# literal int or limit based on fixed-width type e.g. u8-min, u16-max, etc.
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# literal int, const name, or limit based on fixed-width type
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# e.g. u8-min, u16-max, etc.
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type: [ string, integer ]
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pattern: ^[su](8|16|32|64)-(min|max)$
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pattern: ^[0-9A-Za-z_-]+$
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minimum: 0
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# Schema for specs
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@@ -14,9 +14,10 @@ $defs:
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pattern: ^[0-9A-Za-z_-]+( - 1)?$
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minimum: 0
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len-or-limit:
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# literal int or limit based on fixed-width type e.g. u8-min, u16-max, etc.
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# literal int, const name, or limit based on fixed-width type
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# e.g. u8-min, u16-max, etc.
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type: [ string, integer ]
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pattern: ^[su](8|16|32|64)-(min|max)$
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pattern: ^[0-9A-Za-z_-]+$
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minimum: 0
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# Schema for specs
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@@ -114,6 +114,9 @@ attribute-sets:
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doc: Bitmask of enabled AF_XDP features.
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type: u64
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enum: xsk-flags
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-
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name: io-uring-provider-info
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attributes: []
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-
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name: page-pool
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attributes:
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@@ -171,6 +174,11 @@ attribute-sets:
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name: dmabuf
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doc: ID of the dmabuf this page-pool is attached to.
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type: u32
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-
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name: io-uring
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doc: io-uring memory provider information.
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type: nest
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nested-attributes: io-uring-provider-info
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-
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name: page-pool-info
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subset-of: page-pool
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@@ -296,6 +304,11 @@ attribute-sets:
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name: dmabuf
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doc: ID of the dmabuf attached to this queue, if any.
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type: u32
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-
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name: io-uring
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doc: io_uring memory provider information.
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type: nest
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nested-attributes: io-uring-provider-info
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-
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name: qstats
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@@ -572,6 +585,7 @@ operations:
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- inflight-mem
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- detach-time
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- dmabuf
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- io-uring
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dump:
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reply: *pp-reply
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config-cond: page-pool
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@@ -637,6 +651,7 @@ operations:
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- napi-id
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- ifindex
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- dmabuf
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- io-uring
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dump:
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request:
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attributes:
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@@ -54,7 +54,6 @@ enum interruption_class {
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IRQIO_C70,
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IRQIO_TAP,
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IRQIO_VMR,
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IRQIO_LCS,
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IRQIO_CTC,
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IRQIO_ADM,
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IRQIO_CSC,
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@@ -84,7 +84,6 @@ static const struct irq_class irqclass_sub_desc[] = {
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{.irq = IRQIO_C70, .name = "C70", .desc = "[I/O] 3270"},
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{.irq = IRQIO_TAP, .name = "TAP", .desc = "[I/O] Tape"},
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{.irq = IRQIO_VMR, .name = "VMR", .desc = "[I/O] Unit Record Devices"},
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{.irq = IRQIO_LCS, .name = "LCS", .desc = "[I/O] LCS"},
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{.irq = IRQIO_CTC, .name = "CTC", .desc = "[I/O] CTC"},
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{.irq = IRQIO_ADM, .name = "ADM", .desc = "[I/O] EADM Subchannel"},
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{.irq = IRQIO_CSC, .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
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@@ -432,9 +432,6 @@ static struct net_device *bond_ipsec_dev(struct xfrm_state *xs)
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struct bonding *bond;
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struct slave *slave;
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if (!bond_dev)
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return NULL;
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bond = netdev_priv(bond_dev);
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if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)
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return NULL;
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@@ -226,7 +226,6 @@ struct __packed offload_info {
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struct offload_port_info ports;
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struct offload_ka_info kas;
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struct offload_rr_info rrs;
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u8 buf[];
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};
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struct __packed hw_atl_utils_fw_rpc {
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@@ -1433,22 +1433,6 @@ int octeon_wait_for_ddr_init(struct octeon_device *oct, u32 *timeout)
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}
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EXPORT_SYMBOL_GPL(octeon_wait_for_ddr_init);
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/* Get the octeon id assigned to the octeon device passed as argument.
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* This function is exported to other modules.
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* @param dev - octeon device pointer passed as a void *.
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* @return octeon device id
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*/
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int lio_get_device_id(void *dev)
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{
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struct octeon_device *octeon_dev = (struct octeon_device *)dev;
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u32 i;
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for (i = 0; i < MAX_OCTEON_DEVICES; i++)
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if (octeon_device[i] == octeon_dev)
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return octeon_dev->octeon_id;
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return -1;
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}
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void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq)
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{
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u64 instr_cnt;
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@@ -705,13 +705,6 @@ octeon_get_dispatch(struct octeon_device *octeon_dev, u16 opcode,
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*/
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struct octeon_device *lio_get_device(u32 octeon_id);
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/** Get the octeon id assigned to the octeon device passed as argument.
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* This function is exported to other modules.
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* @param dev - octeon device pointer passed as a void *.
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* @return octeon device id
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*/
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int lio_get_device_id(void *dev);
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/** Read windowed register.
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* @param oct - pointer to the Octeon device.
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* @param addr - Address of the register to read.
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@@ -1211,9 +1211,6 @@ struct adapter {
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struct timer_list flower_stats_timer;
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struct work_struct flower_stats_work;
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/* Ethtool Dump */
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struct ethtool_dump eth_dump;
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/* HMA */
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struct hma_data hma;
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@@ -1233,6 +1230,10 @@ struct adapter {
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/* Ethtool n-tuple */
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struct cxgb4_ethtool_filter *ethtool_filters;
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/* Ethtool Dump */
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/* Must be last - ends in a flex-array member. */
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struct ethtool_dump eth_dump;
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};
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/* Support for "sched-class" command to allow a TX Scheduling Class to be
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@@ -526,28 +526,6 @@ out:
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return res;
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}
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u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones, u32 uid, u32 obj, u32 count)
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{
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struct mlx4_zone_entry *zone;
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int res = 0;
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spin_lock(&zones->lock);
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zone = __mlx4_find_zone_by_uid(zones, uid);
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if (NULL == zone) {
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res = -1;
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goto out;
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}
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__mlx4_free_from_zone(zone, obj, count);
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out:
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spin_unlock(&zones->lock);
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return res;
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}
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u32 mlx4_zone_free_entries_unique(struct mlx4_zone_allocator *zones, u32 obj, u32 count)
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{
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struct mlx4_zone_entry *zone;
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@@ -1478,12 +1478,6 @@ void mlx4_zone_allocator_destroy(struct mlx4_zone_allocator *zone_alloc);
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u32 mlx4_zone_alloc_entries(struct mlx4_zone_allocator *zones, u32 uid, int count,
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int align, u32 skip_mask, u32 *puid);
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/* Free <count> objects, start from <obj> of the uid <uid> from zone_allocator
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* <zones>.
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*/
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u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones,
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u32 uid, u32 obj, u32 count);
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/* If <zones> was allocated with MLX4_ZONE_ALLOC_FLAGS_NO_OVERLAP, instead of
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* specifying the uid when freeing an object, zone allocator could figure it by
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* itself. Other parameters are similar to mlx4_zone_free.
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@@ -147,26 +147,6 @@ static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,
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return err;
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}
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int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx)
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{
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struct mlx4_port_info *info = &mlx4_priv(dev)->port[port];
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struct mlx4_mac_table *table = &info->mac_table;
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int i;
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for (i = 0; i < MLX4_MAX_MAC_NUM; i++) {
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if (!table->refs[i])
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continue;
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if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) {
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*idx = i;
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return 0;
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}
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}
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(mlx4_find_cached_mac);
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static bool mlx4_need_mf_bond(struct mlx4_dev *dev)
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{
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int i, num_eth_ports = 0;
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@@ -296,11 +296,16 @@ enum mlx5e_fec_supported_link_mode {
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MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X,
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MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X,
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MLX5E_MAX_FEC_SUPPORTED_LINK_MODE,
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};
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#define MLX5E_FEC_FIRST_50G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_50G_1X
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#define MLX5E_FEC_FIRST_100G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X
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#define MLX5E_FEC_FIRST_200G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X
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||||
#define MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, policy, write, link) \
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||||
do { \
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||||
@@ -320,8 +325,10 @@ static bool mlx5e_is_fec_supported_link_mode(struct mlx5_core_dev *dev,
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return link_mode < MLX5E_FEC_FIRST_50G_PER_LANE_MODE ||
|
||||
(link_mode < MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&
|
||||
MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm)) ||
|
||||
(link_mode >= MLX5E_FEC_FIRST_100G_PER_LANE_MODE &&
|
||||
MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm));
|
||||
(link_mode < MLX5E_FEC_FIRST_200G_PER_LANE_MODE &&
|
||||
MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm)) ||
|
||||
(link_mode >= MLX5E_FEC_FIRST_200G_PER_LANE_MODE &&
|
||||
MLX5_CAP_PCAM_FEATURE(dev, fec_200G_per_lane_in_pplm));
|
||||
}
|
||||
|
||||
/* get/set FEC admin field for a given speed */
|
||||
@@ -368,6 +375,18 @@ static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write,
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:
|
||||
MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_8x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X:
|
||||
MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 200g_1x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X:
|
||||
MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_2x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X:
|
||||
MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_4x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X:
|
||||
MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 1600g_8x);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
@@ -421,6 +440,18 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap,
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:
|
||||
*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_8x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X:
|
||||
*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 200g_1x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X:
|
||||
*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_2x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X:
|
||||
*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_4x);
|
||||
break;
|
||||
case MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X:
|
||||
*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 1600g_8x);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
@@ -494,6 +525,26 @@ out:
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u16 mlx5e_remap_fec_conf_mode(enum mlx5e_fec_supported_link_mode link_mode,
|
||||
u16 conf_fec)
|
||||
{
|
||||
/* RS fec in ethtool is originally mapped to MLX5E_FEC_RS_528_514.
|
||||
* For link modes up to 25G per lane, the value is kept.
|
||||
* For 50G or 100G per lane, it's remapped to MLX5E_FEC_RS_544_514.
|
||||
* For 200G per lane, remapped to MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD.
|
||||
*/
|
||||
if (conf_fec != BIT(MLX5E_FEC_RS_528_514))
|
||||
return conf_fec;
|
||||
|
||||
if (link_mode >= MLX5E_FEC_FIRST_200G_PER_LANE_MODE)
|
||||
return BIT(MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD);
|
||||
|
||||
if (link_mode >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)
|
||||
return BIT(MLX5E_FEC_RS_544_514);
|
||||
|
||||
return conf_fec;
|
||||
}
|
||||
|
||||
int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy)
|
||||
{
|
||||
bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);
|
||||
@@ -530,14 +581,7 @@ int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy)
|
||||
if (!mlx5e_is_fec_supported_link_mode(dev, i))
|
||||
break;
|
||||
|
||||
/* RS fec in ethtool is mapped to MLX5E_FEC_RS_528_514
|
||||
* to link modes up to 25G per lane and to
|
||||
* MLX5E_FEC_RS_544_514 in the new link modes based on
|
||||
* 50G or 100G per lane
|
||||
*/
|
||||
if (conf_fec == (1 << MLX5E_FEC_RS_528_514) &&
|
||||
i >= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)
|
||||
conf_fec = (1 << MLX5E_FEC_RS_544_514);
|
||||
conf_fec = mlx5e_remap_fec_conf_mode(i, conf_fec);
|
||||
|
||||
mlx5e_get_fec_cap_field(out, &fec_caps, i);
|
||||
|
||||
|
||||
@@ -61,6 +61,7 @@ enum {
|
||||
MLX5E_FEC_NOFEC,
|
||||
MLX5E_FEC_FIRECODE,
|
||||
MLX5E_FEC_RS_528_514,
|
||||
MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD = 4,
|
||||
MLX5E_FEC_RS_544_514 = 7,
|
||||
MLX5E_FEC_LLRS_272_257_1 = 9,
|
||||
};
|
||||
|
||||
@@ -326,7 +326,7 @@ static int mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp *c, int txq_ix,
|
||||
int node;
|
||||
|
||||
sq->pdev = c->pdev;
|
||||
sq->clock = &mdev->clock;
|
||||
sq->clock = mdev->clock;
|
||||
sq->mkey_be = c->mkey_be;
|
||||
sq->netdev = c->netdev;
|
||||
sq->priv = c->priv;
|
||||
@@ -696,7 +696,7 @@ static int mlx5e_init_ptp_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
|
||||
rq->pdev = c->pdev;
|
||||
rq->netdev = priv->netdev;
|
||||
rq->priv = priv;
|
||||
rq->clock = &mdev->clock;
|
||||
rq->clock = mdev->clock;
|
||||
rq->tstamp = &priv->tstamp;
|
||||
rq->mdev = mdev;
|
||||
rq->hw_mtu = MLX5E_SW2HW_MTU(params, params->sw_mtu);
|
||||
|
||||
@@ -73,11 +73,6 @@ struct mlx5e_tc_act {
|
||||
bool is_terminating_action;
|
||||
};
|
||||
|
||||
struct mlx5e_tc_flow_action {
|
||||
unsigned int num_entries;
|
||||
struct flow_action_entry **entries;
|
||||
};
|
||||
|
||||
extern struct mlx5e_tc_act mlx5e_tc_act_drop;
|
||||
extern struct mlx5e_tc_act mlx5e_tc_act_trap;
|
||||
extern struct mlx5e_tc_act mlx5e_tc_act_accept;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user