mirror of
https://github.com/linux-msm/laptops-kernel.git
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Merge tag 'char-misc-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc/IIO driver updates from Greg KH: "Here is the big set of char/misc/iio and other smaller driver subsystem changes for 7.0-rc1. Lots of little things in here, including: - Loads of iio driver changes and updates and additions - gpib driver updates - interconnect driver updates - i3c driver updates - hwtracing (coresight and intel) driver updates - deletion of the obsolete mwave driver - binder driver updates (rust and c versions) - mhi driver updates (causing a merge conflict, see below) - mei driver updates - fsi driver updates - eeprom driver updates - lots of other small char and misc driver updates and cleanups All of these have been in linux-next for a while, with no reported issues" * tag 'char-misc-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (297 commits) mux: mmio: fix regmap leak on probe failure rust_binder: return p from rust_binder_transaction_target_node() drivers: android: binder: Update ARef imports from sync::aref rust_binder: fix needless borrow in context.rs iio: magn: mmc5633: Fix Kconfig for combination of I3C as module and driver builtin iio: sca3000: Fix a resource leak in sca3000_probe() iio: proximity: rfd77402: Add interrupt handling support iio: proximity: rfd77402: Document device private data structure iio: proximity: rfd77402: Use devm-managed mutex initialization iio: proximity: rfd77402: Use kernel helper for result polling iio: proximity: rfd77402: Align polling timeout with datasheet iio: cros_ec: Allow enabling/disabling calibration mode iio: frequency: ad9523: correct kernel-doc bad line warning iio: buffer: buffer_impl.h: fix kernel-doc warnings iio: gyro: itg3200: Fix unchecked return value in read_raw MAINTAINERS: add entry for ADE9000 driver iio: accel: sca3000: remove unused last_timestamp field iio: accel: adxl372: remove unused int2_bitmask field iio: adc: ad7766: Use iio_trigger_generic_data_rdy_poll() iio: magnetometer: Remove IRQF_ONESHOT ...
This commit is contained in:
Linus Torvalds
@@ -23,8 +23,7 @@ What: /sys/accessibility/speakup/bleep_time
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KernelVersion: 2.6
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Contact: speakup@linux-speakup.org
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Description: This controls the duration of the PC speaker beeps speakup
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produces.
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TODO: What are the units? Jiffies?
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produces, in milliseconds.
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What: /sys/accessibility/speakup/cursor_time
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KernelVersion: 2.6
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@@ -1,7 +1,7 @@
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What: /sys/bus/coresight/devices/dummy_source<N>/enable_source
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Date: Dec 2024
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KernelVersion: 6.14
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Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
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Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
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Description: (RW) Enable/disable tracing of dummy source. A sink should be activated
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before enabling the source. The path of coresight components linking
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the source to the sink is configured and managed automatically by the
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@@ -10,7 +10,7 @@ Description: (RW) Enable/disable tracing of dummy source. A sink should be activ
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What: /sys/bus/coresight/devices/dummy_source<N>/traceid
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Date: Dec 2024
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KernelVersion: 6.14
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Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
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Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
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Description: (R) Show the trace ID that will appear in the trace stream
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coming from this trace entity.
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@@ -0,0 +1,69 @@
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What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger synchronization sequence interface.
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What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger FLAG packet request interface.
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What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger FREQ packet request interface.
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What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable the timestamp for all FREQ packets.
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What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Configure the CMB/MCMB channel mode for all enabled ports.
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Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
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What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set global (all ports) flush request bit. The bit remains set until a
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global flush request sequence completes.
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What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set mode the of the syncr counter.
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mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
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mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
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data by writing a value 13 to the COUNT[11:7] field.
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What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
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Date: December 2025
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KernelVersion: 6.20
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set value the of the syncr counter.
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Range: 0-4095
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What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
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Date: December 2025
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KernelVersion: 6.20
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Configure the bit i to requests a flush operation of port i on the TPDA.
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The requested bit(s) remain set until the flush request completes.
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@@ -1,7 +1,7 @@
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What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
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Date: January 2023
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KernelVersion: 6.2
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||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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Description:
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(Write) Run integration test for tpdm. Integration test
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will generate test data for tpdm. It can help to make
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@@ -15,7 +15,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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(Write) Reset the dataset of the tpdm.
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@@ -25,7 +25,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
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||||
Date: March 2023
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||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the trigger type of the DSB for tpdm.
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|
||||
@@ -36,7 +36,7 @@ Description:
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||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
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||||
Date: March 2023
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||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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||||
(RW) Set/Get the trigger timestamp of the DSB for tpdm.
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||||
@@ -47,7 +47,7 @@ Description:
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||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
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Date: March 2023
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||||
KernelVersion: 6.7
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||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the programming mode of the DSB for tpdm.
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||||
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@@ -61,7 +61,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
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Date: March 2023
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||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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||||
(RW) Set/Get the index number of the edge detection for the DSB
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subunit TPDM. Since there are at most 256 edge detections, this
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@@ -70,7 +70,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
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Date: March 2023
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KernelVersion: 6.7
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||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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Write a data to control the edge detection corresponding to
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the index number. Before writing data to this sysfs file,
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@@ -86,7 +86,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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Write a data to mask the edge detection corresponding to the index
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number. Before writing data to this sysfs file, "ctrl_idx" should
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@@ -98,21 +98,21 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
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Date: March 2023
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KernelVersion: 6.7
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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||||
Description:
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Read a set of the edge control value of the DSB in TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
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Date: March 2023
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KernelVersion: 6.7
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||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
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||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
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Read a set of the edge control mask of the DSB in TPDM.
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
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Date: March 2023
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||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
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||||
(RW) Set/Get the value of the trigger pattern for the DSB
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subunit TPDM.
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@@ -120,7 +120,7 @@ Description:
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What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the mask of the trigger pattern for the DSB
|
||||
subunit TPDM.
|
||||
@@ -128,21 +128,21 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the value of the pattern for the DSB subunit TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the mask of the pattern for the DSB subunit TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(Write) Set the pattern timestamp of DSB tpdm. Read
|
||||
the pattern timestamp of DSB tpdm.
|
||||
@@ -154,7 +154,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(Write) Set the pattern type of DSB tpdm. Read
|
||||
the pattern type of DSB tpdm.
|
||||
@@ -166,7 +166,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
|
||||
Date: March 2023
|
||||
KernelVersion: 6.7
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the MSR(mux select register) for the DSB subunit
|
||||
TPDM.
|
||||
@@ -174,7 +174,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description: (Write) Set the data collection mode of CMB tpdm. Continuous
|
||||
change creates CMB data set elements on every CMBCLK edge.
|
||||
Trace-on-change creates CMB data set elements only when a new
|
||||
@@ -188,7 +188,7 @@ Description: (Write) Set the data collection mode of CMB tpdm. Continuous
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the value of the trigger pattern for the CMB
|
||||
subunit TPDM.
|
||||
@@ -196,7 +196,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the mask of the trigger pattern for the CMB
|
||||
subunit TPDM.
|
||||
@@ -204,21 +204,21 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the value of the pattern for the CMB subunit TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(Write) Set the pattern timestamp of CMB tpdm. Read
|
||||
the pattern timestamp of CMB tpdm.
|
||||
@@ -230,7 +230,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the trigger timestamp of the CMB for tpdm.
|
||||
|
||||
@@ -241,7 +241,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Read or write the status of timestamp upon all interface.
|
||||
Only value 0 and 1 can be written to this node. Set this node to 1 to request
|
||||
@@ -253,7 +253,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]
|
||||
Date: January 2024
|
||||
KernelVersion: 6.9
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the MSR(mux select register) for the CMB subunit
|
||||
TPDM.
|
||||
@@ -261,7 +261,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
|
||||
Date: Feb 2025
|
||||
KernelVersion 6.15
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get which lane participates in the output pattern
|
||||
match cross trigger mechanism for the MCMB subunit TPDM.
|
||||
@@ -269,7 +269,7 @@ Description:
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
|
||||
Date: Feb 2025
|
||||
KernelVersion 6.15
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
Description:
|
||||
(RW) Set/Get the enablement of the individual lane.
|
||||
|
||||
|
||||
@@ -3,9 +3,12 @@ Date: July 2015
|
||||
KernelVersion: 4.7
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Writing '1' will perform a FOC (Fast Online Calibration). The
|
||||
corresponding calibration offsets can be read from `*_calibbias`
|
||||
entries.
|
||||
Writing '1' either perform a FOC (Fast Online Calibration) or
|
||||
enter calibration mode.
|
||||
Writing '0` exits calibration mode. It is a NOP for FOC enabled
|
||||
sensors.
|
||||
The corresponding calibration offsets can be read from `*_calibbias`
|
||||
entries.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/id
|
||||
Date: September 2017
|
||||
|
||||
@@ -17,3 +17,14 @@ Description:
|
||||
from the device.
|
||||
|
||||
This is a read-only attribute.
|
||||
|
||||
What: /sys/class/spi_master/spi<bus>/spi<bus>.<dev>/jedec_id
|
||||
Date: January 2026
|
||||
KernelVersion: 6.19
|
||||
Contact: Patrick Wicki <patrick.wicki@siemens.com>
|
||||
Description:
|
||||
Contains the raw JEDEC ID bytes returned by the RDID (0x9f) command. The
|
||||
bytes are exposed as a hex string in big-endian order as read from the
|
||||
device.
|
||||
|
||||
This is a read-only attribute.
|
||||
|
||||
@@ -352,7 +352,7 @@
|
||||
216 = /dev/fujitsu/apanel Fujitsu/Siemens application panel
|
||||
217 = /dev/ni/natmotn National Instruments Motion
|
||||
218 = /dev/kchuid Inter-process chuid control
|
||||
219 = /dev/modems/mwave MWave modem firmware upload
|
||||
219 =
|
||||
220 = /dev/mptctl Message passing technology (MPT) control
|
||||
221 = /dev/mvista/hssdsi Montavista PICMG hot swap system driver
|
||||
222 = /dev/mvista/hasi Montavista PICMG high availability
|
||||
|
||||
@@ -31,7 +31,7 @@ maintainers:
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
- James Clark <james.clark@linaro.org>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
|
||||
- Hao Zhang <quic_hazha@quicinc.com>
|
||||
|
||||
properties:
|
||||
|
||||
@@ -30,7 +30,7 @@ maintainers:
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
- James Clark <james.clark@linaro.org>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
|
||||
- Hao Zhang <quic_hazha@quicinc.com>
|
||||
|
||||
properties:
|
||||
|
||||
@@ -7,9 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: CoreSight TMC Control Unit
|
||||
|
||||
maintainers:
|
||||
- Yuanfang Zhang <quic_yuanfang@quicinc.com>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Jie Gan <quic_jiegan@quicinc.com>
|
||||
- Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
|
||||
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
|
||||
- Jie Gan <jie.gan@oss.qualcomm.com>
|
||||
|
||||
description: |
|
||||
The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
|
||||
@@ -26,8 +26,13 @@ description: |
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sa8775p-ctcu
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,qcs8300-ctcu
|
||||
- const: qcom,sa8775p-ctcu
|
||||
- enum:
|
||||
- qcom,sa8775p-ctcu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -0,0 +1,90 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Interconnect Trace Network On Chip - ITNOC
|
||||
|
||||
maintainers:
|
||||
- Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
|
||||
|
||||
description:
|
||||
The Interconnect TNOC is a CoreSight graph link that forwards trace data
|
||||
from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it
|
||||
does not have aggregation and ATID functionality.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^itnoc(@[0-9a-f]+)?$"
|
||||
|
||||
compatible:
|
||||
const: qcom,coresight-itnoc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: apb
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port(@[0-9a-f]{1,2})?$':
|
||||
description: Input connections from CoreSight Trace Bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: out connections to aggregator TNOC
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
- out-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
itnoc@109ac000 {
|
||||
compatible = "qcom,coresight-itnoc";
|
||||
reg = <0x109ac000 0x1000>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
tn_ic_in_tpdm_dcc: endpoint {
|
||||
remote-endpoint = <&tpdm_dcc_out_tn_ic>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
tn_ic_out_tnoc_aggr: endpoint {
|
||||
/* to Aggregator TNOC input */
|
||||
remote-endpoint = <&tn_ag_in_tn_ic>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell)
|
||||
|
||||
maintainers:
|
||||
- Jinlong Mao <quic_jinlmao@quicinc.com>
|
||||
- Tao Zhang <quic_taozha@quicinc.com>
|
||||
- Jinlong Mao <jinlong.mao@oss.qualcomm.com>
|
||||
- Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
|
||||
description:
|
||||
Support for ETM trace collection on remote processor using coresight
|
||||
|
||||
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Qualcomm Trace Network On Chip - TNOC
|
||||
|
||||
maintainers:
|
||||
- Yuanfang Zhang <quic_yuanfang@quicinc.com>
|
||||
- Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
|
||||
|
||||
description: >
|
||||
The Trace Network On Chip (TNOC) is an integration hierarchy hardware
|
||||
|
||||
@@ -33,8 +33,8 @@ description: |
|
||||
to sink.
|
||||
|
||||
maintainers:
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Tao Zhang <quic_taozha@quicinc.com>
|
||||
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
|
||||
- Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
|
||||
@@ -19,8 +19,8 @@ description: |
|
||||
sources and send it to a TPDA for packetization, timestamping, and funneling.
|
||||
|
||||
maintainers:
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Tao Zhang <quic_taozha@quicinc.com>
|
||||
- Mao Jinlong <jinlong.mao@oss.qualcomm.com>
|
||||
- Tao Zhang <tao.zhang@oss.qualcomm.com>
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
|
||||
@@ -1,17 +0,0 @@
|
||||
Android Goldfish QEMU Pipe
|
||||
|
||||
Android pipe virtual device generated by android emulator.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should contain "google,android-pipe" to match emulator
|
||||
- reg : <registers mapping>
|
||||
- interrupts : <interrupt mapping>
|
||||
|
||||
Example:
|
||||
|
||||
android_pipe@a010000 {
|
||||
compatible = "google,android-pipe";
|
||||
reg = <ff018000 0x2000>;
|
||||
interrupts = <0x12>;
|
||||
};
|
||||
@@ -0,0 +1,120 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright 2025 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad4062.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD4062 ADC family device driver
|
||||
|
||||
maintainers:
|
||||
- Jorge Marques <jorge.marques@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices AD4062 Single Channel Precision SAR ADC family
|
||||
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4060.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4062.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad4060
|
||||
- adi,ad4062
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
Two pins are available that can be configured as either a general purpose
|
||||
digital output, device enable signal (used to synchronise other parts of
|
||||
the signal chain with ADC sampling), device ready (GP1 only) or various
|
||||
interrupt signals. If intended for use as a GPIO or device enable, will not
|
||||
present here.
|
||||
minItems: 1
|
||||
items:
|
||||
- description:
|
||||
GP0 pin, cannot be configured as DEV_RDY.
|
||||
- description:
|
||||
GP1 pin, can be configured to any setting.
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: gp0
|
||||
- const: gp1
|
||||
|
||||
gpio-controller:
|
||||
description:
|
||||
Marks the device node as a GPIO controller. GPs not listed as interrupts
|
||||
are exposed as a GPO.
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
description:
|
||||
The first cell is the GPIO number and the second cell specifies
|
||||
GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
|
||||
|
||||
vdd-supply:
|
||||
description: Analog power supply.
|
||||
|
||||
vio-supply:
|
||||
description: Digital interface logic power supply.
|
||||
|
||||
ref-supply:
|
||||
description:
|
||||
Reference voltage to set the ADC full-scale range. If not present,
|
||||
vdd-supply is used as the reference voltage.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
- vio-supply
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/i3c/i3c.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i3c {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0,2ee007c0000 {
|
||||
reg = <0x0 0x2ee 0x7c0000>;
|
||||
vdd-supply = <&vdd>;
|
||||
vio-supply = <&vio>;
|
||||
ref-supply = <&ref>;
|
||||
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <0 0 IRQ_TYPE_EDGE_RISING>,
|
||||
<0 1 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-names = "gp0", "gp1";
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i3c {
|
||||
#address-cells = <3>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0,2ee007c0000 {
|
||||
reg = <0x0 0x2ee 0x7c0000>;
|
||||
vdd-supply = <&vdd>;
|
||||
vio-supply = <&vio>;
|
||||
ref-supply = <&ref>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,191 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad4134.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD4134 ADC
|
||||
|
||||
maintainers:
|
||||
- Marcelo Schmitt <marcelo.schmitt@analog.com>
|
||||
|
||||
description: |
|
||||
The AD4134 is a quad channel, low noise, simultaneous sampling, precision
|
||||
analog-to-digital converter (ADC).
|
||||
Specifications can be found at:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4134.pdf
|
||||
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad4134
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 50000000
|
||||
|
||||
avdd5-supply:
|
||||
description: A 5V supply that powers the chip's analog circuitry.
|
||||
|
||||
dvdd5-supply:
|
||||
description: A 5V supply that powers the chip's digital circuitry.
|
||||
|
||||
iovdd-supply:
|
||||
description:
|
||||
A 1.8V supply that sets the logic levels for the digital interface pins.
|
||||
|
||||
refin-supply:
|
||||
description:
|
||||
A 4.096V or 5V supply that serves as reference for ADC conversions.
|
||||
|
||||
avdd1v8-supply:
|
||||
description: A 1.8V supply used by the analog circuitry.
|
||||
|
||||
dvdd1v8-supply:
|
||||
description: A 1.8V supply used by the digital circuitry.
|
||||
|
||||
clkvdd-supply:
|
||||
description: A 1.8V supply for the chip's clock management circuit.
|
||||
|
||||
ldoin-supply:
|
||||
description:
|
||||
A 2.6V to 5.5V supply that generates 1.8V for AVDD1V8, DVDD1V8, and CLKVDD
|
||||
pins.
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description:
|
||||
Required external clock source. Can specify either a crystal or CMOS clock
|
||||
source. If an external crystal is set, connect the CLKSEL pin to IOVDD.
|
||||
Otherwise, connect the CLKSEL pin to IOGND and the external CMOS clock
|
||||
signal to the XTAL2/CLKIN pin.
|
||||
|
||||
clock-names:
|
||||
enum:
|
||||
- xtal
|
||||
- clkin
|
||||
default: clkin
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
regulators:
|
||||
type: object
|
||||
description:
|
||||
list of regulators provided by this controller.
|
||||
|
||||
properties:
|
||||
vcm-output:
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
type: object
|
||||
unevaluatedProperties: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
powerdown-gpios:
|
||||
description:
|
||||
Active low GPIO connected to the /PDN pin. Forces the device into full
|
||||
power-down mode when brought low. Pull this input to IOVDD for normal
|
||||
operation.
|
||||
maxItems: 1
|
||||
|
||||
odr-gpios:
|
||||
description:
|
||||
GPIO connected to ODR pin. Used to sample ADC data in minimum I/O mode.
|
||||
maxItems: 1
|
||||
|
||||
adi,asrc-mode:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description:
|
||||
Asynchronous Sample Rate Converter (ASRC) operation mode control input.
|
||||
Describes whether the MODE pin is set to a high level (for master mode
|
||||
operation) or to a low level (for slave mode operation).
|
||||
enum: [ high, low ]
|
||||
default: low
|
||||
|
||||
adi,dclkio:
|
||||
description:
|
||||
DCLK pin I/O direction control for when the device operates in Pin Control
|
||||
Slave Mode or in SPI Control Mode. Describes if DEC0/DCLKIO pin is at a
|
||||
high level (which configures DCLK as an output) or to set to a low level
|
||||
(configuring DCLK for input).
|
||||
enum: [ out, in ]
|
||||
default: in
|
||||
|
||||
adi,dclkmode:
|
||||
description:
|
||||
DCLK mode control for when the device operates in Pin Control Slave Mode
|
||||
or in SPI Control Mode. Describes whether the DEC1/DCLKMODE pin is set to
|
||||
a high level (configuring the DCLK to operate in free running mode) or
|
||||
to a low level (to configure DCLK to operate in gated mode).
|
||||
enum: [ free-running, gated ]
|
||||
default: gated
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd5-supply
|
||||
- dvdd5-supply
|
||||
- iovdd-supply
|
||||
- refin-supply
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- ldoin-supply
|
||||
- required:
|
||||
- avdd1v8-supply
|
||||
- dvdd1v8-supply
|
||||
- clkvdd-supply
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "adi,ad4134";
|
||||
reg = <0>;
|
||||
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
|
||||
odr-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
|
||||
powerdown-gpios = <&gpio0 88 GPIO_ACTIVE_LOW>;
|
||||
|
||||
clocks = <&sys_clk>;
|
||||
clock-names = "clkin";
|
||||
|
||||
avdd5-supply = <&avdd5>;
|
||||
dvdd5-supply = <&dvdd5>;
|
||||
iovdd-supply = <&iovdd>;
|
||||
refin-supply = <&refin>;
|
||||
avdd1v8-supply = <&avdd1v8>;
|
||||
dvdd1v8-supply = <&dvdd1v8>;
|
||||
clkvdd-supply = <&clkvdd>;
|
||||
|
||||
regulators {
|
||||
vcm_reg: vcm-output {
|
||||
regulator-name = "ad4134-vcm";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -4,18 +4,26 @@
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD7768-1 ADC device driver
|
||||
title: Analog Devices AD7768-1 ADC family
|
||||
|
||||
maintainers:
|
||||
- Michael Hennerich <michael.hennerich@analog.com>
|
||||
|
||||
description: |
|
||||
Datasheet at:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
|
||||
Analog Devices AD7768-1 24-Bit Single Channel Low Power sigma-delta ADC family
|
||||
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7767-1.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7768-1.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7769-1.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: adi,ad7768-1
|
||||
enum:
|
||||
- adi,ad7768-1
|
||||
- adi,adaq7767-1
|
||||
- adi,adaq7768-1
|
||||
- adi,adaq7769-1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -58,6 +66,25 @@ properties:
|
||||
description:
|
||||
ADC reference voltage supply
|
||||
|
||||
adi,aaf-gain-bp:
|
||||
description: |
|
||||
Specifies the gain applied by the Analog Anti-Aliasing Filter (AAF)
|
||||
to the ADC input in basis points (one hundredth of a percent).
|
||||
The hardware gain is determined by which input pin(s) the signal goes
|
||||
through into the AAF. The possible connections are:
|
||||
* For the ADAQ7767-1: Input connected to IN1±, IN2± or IN3±.
|
||||
* For the ADAQ7769-1: OUT_PGA pin connected to IN1_AAF+, IN2_AAF+,
|
||||
or IN3_AAF+.
|
||||
enum: [1430, 3640, 10000]
|
||||
default: 10000
|
||||
|
||||
pga-gpios:
|
||||
description:
|
||||
GAIN 0, GAIN1 and GAIN2 pins for gain selection. For devices that have
|
||||
PGA configuration input pins, pga-gpios must be defined.
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
adi,sync-in-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
@@ -147,6 +174,35 @@ patternProperties:
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
# AAF Gain property only applies to ADAQ7767-1 and ADAQ7769-1 devices
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- adi,adaq7767-1
|
||||
- adi,adaq7769-1
|
||||
then:
|
||||
required:
|
||||
- adi,aaf-gain-bp
|
||||
else:
|
||||
properties:
|
||||
adi,aaf-gain-bp: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- adi,adaq7768-1
|
||||
- adi,adaq7769-1
|
||||
then:
|
||||
required:
|
||||
- pga-gpios
|
||||
else:
|
||||
properties:
|
||||
pga-gpios: false
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -18,6 +18,7 @@ description: |
|
||||
All the parts support the register map described by Application Note AN-877
|
||||
https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
|
||||
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD9211.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf
|
||||
@@ -25,6 +26,7 @@ description: |
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad9211
|
||||
- adi,ad9265
|
||||
- adi,ad9434
|
||||
- adi,ad9467
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user