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https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
drm/amdgpu: Get DRM dev from adev by inline-f
Add a static inline adev_to_drm() to obtain the DRM device pointer from an amdgpu_device pointer. Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
1348969ab6
commit
4a580877bd
@@ -991,6 +991,11 @@ static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
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return ddev->dev_private;
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}
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static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)
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{
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return adev->ddev;
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}
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static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
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{
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return container_of(bdev, struct amdgpu_device, mman.bdev);
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@@ -463,11 +463,11 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev,
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if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {
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if (adev->flags & AMD_IS_PX) {
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pm_runtime_get_sync(adev->ddev->dev);
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pm_runtime_get_sync(adev_to_drm(adev)->dev);
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/* Just fire off a uevent and let userspace tell us what to do */
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drm_helper_hpd_irq_event(adev->ddev);
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pm_runtime_mark_last_busy(adev->ddev->dev);
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pm_runtime_put_autosuspend(adev->ddev->dev);
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drm_helper_hpd_irq_event(adev_to_drm(adev));
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pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);
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pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
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}
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}
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/* TODO: check other events */
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@@ -817,7 +817,7 @@ int amdgpu_acpi_init(struct amdgpu_device *adev)
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struct drm_encoder *tmp;
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/* Find the encoder controlling the brightness */
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list_for_each_entry(tmp, &adev->ddev->mode_config.encoder_list,
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list_for_each_entry(tmp, &adev_to_drm(adev)->mode_config.encoder_list,
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head) {
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struct amdgpu_encoder *enc = to_amdgpu_encoder(tmp);
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@@ -119,7 +119,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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.gpuvm_size = min(adev->vm_manager.max_pfn
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<< AMDGPU_GPU_PAGE_SHIFT,
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AMDGPU_GMC_HOLE_START),
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.drm_render_minor = adev->ddev->render->index,
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.drm_render_minor = adev_to_drm(adev)->render->index,
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.sdma_doorbell_idx = adev->doorbell_index.sdma_engine,
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};
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@@ -160,7 +160,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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adev->doorbell_index.last_non_cp;
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}
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kgd2kfd_device_init(adev->kfd.dev, adev->ddev, &gpu_resources);
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kgd2kfd_device_init(adev->kfd.dev, adev_to_drm(adev), &gpu_resources);
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}
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}
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@@ -479,7 +479,7 @@ int amdgpu_amdkfd_get_dmabuf_info(struct kgd_dev *kgd, int dma_buf_fd,
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goto out_put;
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obj = dma_buf->priv;
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if (obj->dev->driver != adev->ddev->driver)
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if (obj->dev->driver != adev_to_drm(adev)->driver)
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/* Can't handle buffers from different drivers */
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goto out_put;
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@@ -148,7 +148,7 @@ void amdgpu_atombios_i2c_init(struct amdgpu_device *adev)
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if (i2c.valid) {
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sprintf(stmp, "0x%x", i2c.i2c_id);
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adev->i2c_bus[i] = amdgpu_i2c_create(adev->ddev, &i2c, stmp);
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adev->i2c_bus[i] = amdgpu_i2c_create(adev_to_drm(adev), &i2c, stmp);
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}
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gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
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((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
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@@ -541,7 +541,7 @@ bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *
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}
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}
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amdgpu_link_encoder_connector(adev->ddev);
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amdgpu_link_encoder_connector(adev_to_drm(adev));
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return true;
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}
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@@ -1995,7 +1995,7 @@ int amdgpu_atombios_init(struct amdgpu_device *adev)
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return -ENOMEM;
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adev->mode_info.atom_card_info = atom_card_info;
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atom_card_info->dev = adev->ddev;
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atom_card_info->dev = adev_to_drm(adev);
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atom_card_info->reg_read = cail_reg_read;
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atom_card_info->reg_write = cail_reg_write;
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/* needed for iio ops */
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@@ -1521,7 +1521,7 @@ amdgpu_connector_add(struct amdgpu_device *adev,
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struct amdgpu_hpd *hpd,
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struct amdgpu_router *router)
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{
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struct drm_device *dev = adev->ddev;
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struct drm_device *dev = adev_to_drm(adev);
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struct drm_connector *connector;
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struct drm_connector_list_iter iter;
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struct amdgpu_connector *amdgpu_connector;
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File diff suppressed because it is too large
Load Diff
@@ -1509,7 +1509,7 @@ static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev)
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adev->enable_virtual_display = false;
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if (amdgpu_virtual_display) {
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struct drm_device *ddev = adev->ddev;
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struct drm_device *ddev = adev_to_drm(adev);
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const char *pci_address_name = pci_name(ddev->pdev);
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char *pciaddstr, *pciaddstr_tmp, *pciaddname_tmp, *pciaddname;
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@@ -2872,13 +2872,13 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
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if (amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
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task_barrier_enter(&hive->tb);
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adev->asic_reset_res = amdgpu_device_baco_enter(adev->ddev);
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adev->asic_reset_res = amdgpu_device_baco_enter(adev_to_drm(adev));
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if (adev->asic_reset_res)
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goto fail;
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task_barrier_exit(&hive->tb);
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adev->asic_reset_res = amdgpu_device_baco_exit(adev->ddev);
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adev->asic_reset_res = amdgpu_device_baco_exit(adev_to_drm(adev));
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if (adev->asic_reset_res)
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goto fail;
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@@ -2894,7 +2894,7 @@ static void amdgpu_device_xgmi_reset_func(struct work_struct *__work)
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fail:
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if (adev->asic_reset_res)
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DRM_WARN("ASIC reset failed with error, %d for drm dev, %s",
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adev->asic_reset_res, adev->ddev->unique);
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adev->asic_reset_res, adev_to_drm(adev)->unique);
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amdgpu_put_xgmi_hive(hive);
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}
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@@ -3243,7 +3243,7 @@ fence_driver_init:
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}
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/* init the mode config */
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drm_mode_config_init(adev->ddev);
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drm_mode_config_init(adev_to_drm(adev));
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r = amdgpu_device_ip_init(adev);
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if (r) {
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@@ -3385,9 +3385,9 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
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amdgpu_irq_disable_all(adev);
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if (adev->mode_info.mode_config_initialized){
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if (!amdgpu_device_has_dc_support(adev))
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drm_helper_force_disable_all(adev->ddev);
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drm_helper_force_disable_all(adev_to_drm(adev));
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else
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drm_atomic_helper_shutdown(adev->ddev);
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drm_atomic_helper_shutdown(adev_to_drm(adev));
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}
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amdgpu_fence_driver_fini(adev);
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if (adev->pm_sysfs_en)
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@@ -3411,7 +3411,7 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
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amdgpu_has_atpx_dgpu_power_cntl()) &&
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!pci_is_thunderbolt_attached(adev->pdev))
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vga_switcheroo_unregister_client(adev->pdev);
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if (amdgpu_device_supports_boco(adev->ddev))
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if (amdgpu_device_supports_boco(adev_to_drm(adev)))
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vga_switcheroo_fini_domain_pm_ops(adev->dev);
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vga_client_register(adev->pdev, NULL, NULL, NULL);
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if (adev->rio_mem)
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@@ -4079,7 +4079,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive,
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if (r) {
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dev_err(tmp_adev->dev, "ASIC reset failed with error, %d for drm dev, %s",
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r, tmp_adev->ddev->unique);
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r, adev_to_drm(tmp_adev)->unique);
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break;
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}
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}
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@@ -4452,7 +4452,7 @@ retry: /* Rest of adevs pre asic reset from XGMI hive. */
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/*TODO Should we stop ?*/
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if (r) {
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dev_err(tmp_adev->dev, "GPU pre asic reset failed with err, %d for drm dev, %s ",
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r, tmp_adev->ddev->unique);
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r, adev_to_drm(tmp_adev)->unique);
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tmp_adev->asic_reset_res = r;
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}
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}
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@@ -4488,7 +4488,7 @@ skip_hw_reset:
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}
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if (!amdgpu_device_has_dc_support(tmp_adev) && !job_signaled) {
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drm_helper_resume_force_mode(tmp_adev->ddev);
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drm_helper_resume_force_mode(adev_to_drm(tmp_adev));
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}
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tmp_adev->asic_reset_res = 0;
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@@ -4665,7 +4665,7 @@ int amdgpu_device_baco_enter(struct drm_device *dev)
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struct amdgpu_device *adev = drm_to_adev(dev);
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struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
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if (!amdgpu_device_supports_baco(adev->ddev))
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if (!amdgpu_device_supports_baco(adev_to_drm(adev)))
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return -ENOTSUPP;
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if (ras && ras->supported)
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@@ -4680,7 +4680,7 @@ int amdgpu_device_baco_exit(struct drm_device *dev)
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struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
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int ret = 0;
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if (!amdgpu_device_supports_baco(adev->ddev))
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if (!amdgpu_device_supports_baco(adev_to_drm(adev)))
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return -ENOTSUPP;
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ret = amdgpu_dpm_baco_exit(adev);
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@@ -93,7 +93,7 @@ static void amdgpu_display_flip_work_func(struct work_struct *__work)
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* targeted by the flip
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*/
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if (amdgpu_crtc->enabled &&
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(amdgpu_display_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0,
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(amdgpu_display_get_crtc_scanoutpos(adev_to_drm(adev), work->crtc_id, 0,
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&vpos, &hpos, NULL, NULL,
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&crtc->hwmode)
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& (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) ==
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@@ -619,51 +619,51 @@ int amdgpu_display_modeset_create_props(struct amdgpu_device *adev)
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int sz;
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adev->mode_info.coherent_mode_property =
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drm_property_create_range(adev->ddev, 0 , "coherent", 0, 1);
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drm_property_create_range(adev_to_drm(adev), 0, "coherent", 0, 1);
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if (!adev->mode_info.coherent_mode_property)
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return -ENOMEM;
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adev->mode_info.load_detect_property =
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drm_property_create_range(adev->ddev, 0, "load detection", 0, 1);
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drm_property_create_range(adev_to_drm(adev), 0, "load detection", 0, 1);
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if (!adev->mode_info.load_detect_property)
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return -ENOMEM;
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drm_mode_create_scaling_mode_property(adev->ddev);
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drm_mode_create_scaling_mode_property(adev_to_drm(adev));
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sz = ARRAY_SIZE(amdgpu_underscan_enum_list);
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adev->mode_info.underscan_property =
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drm_property_create_enum(adev->ddev, 0,
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"underscan",
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amdgpu_underscan_enum_list, sz);
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drm_property_create_enum(adev_to_drm(adev), 0,
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"underscan",
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amdgpu_underscan_enum_list, sz);
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adev->mode_info.underscan_hborder_property =
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drm_property_create_range(adev->ddev, 0,
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"underscan hborder", 0, 128);
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drm_property_create_range(adev_to_drm(adev), 0,
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"underscan hborder", 0, 128);
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if (!adev->mode_info.underscan_hborder_property)
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return -ENOMEM;
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adev->mode_info.underscan_vborder_property =
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drm_property_create_range(adev->ddev, 0,
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"underscan vborder", 0, 128);
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drm_property_create_range(adev_to_drm(adev), 0,
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"underscan vborder", 0, 128);
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if (!adev->mode_info.underscan_vborder_property)
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return -ENOMEM;
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sz = ARRAY_SIZE(amdgpu_audio_enum_list);
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adev->mode_info.audio_property =
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drm_property_create_enum(adev->ddev, 0,
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drm_property_create_enum(adev_to_drm(adev), 0,
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"audio",
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amdgpu_audio_enum_list, sz);
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sz = ARRAY_SIZE(amdgpu_dither_enum_list);
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adev->mode_info.dither_property =
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drm_property_create_enum(adev->ddev, 0,
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drm_property_create_enum(adev_to_drm(adev), 0,
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"dither",
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amdgpu_dither_enum_list, sz);
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if (amdgpu_device_has_dc_support(adev)) {
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adev->mode_info.abm_level_property =
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drm_property_create_range(adev->ddev, 0,
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"abm level", 0, 4);
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drm_property_create_range(adev_to_drm(adev), 0,
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"abm level", 0, 4);
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if (!adev->mode_info.abm_level_property)
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return -ENOMEM;
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}
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@@ -135,7 +135,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
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AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
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AMDGPU_GEM_CREATE_VRAM_CLEARED;
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info = drm_get_format_info(adev->ddev, mode_cmd);
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info = drm_get_format_info(adev_to_drm(adev), mode_cmd);
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cpp = info->cpp[0];
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/* need to align pitch with crtc limits */
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@@ -231,7 +231,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
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goto out;
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}
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ret = amdgpu_display_framebuffer_init(adev->ddev, &rfbdev->rfb,
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ret = amdgpu_display_framebuffer_init(adev_to_drm(adev), &rfbdev->rfb,
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&mode_cmd, gobj);
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if (ret) {
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DRM_ERROR("failed to initialize framebuffer %d\n", ret);
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@@ -254,7 +254,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
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drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
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/* setup aperture base/size for vesafb takeover */
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info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
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info->apertures->ranges[0].base = adev_to_drm(adev)->mode_config.fb_base;
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info->apertures->ranges[0].size = adev->gmc.aper_size;
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/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
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@@ -270,7 +270,7 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
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DRM_INFO("fb depth is %d\n", fb->format->depth);
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DRM_INFO(" pitch is %d\n", fb->pitches[0]);
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vga_switcheroo_client_fb_set(adev->ddev->pdev, info);
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vga_switcheroo_client_fb_set(adev_to_drm(adev)->pdev, info);
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return 0;
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out:
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@@ -318,7 +318,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
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return 0;
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/* don't init fbdev if there are no connectors */
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if (list_empty(&adev->ddev->mode_config.connector_list))
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if (list_empty(&adev_to_drm(adev)->mode_config.connector_list))
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return 0;
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/* select 8 bpp console on low vram cards */
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@@ -332,10 +332,10 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
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rfbdev->adev = adev;
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adev->mode_info.rfbdev = rfbdev;
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drm_fb_helper_prepare(adev->ddev, &rfbdev->helper,
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&amdgpu_fb_helper_funcs);
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drm_fb_helper_prepare(adev_to_drm(adev), &rfbdev->helper,
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&amdgpu_fb_helper_funcs);
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ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper);
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ret = drm_fb_helper_init(adev_to_drm(adev), &rfbdev->helper);
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if (ret) {
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kfree(rfbdev);
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return ret;
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@@ -343,7 +343,7 @@ int amdgpu_fbdev_init(struct amdgpu_device *adev)
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/* disable all the possible outputs/crtcs before entering KMS mode */
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if (!amdgpu_device_has_dc_support(adev))
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drm_helper_disable_unused_functions(adev->ddev);
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drm_helper_disable_unused_functions(adev_to_drm(adev));
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drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
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return 0;
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@@ -354,7 +354,7 @@ void amdgpu_fbdev_fini(struct amdgpu_device *adev)
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if (!adev->mode_info.rfbdev)
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return;
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|
||||
amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev);
|
||||
amdgpu_fbdev_destroy(adev_to_drm(adev), adev->mode_info.rfbdev);
|
||||
kfree(adev->mode_info.rfbdev);
|
||||
adev->mode_info.rfbdev = NULL;
|
||||
}
|
||||
|
||||
@@ -155,7 +155,7 @@ int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f,
|
||||
seq);
|
||||
amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr,
|
||||
seq, flags | AMDGPU_FENCE_FLAG_INT);
|
||||
pm_runtime_get_noresume(adev->ddev->dev);
|
||||
pm_runtime_get_noresume(adev_to_drm(adev)->dev);
|
||||
ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask];
|
||||
if (unlikely(rcu_dereference_protected(*ptr, 1))) {
|
||||
struct dma_fence *old;
|
||||
@@ -284,8 +284,8 @@ bool amdgpu_fence_process(struct amdgpu_ring *ring)
|
||||
BUG();
|
||||
|
||||
dma_fence_put(fence);
|
||||
pm_runtime_mark_last_busy(adev->ddev->dev);
|
||||
pm_runtime_put_autosuspend(adev->ddev->dev);
|
||||
pm_runtime_mark_last_busy(adev_to_drm(adev)->dev);
|
||||
pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
|
||||
} while (last_seq != seq);
|
||||
|
||||
return true;
|
||||
|
||||
@@ -93,7 +93,7 @@ retry:
|
||||
|
||||
void amdgpu_gem_force_release(struct amdgpu_device *adev)
|
||||
{
|
||||
struct drm_device *ddev = adev->ddev;
|
||||
struct drm_device *ddev = adev_to_drm(adev);
|
||||
struct drm_file *file;
|
||||
|
||||
mutex_lock(&ddev->filelist_mutex);
|
||||
|
||||
@@ -253,7 +253,7 @@ void amdgpu_i2c_add(struct amdgpu_device *adev,
|
||||
const struct amdgpu_i2c_bus_rec *rec,
|
||||
const char *name)
|
||||
{
|
||||
struct drm_device *dev = adev->ddev;
|
||||
struct drm_device *dev = adev_to_drm(adev);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < AMDGPU_MAX_I2C_BUS; i++) {
|
||||
|
||||
@@ -85,7 +85,7 @@ static void amdgpu_hotplug_work_func(struct work_struct *work)
|
||||
{
|
||||
struct amdgpu_device *adev = container_of(work, struct amdgpu_device,
|
||||
hotplug_work);
|
||||
struct drm_device *dev = adev->ddev;
|
||||
struct drm_device *dev = adev_to_drm(adev);
|
||||
struct drm_mode_config *mode_config = &dev->mode_config;
|
||||
struct drm_connector *connector;
|
||||
struct drm_connector_list_iter iter;
|
||||
@@ -268,9 +268,9 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
|
||||
if (!adev->enable_virtual_display)
|
||||
/* Disable vblank IRQs aggressively for power-saving */
|
||||
/* XXX: can this be enabled for DC? */
|
||||
adev->ddev->vblank_disable_immediate = true;
|
||||
adev_to_drm(adev)->vblank_disable_immediate = true;
|
||||
|
||||
r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc);
|
||||
r = drm_vblank_init(adev_to_drm(adev), adev->mode_info.num_crtc);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
@@ -284,14 +284,14 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
|
||||
|
||||
adev->irq.installed = true;
|
||||
/* Use vector 0 for MSI-X */
|
||||
r = drm_irq_install(adev->ddev, pci_irq_vector(adev->pdev, 0));
|
||||
r = drm_irq_install(adev_to_drm(adev), pci_irq_vector(adev->pdev, 0));
|
||||
if (r) {
|
||||
adev->irq.installed = false;
|
||||
if (!amdgpu_device_has_dc_support(adev))
|
||||
flush_work(&adev->hotplug_work);
|
||||
return r;
|
||||
}
|
||||
adev->ddev->max_vblank_count = 0x00ffffff;
|
||||
adev_to_drm(adev)->max_vblank_count = 0x00ffffff;
|
||||
|
||||
DRM_DEBUG("amdgpu: irq initialized.\n");
|
||||
return 0;
|
||||
@@ -311,7 +311,7 @@ void amdgpu_irq_fini(struct amdgpu_device *adev)
|
||||
unsigned i, j;
|
||||
|
||||
if (adev->irq.installed) {
|
||||
drm_irq_uninstall(adev->ddev);
|
||||
drm_irq_uninstall(adev_to_drm(adev));
|
||||
adev->irq.installed = false;
|
||||
if (adev->irq.msi_enabled)
|
||||
pci_free_irq_vectors(adev->pdev);
|
||||
@@ -522,7 +522,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
|
||||
int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
||||
unsigned type)
|
||||
{
|
||||
if (!adev->ddev->irq_enabled)
|
||||
if (!adev_to_drm(adev)->irq_enabled)
|
||||
return -ENOENT;
|
||||
|
||||
if (type >= src->num_types)
|
||||
@@ -552,7 +552,7 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
||||
int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
||||
unsigned type)
|
||||
{
|
||||
if (!adev->ddev->irq_enabled)
|
||||
if (!adev_to_drm(adev)->irq_enabled)
|
||||
return -ENOENT;
|
||||
|
||||
if (type >= src->num_types)
|
||||
@@ -583,7 +583,7 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
||||
bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
|
||||
unsigned type)
|
||||
{
|
||||
if (!adev->ddev->irq_enabled)
|
||||
if (!adev_to_drm(adev)->irq_enabled)
|
||||
return false;
|
||||
|
||||
if (type >= src->num_types)
|
||||
|
||||
@@ -555,7 +555,7 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
|
||||
bo = kzalloc(sizeof(struct amdgpu_bo), GFP_KERNEL);
|
||||
if (bo == NULL)
|
||||
return -ENOMEM;
|
||||
drm_gem_private_object_init(adev->ddev, &bo->tbo.base, size);
|
||||
drm_gem_private_object_init(adev_to_drm(adev), &bo->tbo.base, size);
|
||||
INIT_LIST_HEAD(&bo->shadow_list);
|
||||
bo->vm_bo = NULL;
|
||||
bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :
|
||||
|
||||
@@ -226,7 +226,7 @@ static int init_pmu_by_type(struct amdgpu_device *adev,
|
||||
pmu_entry->pmu.attr_groups = attr_groups;
|
||||
pmu_entry->pmu_perf_type = pmu_perf_type;
|
||||
snprintf(pmu_name, PMU_NAME_SIZE, "%s_%d",
|
||||
pmu_file_prefix, adev->ddev->primary->index);
|
||||
pmu_file_prefix, adev_to_drm(adev)->primary->index);
|
||||
|
||||
ret = perf_pmu_register(&pmu_entry->pmu, pmu_name, -1);
|
||||
|
||||
|
||||
@@ -46,7 +46,7 @@ static ssize_t amdgpu_rap_debugfs_write(struct file *f, const char __user *buf,
|
||||
struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
|
||||
struct ta_rap_shared_memory *rap_shared_mem;
|
||||
struct ta_rap_cmd_output_data *rap_cmd_output;
|
||||
struct drm_device *dev = adev->ddev;
|
||||
struct drm_device *dev = adev_to_drm(adev);
|
||||
uint32_t op;
|
||||
int ret;
|
||||
|
||||
@@ -116,7 +116,7 @@ static const struct file_operations amdgpu_rap_debugfs_ops = {
|
||||
void amdgpu_rap_debugfs_init(struct amdgpu_device *adev)
|
||||
{
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
struct drm_minor *minor = adev->ddev->primary;
|
||||
struct drm_minor *minor = adev_to_drm(adev)->primary;
|
||||
|
||||
if (!adev->psp.rap_context.rap_initialized)
|
||||
return;
|
||||
|
||||
@@ -1197,7 +1197,7 @@ static int amdgpu_ras_sysfs_remove_all(struct amdgpu_device *adev)
|
||||
static void amdgpu_ras_debugfs_create_ctrl_node(struct amdgpu_device *adev)
|
||||
{
|
||||
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
|
||||
struct drm_minor *minor = adev->ddev->primary;
|
||||
struct drm_minor *minor = adev_to_drm(adev)->primary;
|
||||
|
||||
con->dir = debugfs_create_dir(RAS_FS_NAME, minor->debugfs_root);
|
||||
debugfs_create_file("ras_ctrl", S_IWUGO | S_IRUGO, con->dir,
|
||||
|
||||
@@ -420,7 +420,7 @@ int amdgpu_debugfs_ring_init(struct amdgpu_device *adev,
|
||||
struct amdgpu_ring *ring)
|
||||
{
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
struct drm_minor *minor = adev->ddev->primary;
|
||||
struct drm_minor *minor = adev_to_drm(adev)->primary;
|
||||
struct dentry *ent, *root = minor->debugfs_root;
|
||||
char name[32];
|
||||
|
||||
|
||||
@@ -1921,8 +1921,8 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
|
||||
/* No others user of address space so set it to 0 */
|
||||
r = ttm_bo_device_init(&adev->mman.bdev,
|
||||
&amdgpu_bo_driver,
|
||||
adev->ddev->anon_inode->i_mapping,
|
||||
adev->ddev->vma_offset_manager,
|
||||
adev_to_drm(adev)->anon_inode->i_mapping,
|
||||
adev_to_drm(adev)->vma_offset_manager,
|
||||
dma_addressing_limited(adev->dev));
|
||||
if (r) {
|
||||
DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
|
||||
@@ -2606,7 +2606,7 @@ int amdgpu_ttm_debugfs_init(struct amdgpu_device *adev)
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
unsigned count;
|
||||
|
||||
struct drm_minor *minor = adev->ddev->primary;
|
||||
struct drm_minor *minor = adev_to_drm(adev)->primary;
|
||||
struct dentry *ent, *root = minor->debugfs_root;
|
||||
|
||||
for (count = 0; count < ARRAY_SIZE(ttm_debugfs_entries); count++) {
|
||||
|
||||
@@ -45,7 +45,7 @@ void amdgpu_virt_init_setting(struct amdgpu_device *adev)
|
||||
if (adev->mode_info.num_crtc == 0)
|
||||
adev->mode_info.num_crtc = 1;
|
||||
adev->enable_virtual_display = true;
|
||||
adev->ddev->driver->driver_features &= ~DRIVER_ATOMIC;
|
||||
adev_to_drm(adev)->driver->driver_features &= ~DRIVER_ATOMIC;
|
||||
adev->cg_flags = 0;
|
||||
adev->pg_flags = 0;
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user