mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'pcmcia-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux
Pull PCMCIA updates from Dominik Brodowski: "A number of minor PCMCIA bugfixes and cleanups, and a patch removing obsolete host controller drivers" * tag 'pcmcia-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brodo/linux: pcmcia: remove obsolete host controller drivers pcmcia: Convert to use less arguments in pci_bus_for_each_resource() PCMCIA: Fix garbled log messages for KERN_CONT
This commit is contained in:
@@ -15,7 +15,6 @@ CONFIG_PCI=y
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CONFIG_PCCARD=m
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CONFIG_YENTA=m
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CONFIG_PD6729=m
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CONFIG_I82092=m
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_MODVERSIONS=y
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@@ -72,8 +72,6 @@ CONFIG_PCI_MSI=y
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CONFIG_PCCARD=y
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CONFIG_YENTA=y
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CONFIG_PD6729=m
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CONFIG_I82092=m
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CONFIG_I82365=m
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CONFIG_ADVANCED_OPTIONS=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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@@ -62,7 +62,7 @@ void arch_remove_reservations(struct resource *avail)
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/*
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* Trim out BIOS area (high 2MB) and E820 regions. We do not remove
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* the low 1MB unconditionally, as this area is needed for some ISA
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* cards requiring a memory range, e.g. the i82365 PCMCIA controller.
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* cards requiring a memory range.
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*/
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if (avail->flags & IORESOURCE_MEM) {
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resource_clip(avail, BIOS_ROM_BASE, BIOS_ROM_END);
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@@ -1296,9 +1296,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt
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/*
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* CardBus controllers have a legacy base address that enables them to
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* respond as i82365 pcmcia controllers. We don't want them to do this
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* even if the Linux CardBus driver is not loaded, because the Linux i82365
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* driver does not (and should not) handle CardBus.
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* respond as i82365 PCMCIA controllers. We don't want them to do this.
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*/
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static void quirk_cardbus_legacy(struct pci_dev *dev)
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{
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@@ -119,36 +119,6 @@ config PD6729
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This provides support for the Cirrus PD6729 PCI-to-PCMCIA bridge
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device, found in some older laptops and PCMCIA card readers.
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config I82092
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tristate "i82092 compatible bridge support"
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depends on PCMCIA && PCI && HAS_IOPORT
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select PCCARD_NONSTATIC
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help
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This provides support for the Intel I82092AA PCI-to-PCMCIA bridge device,
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found in some older laptops and more commonly in evaluation boards for the
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chip.
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config I82365
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tristate "i82365 compatible bridge support"
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depends on PCMCIA && ISA
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select PCCARD_NONSTATIC
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help
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Say Y here to include support for ISA-bus PCMCIA host bridges that
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are register compatible with the Intel i82365. These are found on
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older laptops and ISA-bus card readers for desktop systems. A
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"bridge" is the hardware inside your computer that PCMCIA cards are
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plugged into. If unsure, say N.
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config TCIC
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tristate "Databook TCIC host bridge support"
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depends on PCMCIA && ISA
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select PCCARD_NONSTATIC
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help
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Say Y here to include support for the Databook TCIC family of PCMCIA
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host bridges. These are only found on a handful of old systems.
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"Bridge" is the name used for the hardware inside your computer that
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PCMCIA cards are plugged into. If unsure, say N.
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config PCMCIA_ALCHEMY_DEVBOARD
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tristate "Alchemy Db/Pb1xxx PCMCIA socket services"
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depends on MIPS_DB1XXX && PCMCIA
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@@ -20,9 +20,6 @@ obj-$(CONFIG_PCCARD) += pcmcia_rsrc.o
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obj-$(CONFIG_YENTA) += yenta_socket.o
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obj-$(CONFIG_PD6729) += pd6729.o
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obj-$(CONFIG_I82365) += i82365.o
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obj-$(CONFIG_I82092) += i82092.o
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obj-$(CONFIG_TCIC) += tcic.o
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obj-$(CONFIG_PCMCIA_SOC_COMMON) += soc_common.o
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obj-$(CONFIG_PCMCIA_SA11XX_BASE) += sa11xx_base.o
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obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
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File diff suppressed because it is too large
Load Diff
@@ -1,24 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _INCLUDE_GUARD_i82092aa_H_
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#define _INCLUDE_GUARD_i82092aa_H_
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#include <linux/interrupt.h>
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/* prototypes */
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static int i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id);
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static void i82092aa_pci_remove(struct pci_dev *dev);
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static int card_present(int socketno);
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static irqreturn_t i82092aa_interrupt(int irq, void *dev);
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static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value);
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static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state);
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static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io);
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static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem);
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static int i82092aa_init(struct pcmcia_socket *socket);
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -187,7 +187,7 @@ static void do_io_probe(struct pcmcia_socket *s, unsigned int base,
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int any;
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u_char *b, hole, most;
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dev_info(&s->dev, "cs: IO port probe %#x-%#x:", base, base+num-1);
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pr_info("%s: cs: IO port probe %#x-%#x:", dev_name(&s->dev), base, base+num-1);
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/* First, what does a floating port look like? */
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b = kzalloc(256, GFP_KERNEL);
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@@ -409,8 +409,8 @@ static int do_mem_probe(struct pcmcia_socket *s, u_long base, u_long num,
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struct socket_data *s_data = s->resource_data;
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u_long i, j, bad, fail, step;
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dev_info(&s->dev, "cs: memory probe 0x%06lx-0x%06lx:",
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base, base+num-1);
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pr_info("%s: cs: memory probe 0x%06lx-0x%06lx:",
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dev_name(&s->dev), base, base+num-1);
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bad = fail = 0;
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step = (num < 0x20000) ? 0x2000 : ((num>>4) & ~0x1fff);
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/* don't allow too large steps */
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@@ -936,7 +936,7 @@ static int adjust_io(struct pcmcia_socket *s, unsigned int action, unsigned long
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static int nonstatic_autoadd_resources(struct pcmcia_socket *s)
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{
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struct resource *res;
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int i, done = 0;
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int done = 0;
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if (!s->cb_dev || !s->cb_dev->bus)
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return -ENODEV;
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@@ -963,10 +963,10 @@ static int nonstatic_autoadd_resources(struct pcmcia_socket *s)
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if (s->cb_dev->bus->number == 0)
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return -EINVAL;
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for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
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for (unsigned int i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
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res = s->cb_dev->bus->resource[i];
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#else
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pci_bus_for_each_resource(s->cb_dev->bus, res, i) {
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pci_bus_for_each_resource(s->cb_dev->bus, res) {
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#endif
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if (!res)
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continue;
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File diff suppressed because it is too large
Load Diff
@@ -1,266 +0,0 @@
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/*
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* tcic.h 1.13 1999/10/25 20:03:34
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*
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* The contents of this file are subject to the Mozilla Public License
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* Version 1.1 (the "License"); you may not use this file except in
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* compliance with the License. You may obtain a copy of the License
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* at http://www.mozilla.org/MPL/
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*
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* Software distributed under the License is distributed on an "AS IS"
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* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
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* the License for the specific language governing rights and
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* limitations under the License.
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*
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* The initial developer of the original code is David A. Hinds
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* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
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* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
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*
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* Alternatively, the contents of this file may be used under the
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* terms of the GNU General Public License version 2 (the "GPL"), in which
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* case the provisions of the GPL are applicable instead of the
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* above. If you wish to allow the use of your version of this file
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* only under the terms of the GPL and not to allow others to use
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* your version of this file under the MPL, indicate your decision by
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* deleting the provisions above and replace them with the notice and
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||||
* other provisions required by the GPL. If you do not delete the
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* provisions above, a recipient may use your version of this file
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* under either the MPL or the GPL.
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*/
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#ifndef _LINUX_TCIC_H
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#define _LINUX_TCIC_H
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#define TCIC_BASE 0x240
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/* offsets of registers from TCIC_BASE */
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#define TCIC_DATA 0x00
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#define TCIC_ADDR 0x02
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#define TCIC_SCTRL 0x06
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#define TCIC_SSTAT 0x07
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#define TCIC_MODE 0x08
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#define TCIC_PWR 0x09
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#define TCIC_EDC 0x0A
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#define TCIC_ICSR 0x0C
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#define TCIC_IENA 0x0D
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#define TCIC_AUX 0x0E
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#define TCIC_SS_SHFT 12
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#define TCIC_SS_MASK 0x7000
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/* Flags for TCIC_ADDR */
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#define TCIC_ADR2_REG 0x8000
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#define TCIC_ADR2_INDREG 0x0800
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#define TCIC_ADDR_REG 0x80000000
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#define TCIC_ADDR_SS_SHFT (TCIC_SS_SHFT+16)
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#define TCIC_ADDR_SS_MASK (TCIC_SS_MASK<<16)
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#define TCIC_ADDR_INDREG 0x08000000
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#define TCIC_ADDR_IO 0x04000000
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#define TCIC_ADDR_MASK 0x03ffffff
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/* Flags for TCIC_SCTRL */
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#define TCIC_SCTRL_ENA 0x01
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#define TCIC_SCTRL_INCMODE 0x18
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#define TCIC_SCTRL_INCMODE_HOLD 0x00
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#define TCIC_SCTRL_INCMODE_WORD 0x08
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#define TCIC_SCTRL_INCMODE_REG 0x10
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#define TCIC_SCTRL_INCMODE_AUTO 0x18
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#define TCIC_SCTRL_EDCSUM 0x20
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#define TCIC_SCTRL_RESET 0x80
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/* Flags for TCIC_SSTAT */
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#define TCIC_SSTAT_6US 0x01
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#define TCIC_SSTAT_10US 0x02
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#define TCIC_SSTAT_PROGTIME 0x04
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#define TCIC_SSTAT_LBAT1 0x08
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#define TCIC_SSTAT_LBAT2 0x10
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#define TCIC_SSTAT_RDY 0x20 /* Inverted */
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#define TCIC_SSTAT_WP 0x40
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#define TCIC_SSTAT_CD 0x80 /* Card detect */
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/* Flags for TCIC_MODE */
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#define TCIC_MODE_PGMMASK 0x1f
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#define TCIC_MODE_NORMAL 0x00
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#define TCIC_MODE_PGMWR 0x01
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#define TCIC_MODE_PGMRD 0x02
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#define TCIC_MODE_PGMCE 0x04
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#define TCIC_MODE_PGMDBW 0x08
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#define TCIC_MODE_PGMWORD 0x10
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#define TCIC_MODE_AUXSEL_MASK 0xe0
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/* Registers accessed through TCIC_AUX, by setting TCIC_MODE */
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#define TCIC_AUX_TCTL (0<<5)
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#define TCIC_AUX_PCTL (1<<5)
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#define TCIC_AUX_WCTL (2<<5)
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#define TCIC_AUX_EXTERN (3<<5)
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#define TCIC_AUX_PDATA (4<<5)
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#define TCIC_AUX_SYSCFG (5<<5)
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#define TCIC_AUX_ILOCK (6<<5)
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#define TCIC_AUX_TEST (7<<5)
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/* Flags for TCIC_PWR */
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#define TCIC_PWR_VCC(sock) (0x01<<(sock))
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#define TCIC_PWR_VCC_MASK 0x03
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#define TCIC_PWR_VPP(sock) (0x08<<(sock))
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#define TCIC_PWR_VPP_MASK 0x18
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#define TCIC_PWR_CLIMENA 0x40
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#define TCIC_PWR_CLIMSTAT 0x80
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/* Flags for TCIC_ICSR */
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#define TCIC_ICSR_CLEAR 0x01
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#define TCIC_ICSR_SET 0x02
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#define TCIC_ICSR_JAM (TCIC_ICSR_CLEAR|TCIC_ICSR_SET)
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#define TCIC_ICSR_STOPCPU 0x04
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#define TCIC_ICSR_ILOCK 0x08
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#define TCIC_ICSR_PROGTIME 0x10
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#define TCIC_ICSR_ERR 0x20
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#define TCIC_ICSR_CDCHG 0x40
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#define TCIC_ICSR_IOCHK 0x80
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/* Flags for TCIC_IENA */
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#define TCIC_IENA_CFG_MASK 0x03
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#define TCIC_IENA_CFG_OFF 0x00 /* disabled */
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#define TCIC_IENA_CFG_OD 0x01 /* active low, open drain */
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#define TCIC_IENA_CFG_LOW 0x02 /* active low, totem pole */
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#define TCIC_IENA_CFG_HIGH 0x03 /* active high, totem pole */
|
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#define TCIC_IENA_ILOCK 0x08
|
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#define TCIC_IENA_PROGTIME 0x10
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#define TCIC_IENA_ERR 0x20 /* overcurrent or iochk */
|
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#define TCIC_IENA_CDCHG 0x40
|
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|
||||
/* Flags for TCIC_AUX_WCTL */
|
||||
#define TCIC_WAIT_COUNT_MASK 0x001f
|
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#define TCIC_WAIT_ASYNC 0x0020
|
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#define TCIC_WAIT_SENSE 0x0040
|
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#define TCIC_WAIT_SRC 0x0080
|
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#define TCIC_WCTL_WR 0x0100
|
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#define TCIC_WCTL_RD 0x0200
|
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#define TCIC_WCTL_CE 0x0400
|
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#define TCIC_WCTL_LLBAT1 0x0800
|
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#define TCIC_WCTL_LLBAT2 0x1000
|
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#define TCIC_WCTL_LRDY 0x2000
|
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#define TCIC_WCTL_LWP 0x4000
|
||||
#define TCIC_WCTL_LCD 0x8000
|
||||
|
||||
/* Flags for TCIC_AUX_SYSCFG */
|
||||
#define TCIC_SYSCFG_IRQ_MASK 0x000f
|
||||
#define TCIC_SYSCFG_MCSFULL 0x0010
|
||||
#define TCIC_SYSCFG_IO1723 0x0020
|
||||
#define TCIC_SYSCFG_MCSXB 0x0040
|
||||
#define TCIC_SYSCFG_ICSXB 0x0080
|
||||
#define TCIC_SYSCFG_NOPDN 0x0100
|
||||
#define TCIC_SYSCFG_MPSEL_SHFT 9
|
||||
#define TCIC_SYSCFG_MPSEL_MASK 0x0e00
|
||||
#define TCIC_SYSCFG_MPSENSE 0x2000
|
||||
#define TCIC_SYSCFG_AUTOBUSY 0x4000
|
||||
#define TCIC_SYSCFG_ACC 0x8000
|
||||
|
||||
#define TCIC_ILOCK_OUT 0x01
|
||||
#define TCIC_ILOCK_SENSE 0x02
|
||||
#define TCIC_ILOCK_CRESET 0x04
|
||||
#define TCIC_ILOCK_CRESENA 0x08
|
||||
#define TCIC_ILOCK_CWAIT 0x10
|
||||
#define TCIC_ILOCK_CWAITSNS 0x20
|
||||
#define TCIC_ILOCK_HOLD_MASK 0xc0
|
||||
#define TCIC_ILOCK_HOLD_CCLK 0xc0
|
||||
|
||||
#define TCIC_ILOCKTEST_ID_SH 8
|
||||
#define TCIC_ILOCKTEST_ID_MASK 0x7f00
|
||||
#define TCIC_ILOCKTEST_MCIC_1 0x8000
|
||||
|
||||
#define TCIC_ID_DB86082 0x02
|
||||
#define TCIC_ID_DB86082A 0x03
|
||||
#define TCIC_ID_DB86084 0x04
|
||||
#define TCIC_ID_DB86084A 0x08
|
||||
#define TCIC_ID_DB86072 0x15
|
||||
#define TCIC_ID_DB86184 0x14
|
||||
#define TCIC_ID_DB86082B 0x17
|
||||
|
||||
#define TCIC_TEST_DIAG 0x8000
|
||||
|
||||
/*
|
||||
* Indirectly addressed registers
|
||||
*/
|
||||
|
||||
#define TCIC_SCF1(sock) ((sock)<<3)
|
||||
#define TCIC_SCF2(sock) (((sock)<<3)+2)
|
||||
|
||||
/* Flags for SCF1 */
|
||||
#define TCIC_SCF1_IRQ_MASK 0x000f
|
||||
#define TCIC_SCF1_IRQ_OFF 0x0000
|
||||
#define TCIC_SCF1_IRQOC 0x0010
|
||||
#define TCIC_SCF1_PCVT 0x0020
|
||||
#define TCIC_SCF1_IRDY 0x0040
|
||||
#define TCIC_SCF1_ATA 0x0080
|
||||
#define TCIC_SCF1_DMA_SHIFT 8
|
||||
#define TCIC_SCF1_DMA_MASK 0x0700
|
||||
#define TCIC_SCF1_DMA_OFF 0
|
||||
#define TCIC_SCF1_DREQ2 2
|
||||
#define TCIC_SCF1_IOSTS 0x0800
|
||||
#define TCIC_SCF1_SPKR 0x1000
|
||||
#define TCIC_SCF1_FINPACK 0x2000
|
||||
#define TCIC_SCF1_DELWR 0x4000
|
||||
#define TCIC_SCF1_HD7IDE 0x8000
|
||||
|
||||
/* Flags for SCF2 */
|
||||
#define TCIC_SCF2_RI 0x0001
|
||||
#define TCIC_SCF2_IDBR 0x0002
|
||||
#define TCIC_SCF2_MDBR 0x0004
|
||||
#define TCIC_SCF2_MLBAT1 0x0008
|
||||
#define TCIC_SCF2_MLBAT2 0x0010
|
||||
#define TCIC_SCF2_MRDY 0x0020
|
||||
#define TCIC_SCF2_MWP 0x0040
|
||||
#define TCIC_SCF2_MCD 0x0080
|
||||
#define TCIC_SCF2_MALL 0x00f8
|
||||
|
||||
/* Indirect addresses for memory window registers */
|
||||
#define TCIC_MWIN(sock,map) (0x100+(((map)+((sock)<<2))<<3))
|
||||
#define TCIC_MBASE_X 2
|
||||
#define TCIC_MMAP_X 4
|
||||
#define TCIC_MCTL_X 6
|
||||
|
||||
#define TCIC_MBASE_4K_BIT 0x4000
|
||||
#define TCIC_MBASE_HA_SHFT 12
|
||||
#define TCIC_MBASE_HA_MASK 0x0fff
|
||||
|
||||
#define TCIC_MMAP_REG 0x8000
|
||||
#define TCIC_MMAP_CA_SHFT 12
|
||||
#define TCIC_MMAP_CA_MASK 0x3fff
|
||||
|
||||
#define TCIC_MCTL_WSCNT_MASK 0x001f
|
||||
#define TCIC_MCTL_WCLK 0x0020
|
||||
#define TCIC_MCTL_WCLK_CCLK 0x0000
|
||||
#define TCIC_MCTL_WCLK_BCLK 0x0020
|
||||
#define TCIC_MCTL_QUIET 0x0040
|
||||
#define TCIC_MCTL_WP 0x0080
|
||||
#define TCIC_MCTL_ACC 0x0100
|
||||
#define TCIC_MCTL_KE 0x0200
|
||||
#define TCIC_MCTL_EDC 0x0400
|
||||
#define TCIC_MCTL_B8 0x0800
|
||||
#define TCIC_MCTL_SS_SHFT TCIC_SS_SHFT
|
||||
#define TCIC_MCTL_SS_MASK TCIC_SS_MASK
|
||||
#define TCIC_MCTL_ENA 0x8000
|
||||
|
||||
/* Indirect addresses for I/O window registers */
|
||||
#define TCIC_IWIN(sock,map) (0x200+(((map)+((sock)<<1))<<2))
|
||||
#define TCIC_IBASE_X 0
|
||||
#define TCIC_ICTL_X 2
|
||||
|
||||
#define TCIC_ICTL_WSCNT_MASK TCIC_MCTL_WSCNT_MASK
|
||||
#define TCIC_ICTL_QUIET TCIC_MCTL_QUIET
|
||||
#define TCIC_ICTL_1K 0x0080
|
||||
#define TCIC_ICTL_PASS16 0x0100
|
||||
#define TCIC_ICTL_ACC TCIC_MCTL_ACC
|
||||
#define TCIC_ICTL_TINY 0x0200
|
||||
#define TCIC_ICTL_B16 0x0400
|
||||
#define TCIC_ICTL_B8 TCIC_MCTL_B8
|
||||
#define TCIC_ICTL_BW_MASK (TCIC_ICTL_B16|TCIC_ICTL_B8)
|
||||
#define TCIC_ICTL_BW_DYN 0
|
||||
#define TCIC_ICTL_BW_8 TCIC_ICTL_B8
|
||||
#define TCIC_ICTL_BW_16 TCIC_ICTL_B16
|
||||
#define TCIC_ICTL_BW_ATA (TCIC_ICTL_B16|TCIC_ICTL_B8)
|
||||
#define TCIC_ICTL_SS_SHFT TCIC_SS_SHFT
|
||||
#define TCIC_ICTL_SS_MASK TCIC_SS_MASK
|
||||
#define TCIC_ICTL_ENA TCIC_MCTL_ENA
|
||||
|
||||
#endif /* _LINUX_TCIC_H */
|
||||
@@ -674,9 +674,8 @@ static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
|
||||
u32 min)
|
||||
{
|
||||
struct resource *root;
|
||||
int i;
|
||||
|
||||
pci_bus_for_each_resource(socket->dev->bus, root, i) {
|
||||
pci_bus_for_each_resource(socket->dev->bus, root) {
|
||||
if (!root)
|
||||
continue;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user