ASoC: Updates for v5.20

This is a big release thus far and there will probably be more changes
to come, it's a combination of a larger than usual crop of new drivers
and some subsysetm wide cleanups from Charles rather than anything
structural.  The SOF and Intel DSP code both also continue to be very
actively developed.

 - Restructing of the set_fmt() callbacks to be specified in terms of
   the device rather than with semantics depending on if the device is
   supposed to be a CODEC or SoC, making things clearer in situations
   like CODEC to CODEC links.
 - Clean up of the way we flag which DAI naming scheme we use to reflect
   the progress that's been made modernising things.
 - Merge of more of the Intel AVS driver stack, including some board
   integrations.
 - New version 4 mechanism for communication with SOF DSPs.
 - Suppoort for dynamically selecting the PLL to use at runtime on i.MX
   platforms.
 - Improvements for CODEC to CODEC support in the generic cards.
 - Support for AMD Jadeite and various machines, Intel MetorLake DSPs,
   Mediatek MT8186 DSPs and MT6366, nVidia Tegra MDDRC, OPE and PEQ, NXP
   TFA9890, Qualcomm SDM845, WCD9335 and WAS883x, and Texas Instruments
   TAS2780.
This commit is contained in:
Takashi Iwai
2022-07-15 16:11:58 +02:00
688 changed files with 28060 additions and 3388 deletions
@@ -0,0 +1,91 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek mt8186 DSP core
maintainers:
- Tinghan Shen <tinghan.shen@mediatek.com>
description: |
MediaTek mt8186 SoC contains a DSP core used for
advanced pre- and post- audio processing.
properties:
compatible:
const: mediatek,mt8186-dsp
reg:
items:
- description: Address and size of the DSP config registers
- description: Address and size of the DSP SRAM
- description: Address and size of the DSP secure registers
- description: Address and size of the DSP bus registers
reg-names:
items:
- const: cfg
- const: sram
- const: sec
- const: bus
clocks:
items:
- description: mux for audio dsp clock
- description: mux for audio dsp local bus
clock-names:
items:
- const: audiodsp
- const: adsp_bus
power-domains:
maxItems: 1
mboxes:
items:
- description: mailbox for receiving audio DSP requests.
- description: mailbox for transmitting requests to audio DSP.
mbox-names:
items:
- const: rx
- const: tx
memory-region:
items:
- description: dma buffer between host and DSP.
- description: DSP system memory.
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- power-domains
- mbox-names
- mboxes
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/mt8186-clk.h>
dsp@10680000 {
compatible = "mediatek,mt8186-dsp";
reg = <0x10680000 0x2000>,
<0x10800000 0x100000>,
<0x1068b000 0x100>,
<0x1068f000 0x1000>;
reg-names = "cfg", "sram", "sec", "bus";
clocks = <&topckgen CLK_TOP_AUDIODSP>,
<&topckgen CLK_TOP_ADSP_BUS>;
clock-names = "audiodsp",
"adsp_bus";
power-domains = <&spm 6>;
mbox-names = "rx", "tx";
mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
};
@@ -50,13 +50,13 @@ properties:
mboxes:
items:
- description: ipc reply between host and audio DSP.
- description: ipc request between host and audio DSP.
- description: mailbox for receiving audio DSP requests.
- description: mailbox for transmitting requests to audio DSP.
mbox-names:
items:
- const: mbox0
- const: mbox1
- const: rx
- const: tx
memory-region:
items:
@@ -100,6 +100,6 @@ examples:
memory-region = <&adsp_dma_mem_reserved>,
<&adsp_mem_reserved>;
power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
mbox-names = "mbox0", "mbox1";
mbox-names = "rx", "tx";
mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
};
@@ -24,6 +24,21 @@ properties:
maxItems: 1
description: I2C address of the device.
avdd-supply:
description: A 1.8V supply that powers up the AVDD pin.
dvdd-supply:
description: A 1.2V supply that powers up the DVDD pin.
dvddio-supply:
description: A 1.2V or 1.8V supply that powers up the VDDIO pin.
pvdd-supply:
description: A 3.0V to 20V supply that powers up the PVDD pin.
vbat-supply:
description: A 3.3V to 5.5V supply that powers up the VBAT pin.
adi,vmon-slot-no:
description: slot number of the voltage sense monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
@@ -36,13 +51,22 @@ properties:
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 0
default: 1
adi,spkfb-slot-no:
description: slot number of speaker DSP monitor
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 2
adi,bypass-slot-no:
description:
Selects the PCM data input channel that is routed to the speaker
audio processing bypass path.
$ref: "/schemas/types.yaml#/definitions/uint32"
minimum: 0
maximum: 15
default: 0
adi,interleave-mode:
@@ -72,6 +96,10 @@ examples:
max98396: amplifier@39 {
compatible = "adi,max98396";
reg = <0x39>;
dvdd-supply = <&regulator_1v2>;
dvddio-supply = <&regulator_1v8>;
avdd-supply = <&regulator_1v8>;
pvdd-supply = <&regulator_pvdd>;
adi,vmon-slot-no = <0>;
adi,imon-slot-no = <1>;
reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
@@ -21,6 +21,11 @@ properties:
description:
Regulator for the headphone amplifier
allwinner,internal-bias-resistor:
description:
Enable the internal 2.2K bias resistor between HBIAS and MICDET pins
type: boolean
required:
- compatible
- reg
@@ -16,7 +16,7 @@ Board connectors:
* Line In Jack
wm8731 pins:
cf Documentation/devicetree/bindings/sound/wm8731.txt
cf Documentation/devicetree/bindings/sound/wlf,wm8731.yaml
Example:
sound {
@@ -1,35 +0,0 @@
DesignWare I2S controller
Required properties:
- compatible : Must be "snps,designware-i2s"
- reg : Must contain the I2S core's registers location and length
- clocks : Pairs of phandle and specifier referencing the controller's
clocks. The controller expects one clock: the clock used as the sampling
rate reference clock sample.
- clock-names : "i2sclk" for the sample rate reference clock.
- dmas: Pairs of phandle and specifier for the DMA channels that are used by
the core. The core expects one or two dma channels: one for transmit and
one for receive.
- dma-names : "tx" for the transmit channel, "rx" for the receive channel.
Optional properties:
- interrupts: The interrupt line number for the I2S controller. Add this
parameter if the I2S controller that you are using does not support DMA.
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
properties please check:
* resource-names.txt
* clock/clock-bindings.txt
* dma/dma.txt
Example:
soc_i2s: i2s@7ff90000 {
compatible = "snps,designware-i2s";
reg = <0x0 0x7ff90000 0x0 0x1000>;
clocks = <&scpi_i2sclk 0>;
clock-names = "i2sclk";
#sound-dai-cells = <0>;
dmas = <&dma0 5>;
dma-names = "tx";
};
@@ -1,33 +0,0 @@
NXP MICFIL Digital Audio Interface (MICFIL).
The MICFIL digital interface provides a 16-bit audio signal from a PDM
microphone bitstream in a configurable output sampling rate.
Required properties:
- compatible : Compatible list, contains "fsl,imx8mm-micfil"
or "fsl,imx8mp-micfil"
- reg : Offset and length of the register set for the device.
- interrupts : Contains the micfil interrupts.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Must include the "ipg_clk" for register access and
"ipg_clk_app" for internal micfil clock.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
Example:
micfil: micfil@30080000 {
compatible = "fsl,imx8mm-micfil";
reg = <0x0 0x30080000 0x0 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_PDM_IPG>,
<&clk IMX8MM_CLK_PDM_ROOT>;
clock-names = "ipg_clk", "ipg_clk_app";
dmas = <&sdma2 24 26 0x80000000>;
};
@@ -0,0 +1,85 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP MICFIL Digital Audio Interface (MICFIL)
maintainers:
- Shengjiu Wang <shengjiu.wang@nxp.com>
description: |
The MICFIL digital interface provides a 16-bit or 24-bit audio signal
from a PDM microphone bitstream in a configurable output sampling rate.
properties:
compatible:
enum:
- fsl,imx8mm-micfil
- fsl,imx8mp-micfil
reg:
maxItems: 1
interrupts:
items:
- description: Digital Microphone interface interrupt
- description: Digital Microphone interface error interrupt
- description: voice activity detector event interrupt
- description: voice activity detector error interrupt
dmas:
items:
- description: DMA controller phandle and request line for RX
dma-names:
items:
- const: rx
clocks:
items:
- description: The ipg clock for register access
- description: internal micfil clock
- description: PLL clock source for 8kHz series
- description: PLL clock source for 11kHz series
- description: External clock 3
minItems: 2
clock-names:
items:
- const: ipg_clk
- const: ipg_clk_app
- const: pll8k
- const: pll11k
- const: clkext3
minItems: 2
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx8mm-clock.h>
micfil: audio-controller@30080000 {
compatible = "fsl,imx8mm-micfil";
reg = <0x30080000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_PDM_IPG>,
<&clk IMX8MM_CLK_PDM_ROOT>;
clock-names = "ipg_clk", "ipg_clk_app";
dmas = <&sdma2 24 25 0>;
dma-names = "rx";
};
@@ -2,7 +2,7 @@ fsl,mqs audio CODEC
Required properties:
- compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs"
"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs".
"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs", "fsl,imx93-mqs".
- clocks : A list of phandles + clock-specifiers, one for each entry in
clock-names
- clock-names : "mclk" - must required.
@@ -58,6 +58,8 @@ properties:
slave of the Shared Peripheral Bus and when two or more bus masters
(CPU, DMA or DSP) try to access it. This property is optional depending
on the SoC design.
- description: PLL clock source for 8kHz series rate, optional.
- description: PLL clock source for 11khz series rate, optional.
minItems: 9
clock-names:
@@ -72,6 +74,8 @@ properties:
- const: rxtx6
- const: rxtx7
- const: spba
- const: pll8k
- const: pll11k
minItems: 9
big-endian:
@@ -21,6 +21,9 @@ Required properties:
- clock-names : Must include the "bus" for register access and
"mclk1", "mclk2", "mclk3" for bit clock and frame
clock providing.
"pll8k", "pll11k" are optional, they are the clock
source for root clock, one is for 8kHz series rates
another one is for 11kHz series rates.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
@@ -49,6 +52,14 @@ Required properties:
receive data by following their own bit clocks and
frame sync clocks separately.
- fsl,dataline : configure the dataline. it has 3 value for each configuration
first one means the type: I2S(1) or PDM(2)
second one is dataline mask for 'rx'
third one is dataline mask for 'tx'.
for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;
it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type
rx mask is 0xff, tx mask is 0x11 (dataline 1 and 4 enabled).
Optional properties:
- big-endian : Boolean property, required if all the SAI
@@ -34,7 +34,7 @@ Optional properties:
- nuvoton,jack-eject-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms
- nuvoton,dmic-clk-threshold: the ADC threshold of DMIC clock.
- nuvoton,key_enable: Headset button detection switch.
Example:
@@ -110,6 +110,10 @@ patternProperties:
type: object
$ref: nvidia,tegra186-asrc.yaml#
'^processing-engine@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-ope.yaml#
required:
- compatible
- reg
@@ -0,0 +1,47 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-mbdrc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 MBDRC
description:
The Multi Band Dynamic Range Compressor (MBDRC) is part of Output
Processing Engine (OPE) which interfaces with Audio Hub (AHUB) via
Audio Client Interface (ACIF). MBDRC can be used as a traditional
single full band or a dual band or a multi band dynamic processor.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra210-mbdrc
- items:
- enum:
- nvidia,tegra234-mbdrc
- nvidia,tegra194-mbdrc
- nvidia,tegra186-mbdrc
- const: nvidia,tegra210-mbdrc
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
dynamic-range-compressor@702d8200 {
compatible = "nvidia,tegra210-mbdrc";
reg = <0x702d8200 0x200>;
};
...
@@ -0,0 +1,87 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ope.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 OPE
description:
The Output Processing Engine (OPE) is one of the AHUB client. It has
PEQ (Parametric Equalizer) and MBDRC (Multi Band Dynamic Range Compressor)
sub blocks for data processing.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
allOf:
- $ref: name-prefix.yaml#
properties:
compatible:
oneOf:
- const: nvidia,tegra210-ope
- items:
- enum:
- nvidia,tegra234-ope
- nvidia,tegra194-ope
- nvidia,tegra186-ope
- const: nvidia,tegra210-ope
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
ranges: true
sound-name-prefix:
pattern: "^OPE[1-9]$"
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
description:
OPE ACIF (Audio Client Interface) input port. This is connected
to corresponding ACIF output port on AHUB (Audio Hub).
port@1:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
description:
OPE ACIF output port. This is connected to corresponding ACIF
input port on AHUB.
patternProperties:
'^equalizer@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-peq.yaml#
'^dynamic-range-compressor@[0-9a-f]+$':
type: object
$ref: nvidia,tegra210-mbdrc.yaml#
required:
- compatible
- reg
additionalProperties: false
examples:
- |
processing-engine@702d8000 {
compatible = "nvidia,tegra210-ope";
reg = <0x702d8000 0x100>;
sound-name-prefix = "OPE1";
};
...
@@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra210-peq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra210 PEQ
description:
The Parametric Equalizer (PEQ) is a cascade of biquad filters with
each filter tuned based on certain parameters. It can be used to
equalize the irregularities in the speaker frequency response.
PEQ sits inside Output Processing Engine (OPE) which interfaces
with Audio Hub (AHUB) via Audio Client Interface (ACIF).
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Mohan Kumar <mkumard@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
properties:
compatible:
oneOf:
- const: nvidia,tegra210-peq
- items:
- enum:
- nvidia,tegra234-peq
- nvidia,tegra194-peq
- nvidia,tegra186-peq
- const: nvidia,tegra210-peq
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
equalizer@702d8100 {
compatible = "nvidia,tegra210-peq";
reg = <0x702d8100 0x100>;
};
...
@@ -15,6 +15,7 @@ allOf:
properties:
compatible:
enum:
- nxp,tfa9890
- nxp,tfa9895
- nxp,tfa9897
@@ -25,12 +25,12 @@ properties:
- qcom,sc7280-lpass-cpu
reg:
minItems: 2
minItems: 1
maxItems: 6
description: LPAIF core registers
reg-names:
minItems: 2
minItems: 1
maxItems: 6
clocks:
@@ -42,12 +42,12 @@ properties:
maxItems: 10
interrupts:
minItems: 2
minItems: 1
maxItems: 4
description: LPAIF DMA buffer interrupt
interrupt-names:
minItems: 2
minItems: 1
maxItems: 4
qcom,adsp:
@@ -1,91 +0,0 @@
* Qualcomm Technologies Inc. SDM845 ASoC sound card driver
This binding describes the SDM845 sound card, which uses qdsp for audio.
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be one of this
"qcom,sdm845-sndcard"
"qcom,db845c-sndcard"
"lenovo,yoga-c630-sndcard"
- audio-routing:
Usage: Optional
Value type: <stringlist>
Definition: A list of the connections between audio components.
Each entry is a pair of strings, the first being the
connection's sink, the second being the connection's
source. Valid names could be power supplies, MicBias
of codec and the jacks on the board.
- model:
Usage: required
Value type: <stringlist>
Definition: The user-visible name of this sound card.
- aux-devs
Usage: optional
Value type: <array of phandles>
Definition: A list of phandles for auxiliary devices (e.g. analog
amplifiers) that do not appear directly within the DAI
links. Should be connected to another audio component
using "audio-routing".
= dailinks
Each subnode of sndcard represents either a dailink, and subnodes of each
dailinks would be cpu/codec/platform dais.
- link-name:
Usage: required
Value type: <string>
Definition: User friendly name for dai link
= CPU, PLATFORM, CODEC dais subnodes
- cpu:
Usage: required
Value type: <subnode>
Definition: cpu dai sub-node
- codec:
Usage: required
Value type: <subnode>
Definition: codec dai sub-node
- platform:
Usage: Optional
Value type: <subnode>
Definition: platform dai sub-node
- sound-dai:
Usage: required
Value type: <phandle>
Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node.
Example:
audio {
compatible = "qcom,sdm845-sndcard";
model = "sdm845-snd-card";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pri_mi2s_active &pri_mi2s_ws_active>;
pinctrl-1 = <&pri_mi2s_sleep &pri_mi2s_ws_sleep>;
mm1-dai-link {
link-name = "MultiMedia1";
cpu {
sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
};
};
pri-mi2s-dai-link {
link-name = "PRI MI2S Playback";
cpu {
sound-dai = <&q6afedai PRIMARY_MI2S_RX>;
};
platform {
sound-dai = <&q6routing>;
};
};
};
@@ -16,8 +16,11 @@ description:
properties:
compatible:
enum:
- lenovo,yoga-c630-sndcard
- qcom,apq8016-sbc-sndcard
- qcom,db845c-sndcard
- qcom,msm8916-qdsp6-sndcard
- qcom,sdm845-sndcard
- qcom,sm8250-sndcard
- qcom,qrb5165-rb5-sndcard

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