mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'char-misc-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc / IIO driver updates from Greg KH:
"Here is the big set of char, misc, iio, and other smaller driver
subsystems for 6.15-rc1. Lots of stuff in here, including:
- loads of IIO changes and driver updates
- counter driver updates
- w1 driver updates
- faux conversions for some drivers that were abusing the platform
bus interface
- coresight driver updates
- rust miscdevice binding updates based on real-world-use
- other minor driver updates
All of these have been in linux-next with no reported issues for quite
a while"
* tag 'char-misc-6.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits)
samples: rust_misc_device: fix markup in top-level docs
Coresight: Fix a NULL vs IS_ERR() bug in probe
misc: lis3lv02d: convert to use faux_device
tlclk: convert to use faux_device
regulator: dummy: convert to use the faux device interface
bus: mhi: host: Fix race between unprepare and queue_buf
coresight: configfs: Constify struct config_item_type
doc: iio: ad7380: describe offload support
iio: ad7380: add support for SPI offload
iio: light: Add check for array bounds in veml6075_read_int_time_ms
iio: adc: ti-ads7924 Drop unnecessary function parameters
staging: iio: ad9834: Use devm_regulator_get_enable()
staging: iio: ad9832: Use devm_regulator_get_enable()
iio: gyro: bmg160_spi: add of_match_table
dt-bindings: iio: adc: Add i.MX94 and i.MX95 support
iio: adc: ad7768-1: remove unnecessary locking
Documentation: ABI: add wideband filter type to sysfs-bus-iio
iio: adc: ad7768-1: set MOSI idle state to prevent accidental reset
iio: adc: ad7768-1: Fix conversion result sign
iio: adc: ad7124: Benefit of dev = indio_dev->dev.parent in ad7124_parse_channel_config()
...
This commit is contained in:
Linus Torvalds
@@ -257,3 +257,18 @@ Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_t
|
||||
Description:
|
||||
(RW) Set/Get the MSR(mux select register) for the CMB subunit
|
||||
TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
|
||||
Date: Feb 2025
|
||||
KernelVersion 6.15
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Description:
|
||||
(RW) Set/Get which lane participates in the output pattern
|
||||
match cross trigger mechanism for the MCMB subunit TPDM.
|
||||
|
||||
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
|
||||
Date: Feb 2025
|
||||
KernelVersion 6.15
|
||||
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||
Description:
|
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(RW) Set/Get the enablement of the individual lane.
|
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|
||||
@@ -34,6 +34,14 @@ Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Count data of Count Y represented as a string.
|
||||
|
||||
What: /sys/bus/counter/devices/counterX/countY/compare
|
||||
KernelVersion: 6.15
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
If the counter device supports compare registers -- registers
|
||||
used to compare counter channels against a particular count --
|
||||
the compare count for channel Y is provided by this attribute.
|
||||
|
||||
What: /sys/bus/counter/devices/counterX/countY/capture
|
||||
KernelVersion: 6.1
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
@@ -301,6 +309,7 @@ Description:
|
||||
|
||||
What: /sys/bus/counter/devices/counterX/cascade_counts_enable_component_id
|
||||
What: /sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id
|
||||
What: /sys/bus/counter/devices/counterX/countY/compare_component_id
|
||||
What: /sys/bus/counter/devices/counterX/countY/capture_component_id
|
||||
What: /sys/bus/counter/devices/counterX/countY/ceiling_component_id
|
||||
What: /sys/bus/counter/devices/counterX/countY/floor_component_id
|
||||
|
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@@ -2268,7 +2268,7 @@ Description:
|
||||
representing the sensor unique ID number.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/filter_type_available
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
|
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What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_type_available
|
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KernelVersion: 6.1
|
||||
Contact: linux-iio@vger.kernel.org
|
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Description:
|
||||
@@ -2290,6 +2290,16 @@ Description:
|
||||
* "sinc3+pf2" - Sinc3 + device specific Post Filter 2.
|
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* "sinc3+pf3" - Sinc3 + device specific Post Filter 3.
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* "sinc3+pf4" - Sinc3 + device specific Post Filter 4.
|
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* "wideband" - filter with wideband low ripple passband
|
||||
and sharp transition band.
|
||||
|
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What: /sys/bus/iio/devices/iio:deviceX/filter_type
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_type
|
||||
KernelVersion: 6.1
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Specifies which filter type apply to the channel. The possible
|
||||
values are given by the filter_type_available attribute.
|
||||
|
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What: /sys/.../events/in_proximity_thresh_either_runningperiod
|
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KernelVersion: 6.6
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
|
||||
KernelVersion: 6.2
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Reading returns a list with the possible filter modes.
|
||||
|
||||
This ABI is only kept for backwards compatibility and the values
|
||||
returned are identical to filter_type_available attribute
|
||||
documented in Documentation/ABI/testing/sysfs-bus-iio. Please,
|
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use filter_type_available like ABI to provide filter options for
|
||||
new drivers.
|
||||
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode
|
||||
KernelVersion: 6.2
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
This ABI is only kept for backwards compatibility and the values
|
||||
returned are identical to in_voltageY-voltageZ_filter_type
|
||||
attribute documented in Documentation/ABI/testing/sysfs-bus-iio.
|
||||
Please, use in_voltageY-voltageZ_filter_type for new drivers.
|
||||
@@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10
|
||||
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns the first MAC address in a block
|
||||
of sequential MAC addresses assigned to the board
|
||||
that is managed by the Intel MAX10 BMC. It is stored in
|
||||
@@ -28,7 +28,7 @@ Description: Read only. Returns the first MAC address in a block
|
||||
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns the number of sequential MAC
|
||||
addresses assigned to the board managed by the Intel
|
||||
MAX10 BMC. This value is stored in FLASH and is mirrored
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the static
|
||||
region if one is programmed, else it returns the
|
||||
string: "hash not programmed". This file is only
|
||||
@@ -11,7 +11,7 @@ Description: Read only. Returns the root entry hash for the static
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the partial
|
||||
reconfiguration region if one is programmed, else it
|
||||
returns the string: "hash not programmed". This file
|
||||
@@ -21,7 +21,7 @@ Description: Read only. Returns the root entry hash for the partial
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the BMC image
|
||||
if one is programmed, else it returns the string:
|
||||
"hash not programmed". This file is only visible if the
|
||||
@@ -31,7 +31,7 @@ Description: Read only. Returns the root entry hash for the BMC image
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the static region. The standard bitmap
|
||||
list format is used (e.g. "1,2-6,9").
|
||||
@@ -39,7 +39,7 @@ Description: Read only. Returns a list of indices for canceled code
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the partial reconfiguration region. The
|
||||
standard bitmap list format is used (e.g. "1,2-6,9").
|
||||
@@ -47,7 +47,7 @@ Description: Read only. Returns a list of indices for canceled code
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the BMC. The standard bitmap list format
|
||||
is used (e.g. "1,2-6,9").
|
||||
@@ -55,7 +55,7 @@ Description: Read only. Returns a list of indices for canceled code
|
||||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@intel.com>
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Description: Read only. Returns number of times the secure update
|
||||
staging area has been flashed.
|
||||
Format: "%u".
|
||||
|
||||
@@ -0,0 +1,6 @@
|
||||
What: /sys/class/pps-gen/pps-genx/enable
|
||||
Date: April 2025
|
||||
KernelVersion: 6.15
|
||||
Contact: Subramanian Mohan<subramanian.mohan@intel.com>
|
||||
Description:
|
||||
Enable or disable PPS TIO generator output.
|
||||
@@ -101,6 +101,29 @@ properties:
|
||||
and ETF configurations.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
memory-region:
|
||||
items:
|
||||
- description: Reserved trace buffer memory for ETR and ETF sinks.
|
||||
For ETR, this reserved memory region is used for trace data capture.
|
||||
Same region is used for trace data retention as well after a panic
|
||||
or watchdog reset.
|
||||
This reserved memory region is used as trace buffer or used for trace
|
||||
data retention only if specifically selected by the user in sysfs
|
||||
interface.
|
||||
The default memory usage models for ETR in sysfs/perf modes are
|
||||
otherwise unaltered.
|
||||
|
||||
For ETF, this reserved memory region is used by default for
|
||||
retention of trace data synced from internal SRAM after a panic
|
||||
or watchdog reset.
|
||||
- description: Reserved meta data memory. Used for ETR and ETF sinks
|
||||
for storing metadata.
|
||||
|
||||
memory-region-names:
|
||||
items:
|
||||
- const: tracedata
|
||||
- const: metadata
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@@ -115,6 +138,9 @@ examples:
|
||||
etr@20070000 {
|
||||
compatible = "arm,coresight-tmc", "arm,primecell";
|
||||
reg = <0x20070000 0x1000>;
|
||||
memory-region = <&etr_trace_mem_reserved>,
|
||||
<&etr_mdata_mem_reserved>;
|
||||
memory-region-names = "tracedata", "metadata";
|
||||
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
@@ -0,0 +1,84 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: CoreSight TMC Control Unit
|
||||
|
||||
maintainers:
|
||||
- Yuanfang Zhang <quic_yuanfang@quicinc.com>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Jie Gan <quic_jiegan@quicinc.com>
|
||||
|
||||
description: |
|
||||
The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
|
||||
Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations.
|
||||
The configuration mode (ETB, ETF, ETR) is discovered at boot time when
|
||||
the device is probed.
|
||||
|
||||
The Coresight TMC Control unit controls various Coresight behaviors.
|
||||
It works as a helper device when connected to TMC ETR device.
|
||||
It is responsible for controlling the data filter function based on
|
||||
the source device's Trace ID for TMC ETR device. The trace data with
|
||||
that Trace id can get into ETR's buffer while other trace data gets
|
||||
ignored.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sa8775p-ctcu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: apb
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port(@[0-1])?$':
|
||||
description: Input connections from CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- in-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ctcu@1001000 {
|
||||
compatible = "qcom,sa8775p-ctcu";
|
||||
reg = <0x1001000 0x1000>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ctcu_in_port0: endpoint {
|
||||
remote-endpoint = <&etr0_out_port>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
ctcu_in_port1: endpoint {
|
||||
remote-endpoint = <&etr1_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -55,8 +55,7 @@ properties:
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
@@ -41,8 +41,7 @@ properties:
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 1
|
||||
|
||||
qcom,dsb-element-bits:
|
||||
description:
|
||||
|
||||
@@ -0,0 +1,110 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright 2024 Analog Devices Inc.
|
||||
# Copyright 2024 BayLibre, SAS.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad4030.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD4030 and AD4630 ADC families
|
||||
|
||||
maintainers:
|
||||
- Michael Hennerich <michael.hennerich@analog.com>
|
||||
- Nuno Sa <nuno.sa@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices AD4030 single channel and AD4630/AD4632 dual channel precision
|
||||
SAR ADC families
|
||||
|
||||
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4030-24-4032-24.pdf
|
||||
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-24_ad4632-24.pdf
|
||||
* https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-16-4632-16.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad4030-24
|
||||
- adi,ad4032-24
|
||||
- adi,ad4630-16
|
||||
- adi,ad4630-24
|
||||
- adi,ad4632-16
|
||||
- adi,ad4632-24
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 102040816
|
||||
|
||||
spi-rx-bus-width:
|
||||
enum: [1, 2, 4]
|
||||
|
||||
vdd-5v-supply: true
|
||||
vdd-1v8-supply: true
|
||||
vio-supply: true
|
||||
|
||||
ref-supply:
|
||||
description:
|
||||
Optional External unbuffered reference. Used when refin-supply is not
|
||||
connected.
|
||||
|
||||
refin-supply:
|
||||
description:
|
||||
Internal buffered Reference. Used when ref-supply is not connected.
|
||||
|
||||
cnv-gpios:
|
||||
description:
|
||||
The Convert Input (CNV). It initiates the sampling conversions.
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
description:
|
||||
The Reset Input (/RST). Used for asynchronous device reset.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
The BUSY pin is used to signal that the conversions results are available
|
||||
to be transferred when in SPI Clocking Mode. This nodes should be
|
||||
connected to an interrupt that is triggered when the BUSY line goes low.
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: busy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-5v-supply
|
||||
- vdd-1v8-supply
|
||||
- vio-supply
|
||||
- cnv-gpios
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- ref-supply
|
||||
- required:
|
||||
- refin-supply
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "adi,ad4030-24";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <80000000>;
|
||||
vdd-5v-supply = <&supply_5V>;
|
||||
vdd-1v8-supply = <&supply_1_8V>;
|
||||
vio-supply = <&supply_1_8V>;
|
||||
ref-supply = <&supply_5V>;
|
||||
cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
@@ -84,6 +84,10 @@ properties:
|
||||
description: The Reset Input (RESET). Should be configured GPIO_ACTIVE_LOW.
|
||||
maxItems: 1
|
||||
|
||||
pwms:
|
||||
description: PWM signal connected to the CNV pin.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
@@ -106,6 +110,15 @@ properties:
|
||||
The first cell is the GPn number: 0 to 3.
|
||||
The second cell takes standard GPIO flags.
|
||||
|
||||
'#trigger-source-cells':
|
||||
description: |
|
||||
First cell indicates the output signal: 0 = BUSY, 1 = ALERT.
|
||||
Second cell indicates which GPn pin is used: 0, 2 or 3.
|
||||
|
||||
For convenience, macros for these values are available in
|
||||
dt-bindings/iio/adc/adi,ad4695.h.
|
||||
const: 2
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
|
||||
@@ -0,0 +1,153 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright 2024 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad4851.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD485X family
|
||||
|
||||
maintainers:
|
||||
- Sergiu Cuciurean <sergiu.cuciurean@analog.com>
|
||||
- Dragos Bogdan <dragos.bogdan@analog.com>
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Analog Devices AD485X fully buffered, 8-channel simultaneous sampling,
|
||||
16/20-bit, 1 MSPS data acquisition system (DAS) with differential, wide
|
||||
common-mode range inputs.
|
||||
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4855.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4856.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4857.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad4858.pdf
|
||||
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad4851
|
||||
- adi,ad4852
|
||||
- adi,ad4853
|
||||
- adi,ad4854
|
||||
- adi,ad4855
|
||||
- adi,ad4856
|
||||
- adi,ad4857
|
||||
- adi,ad4858
|
||||
- adi,ad4858i
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vcc-supply: true
|
||||
|
||||
vee-supply: true
|
||||
|
||||
vdd-supply: true
|
||||
|
||||
vddh-supply: true
|
||||
|
||||
vddl-supply: true
|
||||
|
||||
vio-supply: true
|
||||
|
||||
vrefbuf-supply: true
|
||||
|
||||
vrefio-supply: true
|
||||
|
||||
pwms:
|
||||
description: PWM connected to the CNV pin.
|
||||
maxItems: 1
|
||||
|
||||
io-backends:
|
||||
maxItems: 1
|
||||
|
||||
pd-gpios:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 25000000
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel(@[0-7])?$":
|
||||
$ref: adc.yaml
|
||||
type: object
|
||||
description: Represents the channels which are connected to the ADC.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
The channel number, as specified in the datasheet (from 0 to 7).
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
diff-channels:
|
||||
description:
|
||||
Each channel can be configured as a bipolar differential channel.
|
||||
The ADC uses the same positive and negative inputs for this.
|
||||
This property must be specified as 'reg' (or the channel number) for
|
||||
both positive and negative inputs (i.e. diff-channels = <reg reg>).
|
||||
Since the configuration is bipolar differential, the 'bipolar'
|
||||
property is required.
|
||||
items:
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
bipolar: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vcc-supply
|
||||
- vee-supply
|
||||
- vdd-supply
|
||||
- vio-supply
|
||||
- pwms
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0{
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "adi,ad4858";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
vcc-supply = <&vcc>;
|
||||
vdd-supply = <&vdd>;
|
||||
vee-supply = <&vee>;
|
||||
vddh-supply = <&vddh>;
|
||||
vddl-supply = <&vddl>;
|
||||
vio-supply = <&vio>;
|
||||
pwms = <&pwm_gen 0 0>;
|
||||
io-backends = <&iio_backend>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
diff-channels = <0 0>;
|
||||
bipolar;
|
||||
};
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,149 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2025 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/adi,ad7191.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD7191 ADC
|
||||
|
||||
maintainers:
|
||||
- Alisa-Dariana Roman <alisa.roman@analog.com>
|
||||
|
||||
description: |
|
||||
Bindings for the Analog Devices AD7191 ADC device. Datasheet can be
|
||||
found here:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7191.pdf
|
||||
The device's PDOWN pin must be connected to the SPI controller's chip select
|
||||
pin.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7191
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
spi-cpha: true
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description:
|
||||
Must be present when CLKSEL pin is tied HIGH to select external clock
|
||||
source (either a crystal between MCLK1 and MCLK2 pins, or a
|
||||
CMOS-compatible clock driving MCLK2 pin). Must be absent when CLKSEL pin
|
||||
is tied LOW to use the internal 4.92MHz clock.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply:
|
||||
description: AVdd voltage supply
|
||||
|
||||
dvdd-supply:
|
||||
description: DVdd voltage supply
|
||||
|
||||
vref-supply:
|
||||
description: Vref voltage supply
|
||||
|
||||
odr-gpios:
|
||||
description:
|
||||
ODR1 and ODR2 pins for output data rate selection. Should be defined if
|
||||
adi,odr-value is absent.
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
adi,odr-value:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Should be present if ODR pins are pin-strapped. Possible values:
|
||||
120 Hz (ODR1=0, ODR2=0)
|
||||
60 Hz (ODR1=0, ODR2=1)
|
||||
50 Hz (ODR1=1, ODR2=0)
|
||||
10 Hz (ODR1=1, ODR2=1)
|
||||
If defined, odr-gpios must be absent.
|
||||
enum: [120, 60, 50, 10]
|
||||
|
||||
pga-gpios:
|
||||
description:
|
||||
PGA1 and PGA2 pins for gain selection. Should be defined if adi,pga-value
|
||||
is absent.
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
adi,pga-value:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Should be present if PGA pins are pin-strapped. Possible values:
|
||||
Gain 1 (PGA1=0, PGA2=0)
|
||||
Gain 8 (PGA1=0, PGA2=1)
|
||||
Gain 64 (PGA1=1, PGA2=0)
|
||||
Gain 128 (PGA1=1, PGA2=1)
|
||||
If defined, pga-gpios must be absent.
|
||||
enum: [1, 8, 64, 128]
|
||||
|
||||
temp-gpios:
|
||||
description: TEMP pin for temperature sensor enable.
|
||||
maxItems: 1
|
||||
|
||||
chan-gpios:
|
||||
description: CHAN pin for input channel selection.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- avdd-supply
|
||||
- dvdd-supply
|
||||
- vref-supply
|
||||
- spi-cpol
|
||||
- spi-cpha
|
||||
- temp-gpios
|
||||
- chan-gpios
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
- oneOf:
|
||||
- required:
|
||||
- adi,odr-value
|
||||
- required:
|
||||
- odr-gpios
|
||||
- oneOf:
|
||||
- required:
|
||||
- adi,pga-value
|
||||
- required:
|
||||
- pga-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "adi,ad7191";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
clocks = <&ad7191_mclk>;
|
||||
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-parent = <&gpio>;
|
||||
avdd-supply = <&avdd>;
|
||||
dvdd-supply = <&dvdd>;
|
||||
vref-supply = <&vref>;
|
||||
adi,pga-value = <1>;
|
||||
odr-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>, <&gpio 24 GPIO_ACTIVE_HIGH>;
|
||||
temp-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
|
||||
chan-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
@@ -27,6 +27,7 @@ description: |
|
||||
* https://www.analog.com/en/products/ad7388-4.html
|
||||
* https://www.analog.com/en/products/adaq4370-4.html
|
||||
* https://www.analog.com/en/products/adaq4380-4.html
|
||||
* https://www.analog.com/en/products/adaq4381-4.html
|
||||
|
||||
|
||||
$ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
@@ -50,6 +51,7 @@ properties:
|
||||
- adi,ad7388-4
|
||||
- adi,adaq4370-4
|
||||
- adi,adaq4380-4
|
||||
- adi,adaq4381-4
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -201,6 +203,7 @@ allOf:
|
||||
- adi,ad7380-4
|
||||
- adi,adaq4370-4
|
||||
- adi,adaq4380-4
|
||||
- adi,adaq4381-4
|
||||
then:
|
||||
properties:
|
||||
refio-supply: false
|
||||
@@ -218,6 +221,7 @@ allOf:
|
||||
enum:
|
||||
- adi,adaq4370-4
|
||||
- adi,adaq4380-4
|
||||
- adi,adaq4381-4
|
||||
then:
|
||||
required:
|
||||
- vs-p-supply
|
||||
|
||||
@@ -17,13 +17,25 @@ description: |
|
||||
interface for the actual ADC, while this IP core will interface
|
||||
to the data-lines of the ADC and handle the streaming of data into
|
||||
memory via DMA.
|
||||
In some cases, the AXI ADC interface is used to perform specialized
|
||||
operation to a particular ADC, e.g access the physical bus through
|
||||
specific registers to write ADC registers.
|
||||
In this case, we use a different compatible which indicates the target
|
||||
IP core's name.
|
||||
The following IP is currently supported:
|
||||
- AXI AD7606x: specialized version of the IP core for all the chips from
|
||||
the ad7606 family.
|
||||
|
||||
https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
|
||||
https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html
|
||||
http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,axi-adc-10.0.a
|
||||
- adi,axi-ad7606x
|
||||
- adi,axi-ad485x
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -47,17 +59,48 @@ properties:
|
||||
'#io-backend-cells':
|
||||
const: 0
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^adc@[0-9a-f]+$":
|
||||
type: object
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
additionalProperties: true
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- dmas
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
not:
|
||||
contains:
|
||||
const: adi,axi-ad7606x
|
||||
then:
|
||||
properties:
|
||||
'#address-cells': false
|
||||
'#size-cells': false
|
||||
patternProperties:
|
||||
"^adc@[0-9a-f]+$": false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
axi-adc@44a00000 {
|
||||
adc@44a00000 {
|
||||
compatible = "adi,axi-adc-10.0.a";
|
||||
reg = <0x44a00000 0x10000>;
|
||||
dmas = <&rx_dma 0>;
|
||||
@@ -65,4 +108,31 @@ examples:
|
||||
clocks = <&axi_clk>;
|
||||
#io-backend-cells = <0>;
|
||||
};
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
parallel_bus_controller@44a00000 {
|
||||
compatible = "adi,axi-ad7606x";
|
||||
reg = <0x44a00000 0x10000>;
|
||||
dmas = <&rx_dma 0>;
|
||||
dma-names = "rx";
|
||||
clocks = <&ext_clk>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "adi,ad7606b";
|
||||
reg = <0>;
|
||||
pwms = <&axi_pwm_gen 0 0>;
|
||||
pwm-names = "convst1";
|
||||
avcc-supply = <&adc_vref>;
|
||||
vdrive-supply = <&vdd_supply>;
|
||||
reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>;
|
||||
standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
|
||||
adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>;
|
||||
adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH
|
||||
&gpio0 87 GPIO_ACTIVE_HIGH
|
||||
&gpio0 86 GPIO_ACTIVE_HIGH>;
|
||||
io-backends = <¶llel_bus_controller>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
||||
@@ -19,7 +19,14 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,imx93-adc
|
||||
oneOf:
|
||||
- enum:
|
||||
- nxp,imx93-adc
|
||||
- items:
|
||||
- enum:
|
||||
- nxp,imx94-adc
|
||||
- nxp,imx95-adc
|
||||
- const: nxp,imx93-adc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -15,6 +15,8 @@ properties:
|
||||
- const: rockchip,saradc
|
||||
- const: rockchip,rk3066-tsadc
|
||||
- const: rockchip,rk3399-saradc
|
||||
- const: rockchip,rk3528-saradc
|
||||
- const: rockchip,rk3562-saradc
|
||||
- const: rockchip,rk3588-saradc
|
||||
- items:
|
||||
- const: rockchip,rk3576-saradc
|
||||
|
||||
@@ -0,0 +1,63 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/ti,ads7138.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments ADS7128/ADS7138 analog-to-digital converter (ADC)
|
||||
|
||||
maintainers:
|
||||
- Tobias Sperling <tobias.sperling@softing.com>
|
||||
|
||||
description: |
|
||||
The ADS7128 and ADS7138 chips are 12-bit, 8 channel analog-to-digital
|
||||
converters (ADC) with build-in digital window comparator (DWC), using the
|
||||
I2C interface.
|
||||
ADS7128 differs in the addition of further hardware features, like a
|
||||
root-mean-square (RMS) and a zero-crossing-detect (ZCD) module.
|
||||
|
||||
Datasheets:
|
||||
https://www.ti.com/product/ADS7128
|
||||
https://www.ti.com/product/ADS7138
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,ads7128
|
||||
- ti,ads7138
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply:
|
||||
description:
|
||||
The regulator used as analog supply voltage as well as reference voltage.
|
||||
|
||||
interrupts:
|
||||
description:
|
||||
Interrupt on ALERT pin, triggers on low level.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@10 {
|
||||
compatible = "ti,ads7138";
|
||||
reg = <0x10>;
|
||||
avdd-supply = <®_stb_3v3>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
...
|
||||
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