mirror of
https://github.com/linux-msm/laptops-kernel.git
synced 2026-08-13 14:19:53 -07:00
Merge tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"This is the first half of the driver changes:
- A treewide interface change to the "syscore" operations for power
management, as a preparation for future Tegra specific changes
- Reset controller updates with added drivers for LAN969x, eic770 and
RZ/G3S SoCs
- Protection of system controller registers on Renesas and Google
SoCs, to prevent trivially triggering a system crash from e.g.
debugfs access
- soc_device identification updates on Nvidia, Exynos and Mediatek
- debugfs support in the ST STM32 firewall driver
- Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI
- Cleanups for memory controller support on Nvidia and Renesas"
* tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (114 commits)
memory: tegra186-emc: Fix missing put_bpmp
Documentation: reset: Remove reset_controller_add_lookup()
reset: fix BIT macro reference
reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe
reset: th1520: Support reset controllers in more subsystems
reset: th1520: Prepare for supporting multiple controllers
dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
reset: remove legacy reset lookup code
clk: davinci: psc: drop unused reset lookup
reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
reset: eswin: Add eic7700 reset driver
dt-bindings: reset: eswin: Documentation for eic7700 SoC
reset: sparx5: add LAN969x support
dt-bindings: reset: microchip: Add LAN969x support
soc: rockchip: grf: Add select correct PWM implementation on RK3368
soc/tegra: pmc: Add USB wake events for Tegra234
amba: tegra-ahb: Fix device leak on SMMU enable
...
This commit is contained in:
Linus Torvalds
@@ -33,14 +33,18 @@ select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: st,stm32mp25-rifsc
|
||||
enum:
|
||||
- st,stm32mp21-rifsc
|
||||
- st,stm32mp25-rifsc
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: st,stm32mp25-rifsc
|
||||
- enum:
|
||||
- st,stm32mp21-rifsc
|
||||
- st,stm32mp25-rifsc
|
||||
- const: simple-bus
|
||||
|
||||
reg:
|
||||
|
||||
@@ -21,6 +21,7 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,ipq5424-llcc
|
||||
- qcom,kaanapali-llcc
|
||||
- qcom,qcs615-llcc
|
||||
- qcom,qcs8300-llcc
|
||||
- qcom,qdu1000-llcc
|
||||
@@ -272,6 +273,7 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,kaanapali-llcc
|
||||
- qcom,sm8450-llcc
|
||||
- qcom,sm8550-llcc
|
||||
- qcom,sm8650-llcc
|
||||
|
||||
@@ -23,6 +23,7 @@ properties:
|
||||
- enum:
|
||||
- qcom,scm-apq8064
|
||||
- qcom,scm-apq8084
|
||||
- qcom,scm-glymur
|
||||
- qcom,scm-ipq4019
|
||||
- qcom,scm-ipq5018
|
||||
- qcom,scm-ipq5332
|
||||
@@ -31,6 +32,7 @@ properties:
|
||||
- qcom,scm-ipq806x
|
||||
- qcom,scm-ipq8074
|
||||
- qcom,scm-ipq9574
|
||||
- qcom,scm-kaanapali
|
||||
- qcom,scm-mdm9607
|
||||
- qcom,scm-milos
|
||||
- qcom,scm-msm8226
|
||||
@@ -202,6 +204,7 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,scm-kaanapali
|
||||
- qcom,scm-milos
|
||||
- qcom,scm-sm8450
|
||||
- qcom,scm-sm8550
|
||||
|
||||
@@ -20,12 +20,14 @@ properties:
|
||||
- samsung,exynos5433-chipid
|
||||
- samsung,exynos7-chipid
|
||||
- samsung,exynos7870-chipid
|
||||
- samsung,exynos8890-chipid
|
||||
- const: samsung,exynos4210-chipid
|
||||
- items:
|
||||
- enum:
|
||||
- samsung,exynos2200-chipid
|
||||
- samsung,exynos7885-chipid
|
||||
- samsung,exynos8895-chipid
|
||||
- samsung,exynos9610-chipid
|
||||
- samsung,exynos9810-chipid
|
||||
- samsung,exynos990-chipid
|
||||
- samsung,exynosautov9-chipid
|
||||
|
||||
@@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/reset/eswin,eic7700-reset.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ESWIN EIC7700 SoC reset controller
|
||||
|
||||
maintainers:
|
||||
- Yifeng Huang <huangyifeng@eswincomputing.com>
|
||||
- Xuyang Dong <dongxuyang@eswincomputing.com>
|
||||
|
||||
description:
|
||||
The system reset controller can be used to reset various peripheral
|
||||
controllers in ESWIN eic7700 SoC.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: eswin,eic7700-reset
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#reset-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/reset/eswin,eic7700-reset.h>
|
||||
|
||||
reset-controller@51828300 {
|
||||
compatible = "eswin,eic7700-reset";
|
||||
reg = <0x51828300 0x200>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -20,9 +20,14 @@ properties:
|
||||
pattern: "^reset-controller@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- microchip,sparx5-switch-reset
|
||||
- microchip,lan966x-switch-reset
|
||||
oneOf:
|
||||
- enum:
|
||||
- microchip,sparx5-switch-reset
|
||||
- microchip,lan966x-switch-reset
|
||||
- items:
|
||||
- enum:
|
||||
- microchip,lan9691-switch-reset
|
||||
- const: microchip,lan966x-switch-reset
|
||||
|
||||
reg:
|
||||
items:
|
||||
|
||||
@@ -15,12 +15,14 @@ description:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
|
||||
- renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
|
||||
- const: renesas,rzg2l-usbphy-ctrl
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
|
||||
- renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-usbphy-ctrl # RZ/V2L
|
||||
- const: renesas,rzg2l-usbphy-ctrl
|
||||
- const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -48,6 +50,20 @@ properties:
|
||||
$ref: /schemas/regulator/regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
renesas,sysc-pwrrdy:
|
||||
description:
|
||||
The system controller PWRRDY indicates to the USB PHY if the power supply
|
||||
is ready. PWRRDY needs to be set during power-on before applying any
|
||||
other settings. It also needs to be set before powering off the USB.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description:
|
||||
System controller phandle required by USB PHY CTRL driver to set
|
||||
PWRRDY
|
||||
- description: Register offset associated with PWRRDY
|
||||
- description: Register bitmask associated with PWRRDY
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@@ -57,6 +73,19 @@ required:
|
||||
- '#reset-cells'
|
||||
- regulator-vbus
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a08g045-usbphy-ctrl
|
||||
then:
|
||||
required:
|
||||
- renesas,sysc-pwrrdy
|
||||
else:
|
||||
properties:
|
||||
renesas,sysc-pwrrdy: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -16,7 +16,13 @@ maintainers:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- thead,th1520-reset
|
||||
- thead,th1520-reset # Reset controller for VO subsystem
|
||||
- thead,th1520-reset-ao
|
||||
- thead,th1520-reset-ap
|
||||
- thead,th1520-reset-dsp
|
||||
- thead,th1520-reset-misc
|
||||
- thead,th1520-reset-vi
|
||||
- thead,th1520-reset-vp
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -52,6 +52,7 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-pwrap
|
||||
- mediatek,mt8189-pwrap
|
||||
- const: mediatek,mt8195-pwrap
|
||||
- const: syscon
|
||||
|
||||
|
||||
@@ -25,6 +25,8 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,glymur-aoss-qmp
|
||||
- qcom,kaanapali-aoss-qmp
|
||||
- qcom,milos-aoss-qmp
|
||||
- qcom,qcs615-aoss-qmp
|
||||
- qcom,qcs8300-aoss-qmp
|
||||
|
||||
@@ -55,6 +55,7 @@ properties:
|
||||
- samsung,exynos2200-pmu
|
||||
- samsung,exynos7870-pmu
|
||||
- samsung,exynos7885-pmu
|
||||
- samsung,exynos8890-pmu
|
||||
- samsung,exynos8895-pmu
|
||||
- samsung,exynos9810-pmu
|
||||
- samsung,exynos990-pmu
|
||||
@@ -172,6 +173,7 @@ allOf:
|
||||
- samsung,exynos5250-pmu
|
||||
- samsung,exynos5420-pmu
|
||||
- samsung,exynos5433-pmu
|
||||
- samsung,exynos7870-pmu
|
||||
then:
|
||||
properties:
|
||||
mipi-phy: true
|
||||
|
||||
@@ -15,7 +15,9 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- google,gs101-apm-sysreg
|
||||
- google,gs101-hsi0-sysreg
|
||||
- google,gs101-hsi2-sysreg
|
||||
- google,gs101-misc-sysreg
|
||||
- google,gs101-peric0-sysreg
|
||||
- google,gs101-peric1-sysreg
|
||||
- samsung,exynos2200-cmgp-sysreg
|
||||
@@ -26,10 +28,14 @@ properties:
|
||||
- samsung,exynos3-sysreg
|
||||
- samsung,exynos4-sysreg
|
||||
- samsung,exynos5-sysreg
|
||||
- samsung,exynos7870-cam0-sysreg
|
||||
- samsung,exynos7870-disp-sysreg
|
||||
- samsung,exynos8895-fsys0-sysreg
|
||||
- samsung,exynos8895-fsys1-sysreg
|
||||
- samsung,exynos8895-peric0-sysreg
|
||||
- samsung,exynos8895-peric1-sysreg
|
||||
- samsung,exynos990-peric0-sysreg
|
||||
- samsung,exynos990-peric1-sysreg
|
||||
- samsung,exynosautov920-hsi2-sysreg
|
||||
- samsung,exynosautov920-peric0-sysreg
|
||||
- samsung,exynosautov920-peric1-sysreg
|
||||
@@ -73,6 +79,9 @@ properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
@@ -83,7 +92,9 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- google,gs101-hsi0-sysreg
|
||||
- google,gs101-hsi2-sysreg
|
||||
- google,gs101-misc-sysreg
|
||||
- google,gs101-peric0-sysreg
|
||||
- google,gs101-peric1-sysreg
|
||||
- samsung,exynos850-cmgp-sysreg
|
||||
@@ -93,6 +104,8 @@ allOf:
|
||||
- samsung,exynos8895-fsys1-sysreg
|
||||
- samsung,exynos8895-peric0-sysreg
|
||||
- samsung,exynos8895-peric1-sysreg
|
||||
- samsung,exynos990-peric0-sysreg
|
||||
- samsung,exynos990-peric1-sysreg
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
@@ -100,6 +113,16 @@ allOf:
|
||||
properties:
|
||||
clocks: false
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
not:
|
||||
contains:
|
||||
pattern: "^google,gs101-[^-]+-sysreg$"
|
||||
then:
|
||||
properties:
|
||||
power-domains: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -218,4 +218,3 @@ devm_reset_controller_register().
|
||||
reset_controller_register
|
||||
reset_controller_unregister
|
||||
devm_reset_controller_register
|
||||
reset_controller_add_lookup
|
||||
|
||||
@@ -10679,6 +10679,7 @@ F: Documentation/devicetree/bindings/clock/google,gs101-clock.yaml
|
||||
F: Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
|
||||
F: arch/arm64/boot/dts/exynos/google/
|
||||
F: drivers/clk/samsung/clk-gs101.c
|
||||
F: drivers/soc/samsung/gs101-pmu.c
|
||||
F: drivers/phy/samsung/phy-gs101-ufs.c
|
||||
F: include/dt-bindings/clock/google,gs101.h
|
||||
K: [gG]oogle.?[tT]ensor
|
||||
|
||||
@@ -215,7 +215,7 @@ static const struct of_device_id exynos_dt_mcpm_match[] = {
|
||||
{},
|
||||
};
|
||||
|
||||
static void exynos_mcpm_setup_entry_point(void)
|
||||
static void exynos_mcpm_setup_entry_point(void *data)
|
||||
{
|
||||
/*
|
||||
* U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
|
||||
@@ -228,10 +228,14 @@ static void exynos_mcpm_setup_entry_point(void)
|
||||
__raw_writel(__pa_symbol(mcpm_entry_point), ns_sram_base_addr + 8);
|
||||
}
|
||||
|
||||
static struct syscore_ops exynos_mcpm_syscore_ops = {
|
||||
static const struct syscore_ops exynos_mcpm_syscore_ops = {
|
||||
.resume = exynos_mcpm_setup_entry_point,
|
||||
};
|
||||
|
||||
static struct syscore exynos_mcpm_syscore = {
|
||||
.ops = &exynos_mcpm_syscore_ops,
|
||||
};
|
||||
|
||||
static int __init exynos_mcpm_init(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
@@ -300,9 +304,9 @@ static int __init exynos_mcpm_init(void)
|
||||
pmu_raw_writel(value, EXYNOS_COMMON_OPTION(i));
|
||||
}
|
||||
|
||||
exynos_mcpm_setup_entry_point();
|
||||
exynos_mcpm_setup_entry_point(NULL);
|
||||
|
||||
register_syscore_ops(&exynos_mcpm_syscore_ops);
|
||||
register_syscore(&exynos_mcpm_syscore);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -53,9 +53,9 @@ struct exynos_pm_data {
|
||||
|
||||
void (*pm_prepare)(void);
|
||||
void (*pm_resume_prepare)(void);
|
||||
void (*pm_resume)(void);
|
||||
int (*pm_suspend)(void);
|
||||
int (*cpu_suspend)(unsigned long);
|
||||
|
||||
const struct syscore_ops *syscore_ops;
|
||||
};
|
||||
|
||||
/* Used only on Exynos542x/5800 */
|
||||
@@ -376,7 +376,7 @@ static void exynos5420_pm_prepare(void)
|
||||
}
|
||||
|
||||
|
||||
static int exynos_pm_suspend(void)
|
||||
static int exynos_pm_suspend(void *data)
|
||||
{
|
||||
exynos_pm_central_suspend();
|
||||
|
||||
@@ -390,7 +390,7 @@ static int exynos_pm_suspend(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos5420_pm_suspend(void)
|
||||
static int exynos5420_pm_suspend(void *data)
|
||||
{
|
||||
u32 this_cluster;
|
||||
|
||||
@@ -408,7 +408,7 @@ static int exynos5420_pm_suspend(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void exynos_pm_resume(void)
|
||||
static void exynos_pm_resume(void *data)
|
||||
{
|
||||
u32 cpuid = read_cpuid_part();
|
||||
|
||||
@@ -429,7 +429,7 @@ early_wakeup:
|
||||
exynos_set_delayed_reset_assertion(true);
|
||||
}
|
||||
|
||||
static void exynos3250_pm_resume(void)
|
||||
static void exynos3250_pm_resume(void *data)
|
||||
{
|
||||
u32 cpuid = read_cpuid_part();
|
||||
|
||||
@@ -473,7 +473,7 @@ static void exynos5420_prepare_pm_resume(void)
|
||||
}
|
||||
}
|
||||
|
||||
static void exynos5420_pm_resume(void)
|
||||
static void exynos5420_pm_resume(void *data)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
@@ -596,41 +596,52 @@ static const struct platform_suspend_ops exynos_suspend_ops = {
|
||||
.valid = suspend_valid_only_mem,
|
||||
};
|
||||
|
||||
static const struct syscore_ops exynos3250_syscore_ops = {
|
||||
.suspend = exynos_pm_suspend,
|
||||
.resume = exynos3250_pm_resume,
|
||||
};
|
||||
|
||||
static const struct exynos_pm_data exynos3250_pm_data = {
|
||||
.wkup_irq = exynos3250_wkup_irq,
|
||||
.wake_disable_mask = ((0xFF << 8) | (0x1F << 1)),
|
||||
.pm_suspend = exynos_pm_suspend,
|
||||
.pm_resume = exynos3250_pm_resume,
|
||||
.pm_prepare = exynos3250_pm_prepare,
|
||||
.cpu_suspend = exynos3250_cpu_suspend,
|
||||
.syscore_ops = &exynos3250_syscore_ops,
|
||||
};
|
||||
|
||||
static const struct syscore_ops exynos_syscore_ops = {
|
||||
.suspend = exynos_pm_suspend,
|
||||
.resume = exynos_pm_resume,
|
||||
};
|
||||
|
||||
static const struct exynos_pm_data exynos4_pm_data = {
|
||||
.wkup_irq = exynos4_wkup_irq,
|
||||
.wake_disable_mask = ((0xFF << 8) | (0x1F << 1)),
|
||||
.pm_suspend = exynos_pm_suspend,
|
||||
.pm_resume = exynos_pm_resume,
|
||||
.pm_prepare = exynos_pm_prepare,
|
||||
.cpu_suspend = exynos_cpu_suspend,
|
||||
.syscore_ops = &exynos_syscore_ops,
|
||||
};
|
||||
|
||||
static const struct exynos_pm_data exynos5250_pm_data = {
|
||||
.wkup_irq = exynos5250_wkup_irq,
|
||||
.wake_disable_mask = ((0xFF << 8) | (0x1F << 1)),
|
||||
.pm_suspend = exynos_pm_suspend,
|
||||
.pm_resume = exynos_pm_resume,
|
||||
.pm_prepare = exynos_pm_prepare,
|
||||
.cpu_suspend = exynos_cpu_suspend,
|
||||
.syscore_ops = &exynos_syscore_ops,
|
||||
};
|
||||
|
||||
static const struct syscore_ops exynos5420_syscore_ops = {
|
||||
.resume = exynos5420_pm_resume,
|
||||
.suspend = exynos5420_pm_suspend,
|
||||
};
|
||||
|
||||
static const struct exynos_pm_data exynos5420_pm_data = {
|
||||
.wkup_irq = exynos5250_wkup_irq,
|
||||
.wake_disable_mask = (0x7F << 7) | (0x1F << 1),
|
||||
.pm_resume_prepare = exynos5420_prepare_pm_resume,
|
||||
.pm_resume = exynos5420_pm_resume,
|
||||
.pm_suspend = exynos5420_pm_suspend,
|
||||
.pm_prepare = exynos5420_pm_prepare,
|
||||
.cpu_suspend = exynos5420_cpu_suspend,
|
||||
.syscore_ops = &exynos5420_syscore_ops,
|
||||
};
|
||||
|
||||
static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
|
||||
@@ -656,7 +667,7 @@ static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
|
||||
{ /*sentinel*/ },
|
||||
};
|
||||
|
||||
static struct syscore_ops exynos_pm_syscore_ops;
|
||||
static struct syscore exynos_pm_syscore;
|
||||
|
||||
void __init exynos_pm_init(void)
|
||||
{
|
||||
@@ -684,10 +695,9 @@ void __init exynos_pm_init(void)
|
||||
tmp |= pm_data->wake_disable_mask;
|
||||
pmu_raw_writel(tmp, S5P_WAKEUP_MASK);
|
||||
|
||||
exynos_pm_syscore_ops.suspend = pm_data->pm_suspend;
|
||||
exynos_pm_syscore_ops.resume = pm_data->pm_resume;
|
||||
exynos_pm_syscore.ops = pm_data->syscore_ops;
|
||||
|
||||
register_syscore_ops(&exynos_pm_syscore_ops);
|
||||
register_syscore(&exynos_pm_syscore);
|
||||
suspend_set_ops(&exynos_suspend_ops);
|
||||
|
||||
/*
|
||||
|
||||
@@ -34,9 +34,9 @@ extern void __init pxa27x_map_io(void);
|
||||
extern void __init pxa3xx_init_irq(void);
|
||||
extern void __init pxa3xx_map_io(void);
|
||||
|
||||
extern struct syscore_ops pxa_irq_syscore_ops;
|
||||
extern struct syscore_ops pxa2xx_mfp_syscore_ops;
|
||||
extern struct syscore_ops pxa3xx_mfp_syscore_ops;
|
||||
extern struct syscore pxa_irq_syscore;
|
||||
extern struct syscore pxa2xx_mfp_syscore;
|
||||
extern struct syscore pxa3xx_mfp_syscore;
|
||||
|
||||
void __init pxa_set_ffuart_info(void *info);
|
||||
void __init pxa_set_btuart_info(void *info);
|
||||
|
||||
@@ -178,7 +178,7 @@ void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
|
||||
static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
|
||||
static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
|
||||
|
||||
static int pxa_irq_suspend(void)
|
||||
static int pxa_irq_suspend(void *data)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -197,7 +197,7 @@ static int pxa_irq_suspend(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pxa_irq_resume(void)
|
||||
static void pxa_irq_resume(void *data)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -219,11 +219,15 @@ static void pxa_irq_resume(void)
|
||||
#define pxa_irq_resume NULL
|
||||
#endif
|
||||
|
||||
struct syscore_ops pxa_irq_syscore_ops = {
|
||||
static const struct syscore_ops pxa_irq_syscore_ops = {
|
||||
.suspend = pxa_irq_suspend,
|
||||
.resume = pxa_irq_resume,
|
||||
};
|
||||
|
||||
struct syscore pxa_irq_syscore = {
|
||||
.ops = &pxa_irq_syscore_ops,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static const struct of_device_id intc_ids[] __initconst = {
|
||||
{ .compatible = "marvell,pxa-intc", },
|
||||
|
||||
@@ -346,7 +346,7 @@ static unsigned long saved_gpdr[4];
|
||||
static unsigned long saved_gplr[4];
|
||||
static unsigned long saved_pgsr[4];
|
||||
|
||||
static int pxa2xx_mfp_suspend(void)
|
||||
static int pxa2xx_mfp_suspend(void *data)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -385,7 +385,7 @@ static int pxa2xx_mfp_suspend(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pxa2xx_mfp_resume(void)
|
||||
static void pxa2xx_mfp_resume(void *data)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -404,11 +404,15 @@ static void pxa2xx_mfp_resume(void)
|
||||
#define pxa2xx_mfp_resume NULL
|
||||
#endif
|
||||
|
||||
struct syscore_ops pxa2xx_mfp_syscore_ops = {
|
||||
static const struct syscore_ops pxa2xx_mfp_syscore_ops = {
|
||||
.suspend = pxa2xx_mfp_suspend,
|
||||
.resume = pxa2xx_mfp_resume,
|
||||
};
|
||||
|
||||
struct syscore pxa2xx_mfp_syscore = {
|
||||
.ops = &pxa2xx_mfp_syscore_ops,
|
||||
};
|
||||
|
||||
static int __init pxa2xx_mfp_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -27,13 +27,13 @@
|
||||
* a pull-down mode if they're an active low chip select, and we're
|
||||
* just entering standby.
|
||||
*/
|
||||
static int pxa3xx_mfp_suspend(void)
|
||||
static int pxa3xx_mfp_suspend(void *data)
|
||||
{
|
||||
mfp_config_lpm();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pxa3xx_mfp_resume(void)
|
||||
static void pxa3xx_mfp_resume(void *data)
|
||||
{
|
||||
mfp_config_run();
|
||||
|
||||
@@ -49,7 +49,11 @@ static void pxa3xx_mfp_resume(void)
|
||||
#define pxa3xx_mfp_resume NULL
|
||||
#endif
|
||||
|
||||
struct syscore_ops pxa3xx_mfp_syscore_ops = {
|
||||
static const struct syscore_ops pxa3xx_mfp_syscore_ops = {
|
||||
.suspend = pxa3xx_mfp_suspend,
|
||||
.resume = pxa3xx_mfp_resume,
|
||||
};
|
||||
|
||||
struct syscore pxa3xx_mfp_syscore = {
|
||||
.ops = &pxa3xx_mfp_syscore_ops,
|
||||
};
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user