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thermal: intel: int340x: Fix potential shift overflow in ptc_mmio_write()

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The value parameter is u32 but is shifted into a u64 register value
without casting first. If the shift amount pushes bits beyond 32, they
are lost. Cast value to u64 before shifting to ensure all bits are
preserved.

Signed-off-by: Aravind Anilraj <aravindanilraj0702@gmail.com>
Link: https://patch.msgid.link/20260329070642.10721-2-aravindanilraj0702@gmail.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Aravind Anilraj
2026-05-26 19:27:53 +02:00
committed by Rafael J. Wysocki
parent e7ae89a0c9
commit 1fac728735
1 changed files with 1 additions and 1 deletions
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drivers/thermal/intel/int340x_thermal/platform_temperature_control.c
+1 -1
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@@ -138,7 +138,7 @@ static void ptc_mmio_write(struct pci_dev *pdev, u32 offset, int index, u32 valu
reg_val = readq((void __iomem *) (proc_priv->mmio_base + offset));
reg_val &= ~mask;
reg_val |= (value << ptc_mmio_regs[index].shift);
reg_val |= ((u64)value << ptc_mmio_regs[index].shift);
writeq(reg_val, (void __iomem *) (proc_priv->mmio_base + offset));
}