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https://github.com/linux-msm/laptops-kernel.git
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Merge tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for kernel cycle v4.7:
Core infrastructural changes:
- Support for natively single-ended GPIO driver stages.
This means that if the hardware has registers to configure open
drain or open source configuration, we use that rather than (as we
did before) try to emulate it by switching the line to an input to
get high impedance.
This is also documented throughly in Documentation/gpio/driver.txt
for those of you who did not understand one word of what I just
wrote.
- Start to do away with the unnecessarily complex and unitelligible
ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another
evolutional artifact from the time when the GPIO subsystem was
unmaintained.
Archs can now just select GPIOLIB and be done with it, cleanups to
arches will trickle in for the next kernel. Some minor archs ACKed
the changes immediately so these are included in this pull request.
- Advancing the use of the data pointer inside the GPIO device for
storing driver data by switching the PowerPC, Super-H Unicore and
a few other subarches or subsystem drivers in ALSA SoC, Input,
serial, SSB, staging etc to use it.
- The initialization now reads the input/output state of the GPIO
lines, so that each GPIO descriptor knows - if this callback is
implemented - whether the line is input or output. This also
reflects nicely in userspace "lsgpio".
- It is now possible to name GPIO producer names, line names, from
the device tree. (Platform data has been supported for a while).
I bet we will get a similar mechanism for ACPI one of those days.
This makes is possible to get sensible producer names for e.g.
GPIO rails in "lsgpio" in userspace.
New drivers:
- New driver for the Loongson1.
- The XLP driver now supports Broadcom Vulcan ARM64.
- The IT87 driver now supports IT8620 and IT8628.
- The PCA953X driver now supports Galileo Gen2.
Driver improvements:
- MCP23S08 was switched to use the gpiolib irqchip helpers and now
also suppors level-triggered interrupts.
- 74x164 and RCAR now supports the .set_multiple() callback
- AMDPT was converted to use generic GPIO.
- TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994
support the new single ended callback for open drain and in some
cases open source.
- Implement the .get_direction() callback for a few more drivers like
PL061, Xgene.
Cleanups:
- Paul Gortmaker combed through the drivers and de-modularized those
who are not really modules.
- Move the GPIO poweroff DT bindings to the power subdir where they
belong.
- Rename gpio-generic.c to gpio-mmio.c, which is much more to the
point. That's what it is handling, nothing more, nothing less"
* tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits)
MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
gpio: zevio: make it explicitly non-modular
gpio: timberdale: make it explicitly non-modular
gpio: stmpe: make it explicitly non-modular
gpio: sodaville: make it explicitly non-modular
pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error
gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms
gpio: dt-bindings: add wd,mbl-gpio bindings
gpio: of: make it possible to name GPIO lines
gpio: make gpiod_to_irq() return negative for NO_IRQ
gpio: xgene: implement .get_direction()
gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver
gpio: tegra: Implement gpio_get_direction callback
gpio: set up initial state from .get_direction()
gpio: rename gpio-generic.c into gpio-mmio.c
gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case
gpio: dwapb: add gpio-signaled acpi event support
gpio: dwapb: convert device node to fwnode
gpio: dwapb: remove name from dwapb_port_property
gpio/qoriq: select IRQ_DOMAIN
...
This commit is contained in:
Linus Torvalds
@@ -1,7 +1,9 @@
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* Generic 8-bits shift register GPIO driver
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Required properties:
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- compatible : Should be "fairchild,74hc595"
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- compatible: Should contain one of the following:
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"fairchild,74hc595"
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"nxp,74lvc594"
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- reg : chip select number
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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@@ -1,9 +1,10 @@
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* Freescale MPC512x/MPC8xxx/Layerscape GPIO controller
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* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
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Required properties:
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- compatible : Should be "fsl,<soc>-gpio"
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The following <soc>s are known to be supported:
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mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq.
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mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
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ls1021a, ls1043a, ls2080a.
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- reg : Address and length of the register set for the device
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- #gpio-cells : Should be two. The first cell is the pin number and
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@@ -15,7 +16,7 @@ Optional properties:
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- little-endian : GPIO registers are used as little endian. If not
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present registers are used as big endian by default.
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Example:
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Example of gpio-controller node for a mpc5125 SoC:
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gpio0: gpio@1100 {
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compatible = "fsl,mpc5125-gpio";
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@@ -24,3 +25,16 @@ gpio0: gpio@1100 {
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interrupts = <78 0x8>;
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status = "okay";
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};
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Example of gpio-controller node for a ls2080a SoC:
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gpio0: gpio@2300000 {
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compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2300000 0x0 0x10000>;
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interrupts = <0 36 0x4>; /* Level high type */
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gpio-controller;
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little-endian;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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@@ -3,6 +3,8 @@ Netlogic XLP Family GPIO
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This GPIO driver is used for following Netlogic XLP SoCs:
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XLP832, XLP316, XLP208, XLP980, XLP532
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This GPIO driver is also compatible with GPIO controller found on
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Broadcom Vulcan ARM64.
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Required properties:
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-------------------
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@@ -13,6 +15,7 @@ Required properties:
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- "netlogic,xlp208-gpio": For Netlogic XLP208
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- "netlogic,xlp980-gpio": For Netlogic XLP980
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- "netlogic,xlp532-gpio": For Netlogic XLP532
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- "brcm,vulcan-gpio": For Broadcom Vulcan ARM64
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- reg: Physical base address and length of the controller's registers.
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- #gpio-cells: Should be two. The first cell is the pin number and the second
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cell is used to specify optional parameters (currently unused).
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@@ -131,6 +131,13 @@ Every GPIO controller node must contain both an empty "gpio-controller"
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property, and a #gpio-cells integer property, which indicates the number of
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cells in a gpio-specifier.
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Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
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instance of a hardware IP core on a silicon die, usually exposed to the
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programmer as a coherent range of I/O addresses. Usually each such bank is
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exposed in the device tree as an individual gpio-controller node, reflecting
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the fact that the hardware was synthesized by reusing the same IP block a
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few times over.
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Optionally, a GPIO controller may have a "ngpios" property. This property
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indicates the number of in-use slots of available slots for GPIOs. The
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typical example is something like this: the hardware register is 32 bits
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@@ -145,6 +152,21 @@ additional bitmask is needed to specify which GPIOs are actually in use,
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and which are dummies. The bindings for this case has not yet been
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specified, but should be specified if/when such hardware appears.
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Optionally, a GPIO controller may have a "gpio-line-names" property. This is
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an array of strings defining the names of the GPIO lines going out of the
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GPIO controller. This name should be the most meaningful producer name
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for the system, such as a rail name indicating the usage. Package names
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such as pin name are discouraged: such lines have opaque names (since they
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are by definition generic purpose) and such names are usually not very
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helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
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reasonable line names as they describe what the line is used for. "GPIO0"
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is not a good name to give to a GPIO line. Placeholders are discouraged:
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rather use the "" (blank string) if the use of the GPIO line is undefined
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in your design. The names are assigned starting from line offset 0 from
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left to right from the passed array. An incomplete array (where the number
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of passed named are less than ngpios) will still be used up until the last
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provided valid line index.
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Example:
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gpio-controller@00000000 {
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@@ -153,6 +175,10 @@ gpio-controller@00000000 {
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <18>;
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gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
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"LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
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"Row A", "Row B", "Row C", "Row D", "NMI button",
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"poweroff", "reset";
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}
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The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
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@@ -0,0 +1,38 @@
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Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
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The Western Digital MyBook Live has two memory-mapped GPIO controllers.
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Both GPIO controller only have a single 8-bit data register, where GPIO
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state can be read and/or written.
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Required properties:
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- compatible: should be "wd,mbl-gpio"
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- reg-names: must contain
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"dat" - data register
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- reg: address + size pairs describing the GPIO register sets;
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order must correspond with the order of entries in reg-names
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- #gpio-cells: must be set to 2. The first cell is the pin number and
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- gpio-controller: Marks the device node as a gpio controller.
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Optional properties:
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- no-output: GPIOs are read-only.
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Examples:
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gpio0: gpio0@e0000000 {
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compatible = "wd,mbl-gpio";
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reg-names = "dat";
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reg = <0xe0000000 0x1>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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gpio1: gpio1@e0100000 {
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compatible = "wd,mbl-gpio";
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reg-names = "dat";
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reg = <0xe0100000 0x1>;
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#gpio-cells = <2>;
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gpio-controller;
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no-output;
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};
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@@ -68,6 +68,103 @@ control callbacks) if it is expected to call GPIO APIs from atomic context
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on -RT (inside hard IRQ handlers and similar contexts). Normally this should
|
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not be required.
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GPIOs with open drain/source support
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------------------------------------
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Open drain (CMOS) or open collector (TTL) means the line is not actively driven
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high: instead you provide the drain/collector as output, so when the transistor
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is not open, it will present a high-impedance (tristate) to the external rail.
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CMOS CONFIGURATION TTL CONFIGURATION
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||--- out +--- out
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in ----|| |/
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||--+ in ----|
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| |\
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GND GND
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This configuration is normally used as a way to achieve one of two things:
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- Level-shifting: to reach a logical level higher than that of the silicon
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where the output resides.
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- inverse wire-OR on an I/O line, for example a GPIO line, making it possible
|
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for any driving stage on the line to drive it low even if any other output
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to the same line is simultaneously driving it high. A special case of this
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is driving the SCL and SCA lines of an I2C bus, which is by definition a
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wire-OR bus.
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Both usecases require that the line be equipped with a pull-up resistor. This
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resistor will make the line tend to high level unless one of the transistors on
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the rail actively pulls it down.
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The level on the line will go as high as the VDD on the pull-up resistor, which
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may be higher than the level supported by the transistor, achieveing a
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level-shift to the higher VDD.
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Integrated electronics often have an output driver stage in the form of a CMOS
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"totem-pole" with one N-MOS and one P-MOS transistor where one of them drives
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the line high and one of them drives the line low. This is called a push-pull
|
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output. The "totem-pole" looks like so:
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VDD
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|
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OD ||--+
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+--/ ---o|| P-MOS-FET
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| ||--+
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IN --+ +----- out
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| ||--+
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+--/ ----|| N-MOS-FET
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OS ||--+
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|
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GND
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The desired output signal (e.g. coming directly from some GPIO output register)
|
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arrives at IN. The switches named "OD" and "OS" are normally closed, creating
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a push-pull circuit.
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Consider the little "switches" named "OD" and "OS" that enable/disable the
|
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P-MOS or N-MOS transistor right after the split of the input. As you can see,
|
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either transistor will go totally numb if this switch is open. The totem-pole
|
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is then halved and give high impedance instead of actively driving the line
|
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high or low respectively. That is usually how software-controlled open
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drain/source works.
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|
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Some GPIO hardware come in open drain / open source configuration. Some are
|
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hard-wired lines that will only support open drain or open source no matter
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what: there is only one transistor there. Some are software-configurable:
|
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by flipping a bit in a register the output can be configured as open drain
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or open source, in practice by flicking open the switches labeled "OD" and "OS"
|
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in the drawing above.
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|
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By disabling the P-MOS transistor, the output can be driven between GND and
|
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high impedance (open drain), and by disabling the N-MOS transistor, the output
|
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can be driven between VDD and high impedance (open source). In the first case,
|
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a pull-up resistor is needed on the outgoing rail to complete the circuit, and
|
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in the second case, a pull-down resistor is needed on the rail.
|
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|
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Hardware that supports open drain or open source or both, can implement a
|
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special callback in the gpio_chip: .set_single_ended() that takes an enum flag
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telling whether to configure the line as open drain, open source or push-pull.
|
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This will happen in response to the GPIO_OPEN_DRAIN or GPIO_OPEN_SOURCE flag
|
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set in the machine file, or coming from other hardware descriptions.
|
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|
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If this state can not be configured in hardware, i.e. if the GPIO hardware does
|
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not support open drain/open source in hardware, the GPIO library will instead
|
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use a trick: when a line is set as output, if the line is flagged as open
|
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drain, and the IN output value is low, it will be driven low as usual. But
|
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if the IN output value is set to high, it will instead *NOT* be driven high,
|
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instead it will be switched to input, as input mode is high impedance, thus
|
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achieveing an "open drain emulation" of sorts: electrically the behaviour will
|
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be identical, with the exception of possible hardware glitches when switching
|
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the mode of the line.
|
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|
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For open source configuration the same principle is used, just that instead
|
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of actively driving the line low, it is set to input.
|
||||
|
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|
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GPIO drivers providing IRQs
|
||||
---------------------------
|
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It is custom that GPIO drivers (GPIO chips) are also providing interrupts,
|
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|
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@@ -4902,6 +4902,7 @@ M: Alexandre Courbot <gnurou@gmail.com>
|
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L: linux-gpio@vger.kernel.org
|
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git
|
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S: Maintained
|
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F: Documentation/devicetree/bindings/gpio/
|
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F: Documentation/gpio/
|
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F: Documentation/ABI/testing/gpio-cdev
|
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F: Documentation/ABI/obsolete/sysfs-gpio
|
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|
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@@ -13,7 +13,6 @@ config ALPHA
|
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select GENERIC_IRQ_PROBE
|
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select AUTO_IRQ_AFFINITY if SMP
|
||||
select GENERIC_IRQ_SHOW
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
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select ARCH_WANT_IPC_PARSE_VERSION
|
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
|
||||
@@ -13,7 +13,7 @@ menuconfig ARC_PLAT_AXS10X
|
||||
select OF_GPIO
|
||||
select MIGHT_HAVE_PCI
|
||||
select GENERIC_IRQ_CHIP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
help
|
||||
Support for the ARC AXS10x Software Development Platforms.
|
||||
|
||||
|
||||
@@ -21,7 +21,7 @@ menuconfig ARC_PLAT_TB10X
|
||||
select PINCTRL
|
||||
select PINCTRL_TB10X
|
||||
select PINMUX
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select GPIO_TB10X
|
||||
select TB10X_IRQC
|
||||
help
|
||||
|
||||
+1
-1
@@ -74,7 +74,7 @@ config PLATFORM_AT32AP
|
||||
select SUBARCH_AVR32B
|
||||
select MMU
|
||||
select PERFORMANCE_COUNTERS
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select GENERIC_ALLOCATOR
|
||||
select HAVE_FB_ATMEL
|
||||
|
||||
|
||||
+1
-1
@@ -61,7 +61,7 @@ config CRIS
|
||||
select CLONE_BACKWARDS2
|
||||
select OLD_SIGSUSPEND
|
||||
select OLD_SIGACTION
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select IRQ_DOMAIN if ETRAX_ARCH_V32
|
||||
select OF if ETRAX_ARCH_V32
|
||||
select OF_EARLY_FLATTREE if ETRAX_ARCH_V32
|
||||
|
||||
@@ -22,11 +22,11 @@ config M68KCLASSIC
|
||||
|
||||
config COLDFIRE
|
||||
bool "Coldfire CPU family support"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_HAVE_CUSTOM_GPIO_H
|
||||
select CPU_HAS_NO_BITFIELDS
|
||||
select CPU_HAS_NO_MULDIV64
|
||||
select GENERIC_CSUM
|
||||
select GPIOLIB
|
||||
select HAVE_CLK
|
||||
|
||||
endchoice
|
||||
|
||||
@@ -16,7 +16,6 @@ config META21_FPGA
|
||||
|
||||
config SOC_TZ1090
|
||||
bool "Toumaz Xenif TZ1090 SoC (Comet)"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select IMGPDC_IRQ
|
||||
select METAG_LNKGET_AROUND_CACHE
|
||||
select METAG_META21
|
||||
|
||||
+15
-17
@@ -79,7 +79,7 @@ config MIPS_ALCHEMY
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_APM_EMULATION
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select SYS_SUPPORTS_ZBOOT
|
||||
select COMMON_CLK
|
||||
|
||||
@@ -98,7 +98,7 @@ config AR7
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_SUPPORTS_MIPS16
|
||||
select SYS_SUPPORTS_ZBOOT_UART16550
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select VLYNQ
|
||||
select HAVE_CLK
|
||||
help
|
||||
@@ -122,11 +122,11 @@ config ATH25
|
||||
config ATH79
|
||||
bool "Atheros AR71XX/AR724X/AR913X based boards"
|
||||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select BOOT_RAW
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
select DMA_NONCOHERENT
|
||||
select GPIOLIB
|
||||
select HAVE_CLK
|
||||
select COMMON_CLK
|
||||
select CLKDEV_LOOKUP
|
||||
@@ -170,7 +170,6 @@ config BMIPS_GENERIC
|
||||
select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
||||
select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
|
||||
select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
help
|
||||
Build a generic DT-based kernel image that boots on select
|
||||
BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
|
||||
@@ -179,7 +178,6 @@ config BMIPS_GENERIC
|
||||
|
||||
config BCM47XX
|
||||
bool "Broadcom BCM47XX based boards"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select BOOT_RAW
|
||||
select CEVT_R4K
|
||||
select CSRC_R4K
|
||||
@@ -211,7 +209,7 @@ config BCM63XX
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select SWAP_IO_SPACE
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select HAVE_CLK
|
||||
select MIPS_L1_CACHE_SHIFT_4
|
||||
help
|
||||
@@ -305,7 +303,7 @@ config MACH_INGENIC
|
||||
select SYS_SUPPORTS_ZBOOT_UART16550
|
||||
select DMA_NONCOHERENT
|
||||
select IRQ_MIPS_CPU
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select COMMON_CLK
|
||||
select GENERIC_IRQ_CHIP
|
||||
select BUILTIN_DTB
|
||||
@@ -325,7 +323,7 @@ config LANTIQ
|
||||
select SYS_SUPPORTS_MIPS16
|
||||
select SYS_SUPPORTS_MULTITHREADING
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select SWAP_IO_SPACE
|
||||
select BOOT_RAW
|
||||
select CLKDEV_LOOKUP
|
||||
@@ -377,7 +375,6 @@ config MACH_LOONGSON64
|
||||
|
||||
config MACH_PISTACHIO
|
||||
bool "IMG Pistachio SoC based boards"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select BOOT_ELF32
|
||||
select BOOT_RAW
|
||||
select CEVT_R4K
|
||||
@@ -385,6 +382,7 @@ config MACH_PISTACHIO
|
||||
select COMMON_CLK
|
||||
select CSRC_R4K
|
||||
select DMA_MAYBE_COHERENT
|
||||
select GPIOLIB
|
||||
select IRQ_MIPS_CPU
|
||||
select LIBFDT
|
||||
select MFD_SYSCON
|
||||
@@ -406,13 +404,13 @@ config MACH_PISTACHIO
|
||||
|
||||
config MACH_XILFPGA
|
||||
bool "MIPSfpga Xilinx based boards"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select BOOT_ELF32
|
||||
select BOOT_RAW
|
||||
select BUILTIN_DTB
|
||||
select CEVT_R4K
|
||||
select COMMON_CLK
|
||||
select CSRC_R4K
|
||||
select GPIOLIB
|
||||
select IRQ_MIPS_CPU
|
||||
select LIBFDT
|
||||
select MIPS_CPU_SCACHE
|
||||
@@ -536,7 +534,7 @@ config MACH_VR41XX
|
||||
select CSRC_R4K
|
||||
select SYS_HAS_CPU_VR41XX
|
||||
select SYS_SUPPORTS_MIPS16
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
|
||||
config NXP_STB220
|
||||
bool "NXP STB220 board"
|
||||
@@ -856,7 +854,7 @@ config MIKROTIK_RB532
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SWAP_IO_SPACE
|
||||
select BOOT_RAW
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select MIPS_L1_CACHE_SHIFT_4
|
||||
help
|
||||
Support the Mikrotik(tm) RouterBoard 532 series,
|
||||
@@ -879,7 +877,7 @@ config CAVIUM_OCTEON_SOC
|
||||
select HW_HAS_PCI
|
||||
select ZONE_DMA32
|
||||
select HOLES_IN_ZONE
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select LIBFDT
|
||||
select USE_OF
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
@@ -937,7 +935,7 @@ config NLM_XLP_BOARD
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_64BIT_KERNEL
|
||||
select ARCH_PHYS_ADDR_T_64BIT
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select SYS_SUPPORTS_BIG_ENDIAN
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_SUPPORTS_HIGHMEM
|
||||
@@ -1077,7 +1075,7 @@ config MIPS_CLOCK_VSYSCALL
|
||||
def_bool CSRC_R4K || CLKSRC_MIPS_GIC
|
||||
|
||||
config GPIO_TXX9
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
bool
|
||||
|
||||
config FW_CFE
|
||||
@@ -1342,7 +1340,7 @@ config CPU_LOONGSON3
|
||||
select CPU_SUPPORTS_HUGEPAGES
|
||||
select WEAK_ORDERING
|
||||
select WEAK_REORDERING_BEYOND_LLSC
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
help
|
||||
The Loongson 3 processor implements the MIPS64R2 instruction
|
||||
set with many extensions.
|
||||
@@ -1362,7 +1360,7 @@ config CPU_LOONGSON2F
|
||||
bool "Loongson 2F"
|
||||
depends on SYS_HAS_CPU_LOONGSON2F
|
||||
select CPU_LOONGSON2
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
help
|
||||
The Loongson 2F processor implements the MIPS III instruction set
|
||||
with many extensions.
|
||||
|
||||
@@ -20,7 +20,7 @@ config MIPS_MTX1
|
||||
|
||||
config MIPS_DB1XXX
|
||||
bool "Alchemy DB1XXX / PB1XXX boards"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select HW_HAS_PCI
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
|
||||
@@ -14,7 +14,7 @@ config PIC32MZDA
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GPIOLIB
|
||||
select COMMON_CLK
|
||||
select CLKDEV_LOOKUP
|
||||
select LIBFDT
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
config NIOS2
|
||||
def_bool y
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select CLKSRC_OF
|
||||
select GENERIC_ATOMIC64
|
||||
select GENERIC_CLOCKEVENTS
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user