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arm64: dts: broadcom: bcm2712: Move non simple-bus nodes to root level

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The 'gpu' and 'firmware' nodes are not MMIO devices, so they should not
be under a 'simple-bus', but at the root level.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260320154809.1246064-2-robh@kernel.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
This commit is contained in:
Rob Herring (Arm)
2026-03-20 10:17:30 -07:00
committed by Florian Fainelli
parent 18d4a06e10
commit 0acb1de2b4
2 changed files with 28 additions and 31 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi
+24 -27
View File
@@ -44,6 +44,30 @@
};
};
firmware {
firmware: rpi-firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
mboxes = <&mailbox>;
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;
};
power: power {
compatible = "raspberrypi,bcm2835-power";
firmware = <&firmware>;
#power-domain-cells = <1>;
};
};
};
sd_io_1v8_reg: sd-io-1v8-reg {
compatible = "regulator-gpio";
regulator-name = "vdd-sd-io";
@@ -189,33 +213,6 @@
};
};
&soc {
firmware: firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
mboxes = <&mailbox>;
dma-ranges;
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;
};
};
power: power {
compatible = "raspberrypi,bcm2835-power";
firmware = <&firmware>;
#power-domain-cells = <1>;
};
};
/* uarta communicates with the BT module */
&uarta {
uart-has-rtscts;
arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+4 -4
View File
@@ -509,10 +509,6 @@
<0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>,
<0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>;
vc4: gpu {
compatible = "brcm,bcm2712-vc6";
};
pcie0: pcie@1000100000 {
compatible = "brcm,bcm2712-pcie";
reg = <0x10 0x00100000 0x00 0x9310>;
@@ -669,6 +665,10 @@
};
};
vc4: gpu {
compatible = "brcm,bcm2712-vc6";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |